TPS65150PWP

Product Folder Order Now Support & Community Tools & Software Technical Documents TPS65150 SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 TPS65150 Low Input Voltage, Compact LCD Bias IC With VCOM Buffer 1 Features 3 Description • • • • • • The TPS65150 device offers a very compact and small power supply solution that provides all three voltages required by thin film transistor (TFT) LCD displays. With an input voltage range of 1.8 V to 6 V the device is ideal for notebooks powered by a 2.5-V or 3.3-V input rail or monitor applications with a 5-V input voltage rail. Additionally the TPS65150 device provides an integrated high current buffer to provide the VCOM voltage for the TFT backplane. 1 • • • • • • • • • • • 1.8-V to 6-V Input Voltage Range Integrated VCOM Buffer High-voltage Switch to Isolate V(VGH) Gate-Voltage Shaping of V(VGH) 2-A Internal MOSFET switch Main Output V(VS) up to 15 V With VIT+ When the input supply voltage is above the undervoltage lockout threshold, the device is on and all its functions are enabled. Note that full performance may not be available until the input supply voltage exceeds the minimum value specified in Recommended Operating Conditions. 7.4.2 VI < VIT– When the input supply voltage is below the undervoltage lockout threshold, the TPS65150 device is off and all its functions are disabled. 7.4.3 Fault Mode The TPS65150 device immediately enters fault mode when any of the following is detected: • boost converter overvoltage • overtemperature The TPS65150 device also enters fault mode if any of the following conditions is detected and persists for longer than td(FDLY): • boost converter output out of regulation • negative charge pump output out of regulation • positive charge pump output out of regulation The TPS65150 device does not function during fault mode. Cycle the input supply voltage to exit fault mode and recover normal operation. WHITESPACE Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 21 TPS65150 SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 www.ti.com Device Functional Modes (continued) VI < VIT± OFF ANY STATE VI > VIT+ ON Thermal shutdown Boost converter over-voltage Boost converter out of regulation Negative charge pump out of regulation Positive charge pump out of regulation Fault condition duration longer than td(FDLY) FAULT Fault condition duration less than td(FDLY) FAULT DETECTION Figure 16. Functional Modes 22 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 TPS65150 www.ti.com SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The TPS65150 device has been designed to provide the input supply voltages for the source drivers and gate drivers plus the voltage for the common plane in LCD display applications. In addition, the device provides a gate voltage shaping function that can be used to modulate the gate drivers' positive supply to reduce image sticking. 8.2 Typical Application Figure 17 shows a typical application circuit for a monitor display powered from a 5-V supply. It generates up to 450 mA at 13.5 V to power the source drivers, and 20 mA at 23 V and –5 V to power the gate drivers. L1 3.9 µH VI 5V C2 22 µF D1 C15 22 pF V(VS) 13.5 V, 450 mA C1 22 µF VIN R1 820 k SW SUP FB C7 330 nF D2 V(VGL) ±5 V, 20 mA C3 330 nF C14 1 µF DRVN R2 75 k D3 C16 330 nF R3 620 k D4 DRVP FBN D5 C4 330 nF R4 150 k REF C8 220 nF VI C13 100 nF C9 2.2 nF C10 22 pF C11 10 nF C12 10 nF FLK FBP FDLY R6 56 k COMP CPI ADJ DLY1 DLY2 GD CTRL VGH V(VGH) 23 V, 20 mA R7 500 k IN V(VS) R8 500 k C6 1 nF R5 1M VCOM PGND GND V(VCOM) C5 1 µF Copyright © 2016, Texas Instruments Incorporated Figure 17. Monitor LCD Supply Powered from a 5-V Rail Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 23 TPS65150 SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 www.ti.com Typical Application (continued) 8.2.1 Design Requirements Table 2 shows the design parameters for this example. Table 2. Design Requirements PARAMETER SYMBOL Input supply voltage VI 5V V(VS) 13.5 V at 450 mA V(VS)(PP) 10 mV V(CPI) 23 V at 20 mA Boost converter output voltage and current Boost converter peak-to-peak output voltage ripple Positive charge pump output voltage and current Positive charge pump peak-to-peak output voltage ripple VALUE V(VGH)(PP) 100 mV V(VGL) –5 V at 20 mA V(VGL)(PP) 100 mV Negative charge pump start-up delay time td1 1 ms Positive charge pump start-up delay time td2 1 ms td(fault) 45 ms Negative charge pump output voltage and current Negative charge pump peak-to-peak output voltage ripple Fault delay time Gate voltage shaping slope 10 V/µs 8.2.2 Detailed Design Procedure 8.2.2.1 Boost Converter Design Procedure 8.2.2.1.1 Inductor Selection Several inductors work with the TPS65150, and with external compensation the performance can be adjusted to the specific application requirements. The main parameter for the inductor selection is the inductor saturation current, which should be higher than the peak switch current as calculated in Equation 2 with additional margin to cover for heavy load transients. The alternative, more conservative approach, is to choose the inductor with a saturation current at least as high as the maximum switch current limit of 3.4 A. The second important parameter is the inductor DC resistance. Usually, the lower the DC resistance the higher the efficiency. It is important to note that the inductor DC resistance is not the only parameter determining the efficiency. For a boost converter, where the inductor is the energy storage element, the type and material of the inductor influences the efficiency as well. Especially at a switching frequency of 1.2 MHz, inductor core losses, proximity effects, and skin effects become more important. Usually, an inductor with a larger form factor gives higher efficiency. The efficiency difference between different inductors can vary from 2% to 10%. For the TPS65150, inductor values from 3.3 µH and 6.8 µH are a good choice, but other values can be used as well. Possible inductors are shown in Table 3. Equivalent parts can also be used. Table 3. Inductor Selection INDUCTANCE ISAT DCR MANUFACTURER PART NUMBER DIMENSIONS 4.7 µH 2.6 A 54 mΩ Coilcraft DO1813P-472HC 8.89 mm × 6.1 mm × 5 mm 4.2 µH 2.2 A 23 mΩ Sumida CDRH5D28 4R2 5.7 mm × 5.7 mm × 3 mm 4.7 µH 1.6 A 48 mΩ Sumida CDC5D23 4R7 6 mm × 6 mm × 2.5 mm 4.2 µH 1.8 A 60 mΩ Sumida CDRH6D12 4R2 6.5 mm × 6.5 mm × 1.5 mm 3.9 µH 2.6A 20 mΩ Sumida CDRH6D28 3R9 7 mm × 7 mm × 3 mm 3.3 µH 1.9 A 50 mΩ Sumida CDRH6D12 4R2 6.5 mm × 6.5 mm × 1.5 mm 24 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 TPS65150 www.ti.com SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 The first step in the design procedure is to verify whether the maximum possible output current of the boost converter supports the specific application requirements. A simple approach is to estimate the converter efficiency, by taking the efficiency numbers from the provided efficiency curves, or use a worst case assumption for the expected efficiency, for example, 75%. From Figure 19, it can be seen that the boost converter efficiency is about 85% when operating under the target application conditions. Inserting these values into Equation 1 yields WHITESPACE :0.85;:5 V; D=1± = 0.69 13.5 V (15) WHITESPACE and from Equation 2, the peak switch current can be calculated as WHITESPACE I(SW)M = :0.69;:5 V; :0.45 A; + = 1.8 A 2:1.2 MHz;: H; 1 ± 0.69 (16) WHITESPACE The peak switch current is the peak current that the integrated switch, inductor, and rectifier diode must be able to handle. The calculation must be done for the minimum input voltage where the peak switch current is highest. For the calculation of the maximum current delivered by the boost converter, it must be considered that the positive and negative charge pumps as well as the VCOM buffer run from the output of the boost converter as well. 8.2.2.2 Rectifier Diode Selection The rectifier diode reverse voltage rating should be higher than the maximum output voltage of the converter (13.5 V in this application); its average forward current rating should be higher than the maximum boost converter output current of 450 mA, and its repetitive peak forward current should be greater than or equal to the peak switch current of 1.8 A. Not all diode manufacturers specify repetitive peak forward current; however, a diode with an average forward current rating of 1 A or higher is suitable for most practical applications. From Equation 5, the power dissipated in the rectifier diode is given by WHITESPACE PD = IO VF = :0.45 A;:0.5 V; = 0.225 W (17) WHITESPACE Table 4 lists a number of suitable rectifier diodes, any of which would be suitable for this application. Equivalent parts can also be used. Table 4. Rectifier Diode Selection IF(AV) VR VF MANUFACTURER 2A 20 V 0.44 V at 2 A Vishay Semiconductor PART NUMBER SL22 2A 20 V 0.5 V at 2 A Fairchild Semiconductor SS22 1A 30 V 0.44 V at 2 A Fairchild Semiconductor MBRS130L 1A 20 V 0.45 V at 1 A Microsemi UPS120 1A 20 V 0.45 V at 1 A ON Semiconductor MBRM120 8.2.2.3 Setting the Output Voltage Rearranging Equation 3 and inserting the application parameters, we get WHITESPACE 13.5 V R1 = ± 1 = 10.78 R2 1.146 V (18) WHITESPACE Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 25 TPS65150 SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 www.ti.com Standard values of R1 = 820 kΩ and R2 = 75 kΩ result in a nominal output voltage of 13.68 V and satisfy the recommendation that the value R1 be lower than 1 MΩ. 8.2.2.4 Output Capacitor Selection For best output voltage filtering, a low ESR output capacitor is recommended. Ceramic capacitors have a low ESR value, but tantalum capacitors can be used as well, depending on the application. A 22-µF ceramic output capacitor works for most applications. Higher capacitor values can be used to improve the load transient regulation. See Table 5 for the selection of the output capacitor. Rearranging Equation 6 and inserting the application parameters, the minimum value of output capacitance is given by Equation 19. WHITESPACE CO = 1 ± 0.69 13.5 V ± 5 V 1 ± 0.69 m1.8 A ± 0.45 A ± l pl pq = 20.3 F :1.2 MHz;:10 mV; H 1.2 MHz (19) WHITESPACE The closest standard value is 22 µF. In practice, TI recommends connecting an additional 1-µF capacitor directly to the SUP pin to ensure a clean supply to the internal circuitry that runs from this supply voltage. 8.2.2.5 Input Capacitor Selection For good input voltage filtering, low ESR ceramic capacitors are recommended. A 22-µF ceramic input capacitor is sufficient for most applications. For better input voltage filtering, this value can be increased. See Table 5 for input capacitor recommendations. Equivalent parts can also be used. Table 5. Input and Output Capacitance Selection CAPACITANCE VOLTAGE RATING MANUFACTURER PART NUMBER SIZE 22 µF 16 V Taiyo Yuden EMK325BY226MM 1206 22 µF 6.3 V Taiyo Yuden JMK316BJ226 1206 8.2.2.6 Compensation From Table 1, it can be seen that the recommended values for C9 and R9 when VI = 5 V are 2.2 nF and 0 Ω respectively, and that a feedforward zero at 11.2 kHz should be added. Rearranging Equation 7, we get WHITESPACE C15 = 1 Œfco :R1; (20) WHITESPACE Inserting fco = 11.2 kHz and R1 = 820 kΩ, we get WHITESPACE C15 = 1 = 17 pF Œ:11.2 kHz;:820 k ; WHITESPACE In this case, a standard value of 22 pF was used. 8.2.2.7 Negative Charge Pump 8.2.2.7.1 Choosing the Output Capacitance Rearranging Equation 9 and inserting the application parameters, the minimum recommended value of C3 is given by 26 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 TPS65150 www.ti.com SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 WHITESPACE IO 20 mA C3 = = = 83 nF 2fVO:PP; 2:1.2 MHz;:100 mV; (21) WHITESPACE In this application, a capacitance of 330 nF was used to allow the same value to be used for all charge pump capacitances. 8.2.2.7.2 Choosing the Flying Capacitance A minimum flying capacitance of 100 nF is recommended. In this application, a capacitance of 330 nF was used to allow the same value to be used for all charge pump capacitances. 8.2.2.7.3 Choosing the Feedback Resistors From Equation 22, the ratio of R3 to R4 required to generate an output voltage of –5 V is given by WHITESPACE R3 = ± F VO ±5 V G R4 = ± l p R4 = :4.122;R4 V(REF) 1.213 V (22) WHITESPACE Values of R3 = 620 kΩ and R4 = 150 kΩ generate a nominal output voltage of –5.014 V and load the REF pin with only 8 µA. 8.2.2.7.4 Choosing the Diodes The average forward current in D2 and D3 is equal to the output current and therefore a maximum of 20 mA. The peak repetitive forward current in D2 and D3 is equal to twice the output current and therefore less than 40 mA.. The BAT54S comprises two Schottky diodes in a small SOT-23 package and easily meets the current requirements of this application. 8.2.2.8 Positive Charge Pump 8.2.2.8.1 Choosing the Flying Capacitance A minimum flying capacitance of 330 nF is recommended. 8.2.2.8.2 Choosing the Output Capacitance Rearranging Equation 10 and inserting the application parameters, we get WHITESPACE C4 = :20 mA; = 83 nF 2:1.2 MHz;:100 mV; (23) WHITESPACE In this application, a nominal value of 330 nF was used to allow the same value to be used for all charge pump capacitances. 8.2.2.8.3 Choosing the Feedback Resistors Rearranging Equation 8 and inserting the application parameters, we get WHITESPACE R5 23 V = ± 1 = 17.95 R6 1.214 V (24) WHITESPACE Standard values of 1 MΩ and 56 kΩ result in a nominal output voltage of 22.89 V. Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 27 TPS65150 SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 www.ti.com 8.2.2.8.4 Choosing the Diodes The average forward current in D4 and D5 is equal to the output current and therefore a maximum of 20 mA. The peak repetitive forward current in D4 and D5 is equal to twice the output current and therefore less than 40 mA. 8.2.2.9 Gate Voltage Shaping Rearranging Equation 13 and inserting I(ADJ) = 200 µA and slope = 10 V/µs, we get WHITESPACE I:ADJ; A C10 = = = 20 pF slope 10 V/ s (25) WHITESPACE The closest standard value for C10 is 22 pF. 8.2.2.10 Power-On Sequencing Rearranging Equation 12 and inserting td1 = td2 = 1 ms and Vref2 = 1.213 V, we get WHITESPACE C11 = C12 = : A;:2.5 ms; = 10.31 nF 1.213 V (26) WHITESPACE 10 nF is the closest standard value. 8.2.2.11 Fault Delay Rearranging Equation 14 and inserting td(FDLY) = 45 ms, we get WHITESPACE 45 ms CFDLY = = 100 nF 450 k (27) WHITESPACE 100 nF is a standard value. 8.2.2.12 Undervoltage Lockout Function The TPS65150 device contains an undervoltage lockout (UVLO) function that stops the device operating if the voltage on the VDD pin is too low. 28 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 TPS65150 www.ti.com SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 8.2.3 Application Curves 100 100 V(VS) = 10 V 80 80 70 70 60 50 40 30 60 50 40 30 VI = 2.5 V VI = 3.3 V VI = 5 V 20 10 0 V(VS) = 13.5 V 90 Efficiency (%) Efficiency (%) 90 0 100m I(VGH) = 0 mA 200m 300m 400m 500m Output Current (A) 600m VI = 2.5 V VI = 3.3 V VI = 5 V 20 10 0 700m 0 100m G000 I(VGL) = 0 mA I(VGH) = 0 mA Figure 18. Boost Converter Efficiency (V(VS) = 10 V) 200m 300m Output Current (A) 400m 500m G000 I(VGL) = 0 mA Figure 19. Boost Converter Efficiency (V(VS) = 13.5 V) 1.155M 100 V(VS) = 13.5 V V(VS) = 15 V 90 1.15M 70 Frequency (Hz) Efficiency (%) 80 60 50 40 30 1.14M 1.135M 1.13M VI = 2.5 V VI = 3.3 V VI = 5 V 20 10 0 1.145M 0 50m I(VGH) = 0 mA 100m 150m 200m Output Current (A) 250m 1.125M 300m VI = 1.8 V VI = 3.6 V 1.12M −40 G000 −20 0 20 40 60 80 Free−Air Temperature (°C) 100 120 G000 I(VGL) = 0 mA Figure 20. Boost Converter Efficiency (V(VS) = 15 V) V(SW) 10 V/div Figure 21. Boost Converter Switching Frequency V(SW) 10 V/div V(VS) 50 mV/div V(VS) 50 mV/div VI = 5 V V(VS) = 13.5 V / 10 mA IL 1 A/div IL 1 A/div VI = 5 V V(VS) = 13.5 V / 300 mA 250 ns/div 250 ns/div Figure 22. Boost Converter Operation (Nominal Load) Figure 23. Boost Converter Operation (Light Load) Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 29 TPS65150 SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 www.ti.com V(VS) 100 mV/div VI 5 V/div VI = 3.3 V V(VS) = 10 V, CO = 22 µF V(VS) 5 V/div I(VS) 30 mA to 330 mA VI = 5 V V(VS) = 13.5 V I(VS) = 200 mA IIN 500 mA/div 100 µs/div 2.5 ms/div Figure 24. Boost Converter Load Transient Response Figure 25. Boost Converter Soft Start V(VS) 5 V/div V(VS) 5 V/div V(VGH) 10 V/div V(VGH) 10 V/div V(VGL) 5 V/div V(VGL) 5 V/div V(VCOM) 2 V/div VI = 5 V V(VS) = 13.6 V / 300 mA C(IN) = 1 nF V(VCOM) 5 V/div 1 ms/div 2.5 ms/div Figure 26. Power-On Sequencing Figure 27. Power-On Sequencing With External Isolation MOSFET V(VS) 5 V/div V(VGH) 10 V/div CTRL 2 V/div td(FDLY) V(VGH) 10 V/div Fault (Heavy load on V(VS)) CADJ = 68 pF I(VGH) = No Load V(VGL) 5 V/div CFDLY = 10 nF 2.5 µs/div 10 ms/div Figure 28. Gate Voltage Shaping 30 Figure 29. Adjustable Fault Detection Time Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 TPS65150 www.ti.com SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 −4.86 25.0 V(VS) = 10 V V(VGL) = –5 V 24.0 −4.90 −4.92 −4.94 −4.96 −4.98 TA = –40°C TA = 25°C TA = 85°C −5.00 −5.02 0 20m 40m 60m Output Current (A) 80m 23.0 22.5 22.0 21.5 TA = –40°C TA = 25°C TA = 85°C 20.5 20.0 100m 0 20m G000 40m 60m Output Current (A) 80m 100m G000 Figure 31. Positive Charge Pump Load Regulation (×2) 80m 25.0 V(VS) = 10 V V(VGH) = 24 V 24.5 60m V(VCOM) − V(IN) (V) 24.0 Output Voltage (V) 23.5 21.0 Figure 30. Negative Charge Pump Load Regulation 23.5 23.0 22.5 22.0 21.5 20.5 0 20m V(VS) = 10 V V(VCOM) = 5 V 40m 20m 0 −20m −40m TA = –40°C TA = 25°C TA = 85°C 21.0 20.0 V(VS) = 15 V V(VGH) = 24 V 24.5 Output Voltage (V) Output Voltage (V) −4.88 −60m 40m 60m Output Current (A) 80m 100m G000 −80m −160m −120m −80m −40m 0 40m Output Current (A) Figure 32. Positive Charge Pump Load Regulation (×3) 80m 120m 160m Figure 33. VCOM Buffer Load Regulation Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 G000 31 TPS65150 SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 www.ti.com 8.3 System Examples V(SW) L1 3.9 µH VI 2.5 V C1 22 µF VIN C2 22 µF D1 C15 47 pF V(VS) 10 V, 280 mA R1 430 k SW SUP FB C7 330 nF D2 V(VGL) ±5 V, 20 mA C3 330 nF C14 1 µF R2 56 k DRVN D3 C16 330 nF R3 620 k D4 DRVP FBN D5 R9 VI 68 k C13 100 nF C9 470 pF C10 22 pF C11 10 nF C12 10 nF FLK C6 1 nF R5 1M FDLY R6 56 k COMP CPI ADJ DLY1 DLY2 GD CTRL VGH IN R8 500 k C4 330 nF FBP V(VGH) 23 V, 20 mA R7 500 k V(VS) D7 C18 330 nF V(SW) REF C8 220 nF D6 C17 330 nF R4 150 k VCOM PGND GND V(VCOM) C5 1 µF Copyright © 2016, Texas Instruments Incorporated Figure 34. Notebook LCD Supply Powered from a 2.5-V Rail 32 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 TPS65150 www.ti.com SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 System Examples (continued) L1 3.9 µH VI 5V C2 22 µF D1 C15 22 pF V(VS) 13.5 V, 450 mA C1 22 µF VIN R1 820 k SW SUP FB C7 330 nF D2 V(VGL) ±5 V, 20 mA C3 330 nF C14 1 µF DRVN R2 75 k D3 C16 330 nF R3 620 k D4 DRVP FBN D5 C4 330 nF R4 150 k REF C8 220 nF VI C13 100 nF C9 2.2 nF C10 22 pF C11 10 nF C12 10 nF FLK FBP FDLY R6 56 k COMP CPI ADJ DLY1 DLY2 GD CTRL VGH V(VGH) 23 V, 20 mA R7 500 k IN V(VS) R8 500 k C6 1 nF R5 1M VCOM PGND GND V(VCOM) C5 1 µF Copyright © 2016, Texas Instruments Incorporated Figure 35. Monitor LCD Supply Powered from a 5-V Rail Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 33 TPS65150 SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 www.ti.com System Examples (continued) L1 3.9 µH VI 5V C1 22 µF VIN C2 22 µF D1 C15 22 pF C13 1 µF V(VS) 13.5 V, 450 mA R7 510 k R1 820 k SW Q1 Si2343 C17 220 nF SUP FB C7 330 nF D2 V(VGL) ±5 V, 20 mA C3 330 nF C14 1 µF DRVN R8 100 k R2 75 k D3 C16 330 nF R3 620 k D4 DRVP FBN D5 C4 330 nF R4 150 k REF C8 220 nF VI C13 100 nF C9 2.2 nF C10 22 pF C11 10 nF C12 10 nF FLK FBP FDLY R6 56 k COMP CPI ADJ DLY1 DLY2 GD CTRL VGH V(VGH) 23 V, 20 mA R7 500 k IN V(VS) R8 500 k C6 1 nF R5 1M VCOM PGND GND V(VCOM) C5 1 µF Copyright © 2016, Texas Instruments Incorporated Figure 36. Typical Isolation and Short Circuit Protection Switch for V(VS) Using Q1 and Gate Drive Signal (GD) 34 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 TPS65150 www.ti.com SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 9 Power Supply Recommendations The TPS65150 device is designed to operate with input supplies from 1.8 V to 6 V. Like most integrated circuits, the input supply should be stable and free of noise if the device's full performance is to be achieved. If the input is located more than a few centimeters away from the device, additional bulk capacitance may be required. The input capacitance shown in the application schematics in this data sheet is sufficient for typical applications. 10 Layout 10.1 Layout Guidelines The PCB layout is an important step in the power supply design. An incorrect layout could cause converter instability, load regulation problems, noise, and EMI issues. Especially with a switching DC-DC converter at high load currents, too-thin PCB traces can cause significant voltage spikes. Good grounding is also important. If possible, TI recommends using a common ground plane to minimize ground shifts between analog ground (GND) and power ground (PGND). Additionally, the following PCB design layout guidelines are recommended for the TPS65150 device: 1. Boost converter output capacitor, input capacitor and Power ground (PGND) should form a star ground or should be directly connected together on a common power ground plane. 2. Place the input capacitor directly from the input pin (VIN) to ground. 3. Use a bold PCB trace to connect SUP to the output Vs. 4. Place a small bypass capacitor from the SUP pin to ground. 5. Use short traces for the charge-pump drive pins (DRVN, DRVP) of VGH and VGL because these traces carry switching currents. 6. Place the charge pump flying capacitors as close as possible to the DRVP and DRVN pin, avoiding a high voltage spikes at these pins. 7. Place the Schottky diodes as close as possible to the device and to the flying capacitors connected to DRVP and DRVN. 8. Carefully route the charge pump traces to avoid interference with other circuits because they carry high voltage switching currents . 9. Place the output capacitor of the VCOM buffer as close as possible to the output pin (VCOM). 10. The thermal pad must be soldered to the PCB for correct thermal performance. Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 35 TPS65150 SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 www.ti.com 10.2 Layout Example VI GND FB GD DLY2 COMP VIN FBN SW REF SW GND PGND DRVN PGND DRVP SUP GND FDLY DLY1 CPI VCOM VGH IN ADJ FBP V(VGL) V(VGH) CTRL V(CPI) V(VCOM) V(VS) GND Via to inner / bottom signal layer Thermal via to copper pour on inner / bottom signal layer Figure 37. PCB Layout Example 36 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 TPS65150 www.ti.com SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 11 Device and Documentation Support 11.1 Device Support 11.1.1 Third-Party Products Disclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE. 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.3 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 11.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 37 TPS65150 SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 www.ti.com PACKAGE OUTLINE RGE0024B VQFN - 1 mm max height SCALE 3.000 PLASTIC QUAD FLATPACK - NO LEAD 4.1 3.9 A B 0.5 0.3 PIN 1 INDEX AREA 4.1 3.9 0.3 0.2 DETAIL OPTIONAL TERMINAL TYPICAL C 1 MAX SEATING PLANE 0.05 0.00 0.08 C 2X 2.5 (0.2) TYP 2.45 0.1 7 SEE TERMINAL DETAIL 12 EXPOSED THERMAL PAD 13 6 2X 2.5 SYMM 25 18 1 20X 0.5 24 PIN 1 ID (OPTIONAL) 0.3 0.2 0.1 C A B 0.05 24X 19 SYMM 24X 0.5 0.3 4219013/A 05/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. www.ti.com 38 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 TPS65150 www.ti.com SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 EXAMPLE BOARD LAYOUT RGE0024B VQFN - 1 mm max height PLASTIC QUAD FLATPACK - NO LEAD ( 2.45) SYMM 24 19 24X (0.6) 1 18 24X (0.25) (R0.05) TYP 25 SYMM (3.8) 20X (0.5) 13 6 ( 0.2) TYP VIA 12 7 (0.975) TYP (3.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X 0.07 MIN ALL AROUND 0.07 MAX ALL AROUND SOLDER MASK OPENING METAL EXPOSED METAL SOLDER MASK OPENING EXPOSED METAL NON SOLDER MASK DEFINED (PREFERRED) METAL UNDER SOLDER MASK SOLDER MASK DEFINED SOLDER MASK DETAILS 4219013/A 05/2017 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 39 TPS65150 SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016 www.ti.com EXAMPLE STENCIL DESIGN RGE0024B VQFN - 1 mm max height PLASTIC QUAD FLATPACK - NO LEAD 4X ( 1.08) (0.64) TYP 24 19 24X (0.6) 1 25 18 24X (0.25) (R0.05) TYP (0.64) TYP SYMM (3.8) 20X (0.5) 13 6 METAL TYP 12 7 SYMM (3.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 25 78% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:20X 4219013/A 05/2017 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com 40 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65150 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TPS65150PWP ACTIVE HTSSOP PWP 24 60 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 TPS65150 Samples TPS65150PWPG4 ACTIVE HTSSOP PWP 24 60 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 TPS65150 Samples TPS65150PWPR ACTIVE HTSSOP PWP 24 2000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 TPS65150 Samples TPS65150RGER ACTIVE VQFN RGE 24 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 TPS 65150 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of