Product
Folder
Order
Now
Support &
Community
Tools &
Software
Technical
Documents
TPS65262-2
SLVSD87B – DECEMBER 2015 – REVISED JULY 2019
TPS65262-2 4.5-V to 18-V Input Voltage, 3-A/1-A/1-A Output Current Triple Synchronous
Step-Down Converter With Dual Adjustable 350-mA/150-mA LDOs
1 Features
3 Description
•
•
•
•
•
The TPS65262-2 is a monolithic triple synchronous
step-down (buck) converter with 3-A/1-A/1-A output
current. A wide 4.5- to 18-V input supply voltage
range encompasses the most intermediate bus
voltage operating off 5-, 9-, 12-, or 15-V power bus.
The converter, with constant frequency peak current
mode, is designed to simplify its application while
giving designers options to optimize the system
according to targeted applications. The device
operates at 600-kHz fixed switching frequency. The
loop compensations for buck 2 and buck3 have been
integrated for less external components. The 180°
out-of-phase operation between buck1 and buck2, 3
(buck2 and buck3 run in phase) minimizes the input
filter requirements.
1
•
•
•
•
•
•
•
•
•
Operating input voltage range: 4.5 to 18 V
Feedback reference voltage: 0.6 V ±1%
Maximum continuous output current: 3 A/1 A/1 A
Fixed 600-kHz switching frequency
Integrated dual LDOs with input voltage range: 1.3
to 18 V and continuous output current: 350
mA/150 mA
Programmable soft start time for Buck1
Fixed 1-ms soft-start time for Buck2 and Buck3
Internal loop compensation for Buck2 and Buck3
Dedicated enable pins for each Buck
Support pulse skipping mode (PSM) and forced
continuous current mode (FCCM)
Output voltage power-good indicator
Thermal overloading protection
32-Pin VQFN (RHB) 5-mm × 5-mm package
Overvoltage protection, overcurrent and shortcircuit protection, and overtemperature protection
Two low dropout voltage linear regulators (LDO) are
also built in TPS65262-2 with input voltage range 1.3
to 18 V, continuous output current 350 mA/150 mA,
independent enable and adjustable output voltage.
2 Applications
•
•
•
•
•
•
The TPS65262-2 operates in pulse skipping mode
(PSM) with connecting MODE pin to GND and
operates in force continuous current mode (FCC) with
driving MODE pin to high or leaving float. PSM mode
provides high efficiency by reducing switching losses
at light load and FCC mode reduces noise
susceptibility and RF interference.
DTV
Set-top boxes
Home gateway and access point networks
Wireless routers
Surveillance
POS machine
A power-good pin asserts when any output voltages
are out of regulation.
Device Information(1)
PART NUMBER
TPS65262-2
PACKAGE
VQFN (32)
BODY SIZE (NOM)
5.00 mm × 5.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Application Schematic
Efficiency vs Output Load
Vout1
Vin
VINx
LX1
100%
PGOOD
FB1
MODE
80%
ENx
Vout2
SS1
LX2
LDO1
LVIN1
LOUT1
LFB1
LEN1
E ffic ie n c y
TPS65262-2
FB2
Vout3
LDO2
60%
40%
LX3
LVIN2
LOUT2
LFB2
LEN2
20%
FB3
AGND
PSM Mode
V IN = 5 V; V OUT = 1.2 V
PGND
PWM Mode
0
10m
100m
Output Load (A)
1
D001
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS65262-2
SLVSD87B – DECEMBER 2015 – REVISED JULY 2019
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
5
6.1
6.2
6.3
6.4
6.5
6.6
5
5
5
5
6
8
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 12
7.1 Overview ................................................................. 12
7.2 Functional Block Diagram ....................................... 13
7.3 Feature Description................................................. 13
7.4 Device Functional Modes........................................ 20
8
Application and Implementation ........................ 21
8.1 Application Information............................................ 21
8.2 Typical Application .................................................. 21
9 Power Supply Recommendations...................... 31
10 Layout................................................................... 31
10.1 Layout Guidelines ................................................. 31
10.2 Layout Example .................................................... 32
11 Device and Documentation Support ................. 33
11.1
11.2
11.3
11.4
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
33
33
33
33
12 Mechanical, Packaging, and Orderable
Information ........................................................... 33
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (December 2015) to Revision B
Page
•
Added TJ = 25°C temperature condition for LDO1 current limit in the Electrical Characteristics........................................... 7
•
Added TJ = 25°C temperature condition for LDO2 current limit in the Electrical Characteristics........................................... 7
Changes from Original (December 2015) to Revision A
•
2
Page
Updated device status to production data ............................................................................................................................. 1
Submit Documentation Feedback
Copyright © 2015–2019, Texas Instruments Incorporated
Product Folder Links: TPS65262-2
TPS65262-2
www.ti.com
SLVSD87B – DECEMBER 2015 – REVISED JULY 2019
5 Pin Configuration and Functions
EN1
FB1
SS1
COMP1
V7V
AGND
FB3
EN3
32-Pin Plastic VQFN
RHB Package
Top View
24
23
22
21
20
19
18
17
BST1 25
16
BST3
LX1 26
15
LX3
PGND1 27
14
PGND3
13
VIN3
LEN1 29
12
VIN2
LFB1 30
11
PGND2
LOUT1 31
10
LX2
LVIN1 32
9
VIN1 28
4
5
6
7
8
PGOOD
MODE
FB2
EN2
LOUT2
3
LEN2
2
LFB2
1
LVIN2
Thermal Pad
BST2
(There is no electric signal down bonded to thermal pad inside IC. Exposed thermal pad must be soldered to PCB for
optimal thermal performance.)
Pin Functions
PIN
NAME
DESCRIPTION
NO.
LVIN2
1
Input power supply for LDO2. Connect LVIN2 pin as close as possible to the (+) terminal of an input ceramic capacitor
(suggest 1 µF).
LOUT2
2
LDO2 output. Connect LOUT2 pin as close as possible to the (+) terminal of an output ceramic capacitor (suggest 1 µF).
LFB2
3
Feedback Kelvin sensing pin for LDO2 output voltage. Connect this pin to LDO2 resistor divider.
LEN2
4
Enable for LDO2. Float to enable.
PGOOD
5
An open-drain output, asserts low if output voltage of any buck is beyond regulation range due to thermal shutdown,
overcurrent, undervoltage, or ENx shut down.
MODE
6
Switch FCC mode and PSM mode. Pull high or leave floating, FCC mode. Pull low, PSM mode.
FB2
7
Feedback Kelvin sensing pin for buck2 output voltage. Connect this pin to buck2 resistor divider.
EN2
8
Enable for buck2. Float to enable. Can use this pin to adjust the input undervoltage lockout of buck2 with a resistor
divider.
BST2
9
Boot strapped supply to the high side floating gate driver in Buck2. Connect a capacitor (recommend 47 nF) from BST2
pin to LX2 pin.
LX2
10
Switching node connection to the inductor and bootstrap capacitor for Buck2. The voltage swing at this pin is from a
diode voltage below the ground up to VIN2 voltage.
PGND2
11
Power ground connection of Buck2. Connect PGND2 pin as close as possible to the (–) terminal of VIN2 input ceramic
capacitor.
VIN2
12
Input power supply for Buck2. Connect VIN2 pin as close as possible to the (+) terminal of an input ceramic capacitor
(suggest 10 µF).
VIN3
13
Input power supply for Buck3. Connect VIN3 pin as close as possible to the (+) terminal of an input ceramic capacitor
(suggest 10 µF).
PGND3
14
Power ground connection of Buck3. Connect PGND3 pin as close as possible to the (–) terminal of VIN3 input ceramic
capacitor.
LX3
15
Switching node connection to the inductor and bootstrap capacitor for Buck3. The voltage swing at this pin is from a
diode voltage below the ground up to VIN3 voltage.
Submit Documentation Feedback
Copyright © 2015–2019, Texas Instruments Incorporated
Product Folder Links: TPS65262-2
3
TPS65262-2
SLVSD87B – DECEMBER 2015 – REVISED JULY 2019
www.ti.com
Pin Functions (continued)
PIN
NAME
DESCRIPTION
NO.
BST3
16
Boot strapped supply to the high side floating gate driver in Buck3. Connect a capacitor (recommend 47 nF) from BST3
pin to LX3 pin.
EN3
17
Enable for Buck3. Float to enable. Can use this pin to adjust the input undervoltage lockout of Buck3 with a resistor
divider.
FB3
18
Feedback Kelvin sensing pin for buck3 output voltage. Connect this pin to Buck3 resistor divider.
AGND
19
Analog ground common to buck controllers and other analog circuits. It must be routed separately from high current
power grounds to the (-) terminal of bypass capacitor of input voltage VIN.
V7V
20
Internal LDO for gate driver and internal controller. Connect a 1-µF capacitor from the pin to power ground
COMP1
21
Error amplifier output and loop compensation pin for Buck1. Connect a series resistor and capacitor to compensate the
control loop of buck1 with peak current PWM mode.
SS1
22
Soft-start and tracking input for Buck1. An internal 5-µA pullup current source is connected to this pin. The soft-start time
can be programmed by connecting a capacitor between this pin and ground.
FB1
23
Feedback Kelvin sensing pin for Buck1 output voltage. Connect this pin to Buck1 resistor divider.
EN1
24
Enable for Buck1. Float to enable. Can use this pin to adjust the input undervoltage lockout of Buck1 with a resistor
divider.
BST1
25
Boot strapped supply to the high side floating gate driver in buck1. Connect a capacitor (recommend 47 nF) from BST1
pin to LX1 pin.
LX1
26
Switching node connection to the inductor and bootstrap capacitor for buck1. The voltage swing at this pin is from a
diode voltage below the ground up to VIN1 voltage.
PGND1
27
Power ground connection of buck1. Connect PGND1 pin as close as possible to the (–) terminal of VIN1 input ceramic
capacitor.
VIN1
28
Input power supply for buck1. Connect VIN1 pin as close as possible to the (+) terminal of an input ceramic capacitor
(suggest 10 µF).
LEN1
29
Enable for LDO1. Float to enable.
LFB1
30
Feedback Kelvin sensing pin for LDO1 output voltage. Connect this pin to LDO1 resistor divider.
LOUT1
31
LDO1 output. Connect LOUT1 pin as close as possible to the (+) terminal of an output ceramic capacitor (suggest 1 µF).
LVIN1
32
Input power supply for LDO1. Connect LVIN1 pin as close as possible to the (+) terminal of an input ceramic capacitor
(suggest 1 µF).
PAD
—
There is no electric signal down bonded to thermal pad inside IC. Exposed thermal pad must be soldered to PCB for
optimal thermal performance.
4
Submit Documentation Feedback
Copyright © 2015–2019, Texas Instruments Incorporated
Product Folder Links: TPS65262-2
TPS65262-2
www.ti.com
SLVSD87B – DECEMBER 2015 – REVISED JULY 2019
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (operating in a typical application circuit) (1)
MIN
MAX
VIN1, VIN2, VIN3, LVIN1, LVIN2
–0.3
20
LX1, LX2, LX3 (Maximum withstand voltage transient
很抱歉,暂时无法提供与“TPS65262-2RHBT”相匹配的价格&库存,您可以联系我们找货
免费人工找货- 国内价格 香港价格
- 250+20.82079250+2.58281
- 500+20.02417500+2.48399
- 750+19.62514750+2.43449
- 1250+19.182711250+2.37961
- 1750+18.924201750+2.34754
- 2500+18.675482500+2.31669