TPS65290
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SLVSBY5A – APRIL 2013 – REVISED MAY 2013
LOW QUIESCENT CURRENT, MULTI-MODE PMIC FOR BATTERY POWERED, ENERGY
HARVESTING APPLICATIONS
Check for Samples: TPS65290
FEATURES
1
•
•
•
•
•
•
•
•
•
•
•
•
Operating Input Voltage Range: 2.2 V to 5 V
500-mA Buck-Boost Converter, Stand-Alone
Operation or Serial Bus Controlled
PFM/PWM Operation With Forced PWM Option
150 mA LDO
Stand-Alone or Serial Bus (SPI or I2C)
Controlled
Two Power Distribution Switches Powered
from Buck-Boost Output
One Power Distribution Switch Powered from
the Maximum of Buck Boost or Battery Input
Two Power Distribution Switches Powered
from LDO Output
One Power Switch Powered from Battery Input
One Power Switch to Connect BB Output to
LDO Output and Improve System Efficiency
Automatic Power Max Function Between
Battery Supply and Buck-Boost With Smart
Capabilities to Maximize System Energy
Management
Low Power Always-On Bias Supply for
Microcontroller Sleep Mode With Three
Factory Selectable Options:
– 10-mA, 100-nA IDDQ Deep Sleep Zero
Leakage Current Bias Controller With PreSet Voltage
– 10-mA, 400-nA IDDQ LDOMINI
– 30-mA, 300-nA IDQQ BuckMINI
•
•
•
•
Input Voltage Recovery Comparator With
Selectable Threshold
Factory Selectable SPI/I2C Interface
-40°C to 85°C Ambient Temperature Range
24-Pin RHF (QFN) Package
APPLICATIONS
•
•
Low Power, Energy Harvesting Systems
Battery Powered Applications
VIN
BB_OUT
I2C/SPI
Buck boost
EN BB
VMAX
I2C/SPI
GPIO3
I2C/SPI
GPIO3
MAX
PWR_BB1
PWR_VMAX
PWR_BB2
I2C/SPI
GPIO4
VMAX
I2C/SPI
LDO_IN
LDO_OUT
LDO
I2C/SPI
PWR_LDO1
I2C/SPI
GPIO2
CE
I2C/SPI
GPIO2
I2C/SPI
Zero Leak Adjustable Bias
TPS65290ZB
VMICRO
Buck Mini
TPS65290BM
I2C/SPI
I2C/SPI
CHIP_EN*
2.5-3.6
PWR_LDO2
Low IQQ ldo
TPS65290LM
I2C/SPI
Vin
I2C/SPI
GPIO1
PWR_VIN
INT management
INT
Control options
I2C
SPI
GPIO1,2,3,4
Serial Interface
GPIO control
Always on
DESCRIPTION
TPS65290 is a PMIC designed to operate in applications dependent on efficient power management over a wide
range of system load conditions ranging from fractions of a microamp to a few hundred miliamps. The device
operates over a wide 2.2-V to 5-V input-voltage range and incorporates a very low quiescent current always-on
power supply, a 500-mA buck/boost converter, a 150-mA low dropout regulator and 8 power distribution
switches. The always-on supply features three different factory selectable options: 30mA buck converter with
300-nA quiescent current. 10-mA LDO with 400-nA quiescent current and 10-mA Zero IDDQ drop with 100-nA
quiescent current. The buck-boost converter employs PFM/PWM operation with forced PWM option, for
maximum overall efficiency. The switches can be used to support different configurations for the various loads
supported by the TPS65290. For energy harvesting applications, a programmable input voltage monitor is
integrated to allow for connection and disconnection of the different power blocks and switches without the
intervention of the master processor.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated
TPS65290
SLVSBY5A – APRIL 2013 – REVISED MAY 2013
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DESCRIPTION (CONTINUED)
To maximize control flexibility, the TPS65290 includes a factory-selectable choice between SPI and I2C
interfaces. To minimize PC board footprint and reduce bill of materials (BOM) components and cost, the PMIC
internally includes resistive dividers (boost/buck, LDO, VIN monitor); I2C pull-up resistors; SPI pull-down resistors;
boost/buck compensation; and interrupt pull-up resistor. Only low-cost ceramic capacitors and power inductors
are needed to complete a comprehensive multi-rail solution for efficient flow meter, handheld industrial, fitness
and other long-term data-acquisition systems.
ORDERING INFORMATION
DEVICE
TPS65290
with zero bias
IDQQ
with LDOMINI
with buckMINI
2
FEATURES
MARKING
ZERO
LEAK
TPS65290ZB
¥
TPS65290LM
TPS65290BM
LDOMINI
BUCKMINI
SPI
¥
¥
¥
¥
¥
I2C
GPIO
PART NUMBER
TPS65290ZBRHFR
reel of 3000
TPS65290ZBRHFT
reel of 250
TPS65290LMRHFR
reel of 3000
TPS65290LMRHFT
reel of 250
TPS65290BMRHFR
reel of 3000
TPS65290BMRHFT
reel of 250
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SLVSBY5A – APRIL 2013 – REVISED MAY 2013
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
TYPICAL APPLICATION
OUT
VIN
Host
BB_EN
PWR_BB1
Host
BB_OUT
BB_LX2
PGND
INT
BB_LX1
Host
BB_VIN
OUT
PWR_BB2
Host
CE
MISO
VMICRO
CS
Host
TPS65290
SCL/SCK
OUT
AGND
Host
OUT
PWR_LDO2
MOSI/SDA
OUT
OUT
VIN
PWR_LDO1
LDO_OUT
LDO_IN
VMAX
VIN
PWR_VIN
PWR_VMAX
Host
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TPS65290
SLVSBY5A – APRIL 2013 – REVISED MAY 2013
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BB_EN
BB_OUT
PWR_BB1
PGND
BB_LX2
BB_VIN
LDO_OUT
PWR_LDO1
VMAX
LDO_IN
VIN
PWR_VMAX
PWR_VIN
4
BB_LX1
TYPICAL FLOW METER APPLICATION
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FUNCTION BLOCK DIAGRAM
10μF
BB_VIN
100nF
BB_OUT
BB_LX1
3.3μH
10,000uF
BB_LX2
VMICRO
GPIO
33μF
33μF
VIN
DSC
0.1μF
PWR_BB1
0.1Ω BB=4.5V
BB_EN
PWR_BB1
BUCK BOOST (BB)
10MΩ
PWR_AUX1_BB
0.6Ω BB=4.5V
X
VMAX
Y
PWR_VMAX
VMAX
0.1μF
MAX
PWR_BB2
0.6Ω
0.1μF
PWR_BB2
PWR_BB_LDO
1Ω
DSC
1μF
2.2μF
LDO
LDO_OUT
LDO_IN
Buck mini
GPIO
PWR_LDO1
CE
PMIC ENABLE
10MΩ
CHIP_EN*
Deep sleep control
(DSC)
VMICRO
10kΩ
VIN
PWR_LDO2
PWR_MICRO_LDO
0.6Ω VLDO=2.8V
2.5-3.6
3.3μH
Recovery
comparator
CS
100kΩ
SCL/SCK
100kΩ
MOSI/SDA
100kΩ
DSC
LDO_IN
If buck mini is enabled
Do not fit cap
Fit inductor
1μF
VMICRO
Zero Bias
VIN
State Machine
Serial
Interface
SPI/I2C
Low Iqq LDO
PWR_VIN
VIN
MISO
DSC
100kΩ
INT
0.1μF
PWR_LDO2
0.6Ω VLDO=2.8V
VIN
VIN
10kΩ
CHIP_EN
*I2C MODE
HOST
1μF
PWR_LDO1
0.3Ω VLDO=2.8V
VMICRO
PWR_Vin
1Ω VIN=3.6V
1μF
INT MANAGEMENT
*I2C MODE = Factory configured
PGND
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AGND
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TPS65290
SLVSBY5A – APRIL 2013 – REVISED MAY 2013
FUNCTIONALITY
BLOCK
Buck boost
LDO
Zero drop, LDOMINI,
BUCKMINI
BUCKMINI low and high
current mode
MAX
Recovery comparator
Power switches
Interruption
management (INT)
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POWER SAVING OPTIONS
Reg
Bit
Enable
[0]
[0]
Set voltage
[3]
[0,5]
UVLO disable
[3]
[5]
Enable
[0]
[1]
Set voltage
[4]
[0,4]
Set voltage
[2]
[0,3]
Operation Mode
[2]
[5,4]
Latch on turn-off
[3]
[7]
Turn-on options
[6]
[6,7]
Set falling voltage
[6]
[5,3]
Set rising voltage
[6]
[0,2]
Reg
Bit
PFM/PWM mode
[3]
[6]
Low current mode (for standby operation)
[2]
[5,4]
[8]
[0]
See VMAX options section
Enable/Disable
[0]
[2,7]
Enable/disable pull-down
[5]
[1,7]
[7]
[1]
Fast/slow turn-on
[5]
[0]
Enable (PWR_BB_LDO)
[7]
[0]
INT status and masking
[7]
[2,7]
Power switches automatic disable when INT
asserted
[8]
[1,7]
Enable/disable
[4]
[5]
Enable (BB, LDO, BAT, VMAX)
Bandgap
6
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PIN OUT
BB_LX2
17
16
15
14
BB_EN
PGND
18
PWR_BB1
BB_LX1
19
BB_OUT
BB_VIN
RGE PACKAGE
(TOP VIEW)
13
INT
20
12
PWR_BB2
MISO
21
11
CE
CS
22
10
VMICRO
SCL/SCK
23
9
AGND
MOSI/SDA
24
8
PWR_LDO2
RHF 24 PIN
1
2
3
4
5
6
7
PWR_VIN
VIN
PWR_VMAX
VMAX
LDO_IN
LDO_OUT
PWR_LDO1
TERMINAL FUNCTIONS
NAME
NO.
I/O
PWR_VIN
1
O
Power for system output from Vin
DESCRIPTION
VIN
2
I
Battery supply
PWR_VMAX
3
O
Switch Controlled supply connected to VMAX. Decouple with a ceramic capacitor
VMAX
4
O
This pin shows the maximum of VBAT or VBB. Decouple with a 1μF ceramic capacitor
LDO_IN
5
I
LDO input. Decouple this pin with a 2.2μF ceramic capacitor
LDO_OUT
6
O
LDO output. Decouple this pin with a 2μF ceramic capacitor
PWR_LDO1
7
O
Switch Controlled supply connected to LDO output. Decouple with a ceramic capacitor.
PWR_LDO2
8
O
Switch Controlled supply connected to LDO output. Decouple with a ceramic capacitor.
AGND
9
VMICRO
10
CE
11
Analog ground connection. Connect to PGND and power Pad.
O
Microcontroller supply
I
When low the PMIC is in deep sleep and BIAS supply to the micro is enabled. The Interrupt output is
disabled with a pull down termination. When high, the I2C/SPI is active; the internal switches can be
operated, along with the interrupt logic, and Boost/Buck.
PWR_BB2
12
O
Switch Controlled supply connected to BB output. Decouple with a 1μF ceramic capacitor.
BB_EN
13
I
Buck-Boost converter enable pin
PWR_BB1
14
O
Switch Controlled supply connected to BB output. Decouple with a 1μF ceramic capacitor.
BB_OUT
15
O
Buck-Boost converter output
BB_LX2
16
O
Buck-boost Boost converter switching node
PGND
17
Power ground connection. Connect to AGND and power pad.
BB_LX1
18
O
Buck-boost Boost converter switching node
BB_VIN
19
I
Input pin to Buck-Boost converter
INT
20
O
Push-pull output, asserted when low
MISO
21
O
Serial Data Transmit interface (Master Input Slave Output)
CS
22
I
SPI bus Chip Select (active high) when SPI enabled
SCL/ SCK
23
I
Serial Data Clock (SPI and I2C)
MOSI/SDA
24
I
Serial Data Receive interface (Master Output Slave Input) for SPI and I2C
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TPS65290
SLVSBY5A – APRIL 2013 – REVISED MAY 2013
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TERMINAL FUNCTIONS (continued)
NAME
NO.
I/O
POWER PAD
DESCRIPTION
Connect the pad to AGND, PGND and PCB GND. Thermal pad does not have electrical connections to
IC.
OUTPUTS AND OPERATIONAL RANGE
TYPE
VOUT (V)
DEFAULT
IO MAX
(mA)
SET ACCURACY
FEATURES
Buck Boost
1.0-5V, ~200mV steps
4.06V
500
3%
LDO
0.8V for external divider 1.0-4.0V,~
100mV steps
2.8V
150
4%
0.6-2.0V Selective drop from battery
voltage, 8 steps adjustment
Vin-1.4
10
10% at 25°C
1.8-3.3 V 200mV steps
2.2V
10
5%
Low Iqq LDO
1.8-3.3V 200mV steps
2.2V
30
5%
Low Iqq Buck
800
100 m switch
350
600 m switch,
250
600 m switch,
1k pull-down Single P
mosfet
600 m switch,
1k pull-down Single P
mosfet
1k pull-down Single P
mosfet
Low bias supply
Power switches powered
from BB output
Power switches powered
from VMAX
PWR_BB1
Disabled
PWR_BB2
PWR_VMAX
Disabled
PWR_LDO2
Power switches powered
from LDO output
Disabled
PWR_MICRO_LDO
250
NA
No IDQQ
1k pull-down Single P
mosfet
PWR_LDO1
Disabled
250
300 m
Power switch connecting
output of BB to LDO
PWR_BB_LDO
Disabled
250
1.0
1k pull-down Back to back
P mosfets
Power switch powered
from battery
PWR_Vin
Disabled
100
1.0
1k pull-down Single P
mosfet
NA
3%
150
NA
Recovery comparator
MAX (Analog multiplexer)
1.7-2.4V 100mV steps falling edge
2.0V
2.4-3.1V 100mV steps rising edge
2.4V
Highest of BB and LDO
NA
Configurable for turn-on and
turn-off operation
All switches disabled
by interruption
INT (maskable)
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
BB_VIN, BB_OUT, BB_FB, LDO_IN, PWR_BB2. PWR_VMAX
BB_LX1, BB_LX2
–0.3 to 7
V
–1 to 7
V
Any other pin
–0.3 to 5.5
V
AGND, PGND
–0.3 to 0.3
V
TJ
Operating junction temperature range
–40 to 125
°C
TSTG
Storage temperature range
–55 to 150
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
BB_VIN,
VBAT
Input operating voltage BOOST CONVERTER
LDO_VIN
Input operating voltage LDO (VOUT = 2.8V)
TA
Ambient temperature
8
MIN
NOM
MAX
1.8
3.6
5
UNIT
V
3
5
V
–40
125
°C
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ELECTROSTATIC DISCHARGE (ESD) PROTECTION (1)
MIN
Human body model (HBM)
Charge device model (CDM)
(1)
MAX
UNIT
2000
V
500
V
SW_OUT1/2 pins’ human body model (HBM) ESD protection rating 4 kV, and machine model (MM) rating 200V.
DISSIPATION RATINGS
PACKAGE
șJC (°C/W)
șJA (°C/W)
TA = 25°C
Power Rating (W)
TA = 85°C
Power Rating (W)
RHF
29
30.6
3.26
1.30
ELECTRICAL CHARACTERISTICS
TJ = -40°C to 125°C, VBAT = 3.6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT SUPPLY UVLO AND INTERNAL SUPPLY
Input voltage range for all blocks to be
operational
VBAT
IDDQ
2.2
Quiescent current always on blocks
Factory configured
CHIP_EN=0
5
Zero bias mode
100
LDOMINI mode
400
BUCKMINI mode
300
VIN = 3.6V LDO enabled
V
nA
5
VIN = 3.6V, BB enabled VBB_OUT = 4.5V
PFM mode
40
RECOVERY VOLTAGE COMPARATOR
COMPRVLEVEL
Threshold voltage serial interface
selectable
COMPRVACCURACY
Comparator accuracy
Rising VIN 8 steps 0.1V threshold
2.4
3.1
Falling VIN 8 steps 0.1V threshold
1.7
2.4
3
IQQCOMPRV
Buck boost enabled
10
Buck boost disabled
10
V
%
μA
ENABLE PINS (CE, BB_EN)
VH
Enable high
VMICRO = 2.2 TO 2.8V
VL
Enable Low
VMICRO = 2.2 TO 2.8V
1.2
V
0.4
V
5
V
BUCK-BOOST (BB)
Input voltage range
VIN
1.8
Start-up voltage, no load VBB4.5
-40°C TA 85°C
2.5
VINSUSTAIN (1)
The minimum input voltage in which the
buck-boost converter sustains it’s
operation after starting up
-40°C TA 85°C
1.8
DC output accuracy (PWM mode)
TJ = 25°C
VBB
Maximum line regulation
VIN = 3 to 3.6V IOUT = 300mA
0.5
Maximum load regulation
IO = 100 to 500mA
0.5
VINSTART_UP
29 steps 0.1V from 1 to 5V
VBBOUTRANGE
f
Oscillator frequency
DUTYBUCK_MIN
Minimum duty cycle in buck mode
ISW
tSTR_BB
-3
V
V
3
1
%
5
1600
25
V
kHz
30
%
Average high side switch current limit
VIN = 3.6 V, TA = 25°C
2400
mA
High side switch on resistance
VIN = 3.6 V, TA = 25°C
120
m
Low side switch on resistance
VIN = 3.6 V, TA = 25°C
120
m
Startup time
IOUT = 150mA, COUT = 2X 4.7μF, VOUT = 4.0V
500
μs
Input voltage range
Full load operation
LDO
VLDO_IN
VLDO_OUT_RANGE
(1)
32 steps 0.1V from 1 to 4V
2.2
5
V
1
4
V
Specified by design.
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ELECTRICAL CHARACTERISTICS (continued)
TJ = -40°C to 125°C, VBAT = 3.6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
VIN = 3.6V, VOUT = 2.8V, TJ = -40°C to 125°C
ILoad = 5mA
TYP
MAX
UNIT
VLDO_OUT_ACCURACY
DC output accuracy
LDOLINE_REG
Line regulation
3.3V VIN 6V, VOUT = 2.8V, IOUT = 5mA
-1
1
%
LDOLOAD_REG
Load regulation
VIN = 2.2~5V, 0 IOUT 110mA
-2
2
%
VDROOP
Dropout voltage- allow for 5% output
voltage droop
VIN = 3.6~6V, 0 IOUT 150mA
-4
4
300
ICL
Output current limit
VLDO_OUT = 2.8V, output voltage shorted
PSRR
Power-supply rejection ratio 10 kHz
VLDO_OUT = 2.8V, VIN = 3.1V, 150mA loading
tSTRLDO
Startup time, bandgap already enabled
COUT = 2.2μF, VOUT = 2.8V, no load
%
mV
300
mA
28
dB
200
μS
MICRO BIAS CIRCUIT (Different options)
Zero Leak Adjustable Bias (TPS65290ZB)
VIN
Input voltage range
2.2
5
VMICRO_MIN
Minimum output voltage
VBIAS_DROP
Voltage difference between VBAT (pin#4)
and Vmicro
9 200mV drop steps from 0.6 to 2V
0.6
2.0
V
VOUT
DC output accuracy measured by
VBIAS_DROP.
TJ = +25°C, IOUT = 1μA, BAT=3.6V
-10
10
%
ZEROLOAD_REG
Load regulation
IOUT = 100nA-10mA , TJ = +25°C, BAT = 3.6V,
VMICRO[3:0] = 0000
15
%
1.3
V
V
Low IDDQ LDO, aka LDOMINI (TPS65290LM)
Input voltage range
VIN
16 steps 0.2V from 1.8 to 3.3V
VLDO_RANGE
2.2
5
V
1.8
3.3
V
VOUT
DC output accuracy
TJ = +25°C, VIN = 3.6V, IOUT = 1μA
-5
5
%
LDOLOAD_REG
Load regulation
1μA IOUT 10mA
-5
5
%
VDROOP
Dropout voltage– allow for 5% output
voltage drop at VDROOP.
VOUT = 2.2V, IOUT = 10mA
ICL
Output current limit
VLDO_OUT = 2.8V
20
300
mV
50
mA
BUCKMINI Internal Converter Hysteretic (TPS65290BM)
VIN_BM
Input voltage range
ILoad_BM
Output load range
2.2
5
V
0
30
mA
FSW_BM (2)
BuckMINI switching frequency
LBM = 33μH, CBM = 1μF, ESR_CBM = 1ȍ,
No load
5
Hz
IPK_IND (2)
Peak inductor current
TJ = +25°C , LBM = 33μH, CBM = 1μF,
ESR_CBM = 1ȍ, VIN = 3.6V, VOUT = 2.5V,
IOUT = 30mA with high-power mode
80
mA
IPK_IND_STARTUP (2)
Peak inductor current during start up
TJ = +25°C , LBM = 33μH, CBM = 1μF,
ESR_CBM = 1ȍ, VIN = 3.6V, VOUT = 2.5V,
IOUT = 30mA with high-power mode
140
mA
VBM_RIPPLE (2)
Ripple voltage
TJ = +25°C , VIN = 3.6V, VOUT = 2.5V),
LBM = 33μH, CBM = 1μF, ESR_CBM = 1ȍ,
5
PWR_BB1
Distribution switch on resistance from
BB_OUT to pin PWR_BB1 (Single P
Mosfet)
VIN = 3.6 V, VBB = 4.5 V, TA = 25°C
100
m
PWR_VMAX_
VMAX
Distribution switch on resistance from
VMAX to pin PWR_VMAX (Single P
Mosfet)
VIN = 3.6 V, VBB = 4.5 V, TA = 25°C
600
m
PWR_BB2
Distribution switch on resistance from
BB_OUT to pin PWR_BB2 (Single P
Mosfet)
VIN = 3.6 V, VBB = 4.5 V, TA = 25°C
600
m
PWR_LDO1
Distribution switch on resistance from
LDO_OUT to pin PWR_LDO1 (Single P
Mosfet)
VIN = 3.6 V, VLDO = 2.8 V, TA = 25°C
300
m
PWR_LDO2
Distribution switch on resistance from
LDO_OUT to pin PWR_LDO2 (Single P
Mosfet)
VIN = 3.6 V, VLDO = 2.8 V, TA = 25°C
600
m
%
POWER SWITCHES
(2)
10
Specified by design.
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ELECTRICAL CHARACTERISTICS (continued)
TJ = -40°C to 125°C, VBAT = 3.6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
PWR_MICRO_
LDO
Distribution switch on resistance from
LDO_OUT to pin VMICRO (Single P
Mosfet)
VIN = 3.6 V, VLDO = 2.8 V, TA = 25°C
PWR_VIN
Distribution switch on resistance from VIN
to pin PWR_VIN (Single P Mosfet)
PWR_BB_LDO
Distribution switch on resistance (internal
use only) from BB_OUT to LDO_OUT pin
(Back to back P Mosfet)
RPULLDOWN
Pull-down resistance (Connection
selectable by EEPROM bit)
MIN
TYP
MAX
UNIT
600
m
VIN = 3.6 V, TA = 25°C
1000
m
VIN = 3.6 V, VBB = 4.5 V, TA = 25°C
1000
m
1.2
k
LOGIC LEVEL OUTPUTS (INT, MISO)
VOL
VOH
Output level low
Output level high
VMICRO = 2.2 to 2.8V , Iload = 1mA
VMICRO =2.2 to 2.8V , Iload = 1mA
0.4
V
VMICRO 0.4
V
0.67 *
VMICRO
V
LOGIC LEVEL INPUT (CS, MOSI, CLK, SDA SCK )
VH
Input high level
VMICRO = 2.2 to 2.8V
VL
Input low level
VMICRO = 2.2 to 2.8V
VHYS
Input hysteresis
RPULLUP
Pull-up resistor to VMICRO
When I2C mode enabled
10
k
RPULLDOWN
Pull-down resistor to GND
When SPI mode enabled
100
k
TTRIP_BB
141
°C
THYST_BB
12
°C
160
°C
20
°C
0.33 *
VMICRO
10
V
mV
THERMAL SHUT-DOWN FOR BUCK BOOST CIRCUIT
CENTRAL THERMAL SHUTDOWN
TTRIP_IC
Thermal protection trip point
THYST_IC
Thermal protection hysteresis
Rising temperature
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TYPICAL CHARACTERISTICS (BUCK BOOST)
TJ = 25°C (unless otherwise noted)
Figure 1. Buck Boost Startup Waveform with I2C Command
Ch1: BB output. Ch2: I2C SCLK turns on buck-boost, Ch3:
VMICRO. Startup time is 330μs. Buck Boost L and C are per
application circuit.
Figure 2. Buck Boost Startup Waveform with BB_EN Pin
Command
Ch2: BB output. Ch1: BB_EN signal. Ch3: VMICRO. Startup
time is 330μs. Buck Boost L and C are per application
circuit.
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
0
Figure 3. Buck Boost Line Regulation, Boost Mode
50
100
150
200
250 300
Io (mA)
350
400
450
500
Figure 4. Buck Boost Efficiency VIN = 3.6V, VO = 4.5V
90%
100%
80%
90%
80%
70%
70%
60%
60%
50%
50%
40%
40%
30%
30%
20%
20%
10%
10%
0%
0%
0
50
100
150
200
250
Io(mA)
300
350
400
450
Figure 5. Buck Boost Efficiency VIN = 2.5V, VO = 4.5V
12
0
50
100
150
200
250 300
Io(mA)
350
400
450
500
Figure 6. Buck Boost Efficiency VIN = 3.6V, VO = 2.8V
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TYPICAL CHARACTERISTICS (BUCK BOOST) (continued)
TJ = 25°C (unless otherwise noted)
Load Regulation Vin=3.6V, Vo=2.8V PFM mode
Load Regulation Vin=3.6V, Vo=4.5V PFM mode
2.83
4.50
2.82
4.48
2.81
4.46
2.80
2.79
4.44
2.78
4.42
2.77
4.40
2.76
2.75
4.38
0
50
100
150
200
250 300
Io (mA)
350
400
450
500
0
50
100
150
200
250 300
Io (mA)
350
400
450
500
Figure 7. Buck Boost Load Regulation
Figure 8. Buck Boost Load Regulation
Buck Boost Loading 85°C Ambient VBB < 4.5V
Figure 9. Buck Boost Loading
25°C Ambient VBB < 4.5V
Figure 10. Buck Boost Loading
-40°C Ambient VBB < 4.5V
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TYPICAL CHARACTERISTICS (BUCK BOOST) (continued)
TJ = 25°C (unless otherwise noted)
600
Iout(mA)
500
400
300
200
100
0
2.2
2.5
3.0
3.6
4.0
4.5
5.0
Vin(V)
Figure 11. Buck Boost Loading
-10°C Ambient VBB < 4.5V
Figure 12. Buck Boost Loading
25°C Ambient VBB > 4.5V
600
Iout(mA)
600
Iout(mA)
500
400
300
400
200
0
200
100
2.2
2.5
3.0
3.6
4.0
4.5
5.0
loading 200
200
300
400
400
200
500
0
Vin(V)
2.2
2.5
3.0
3.6
4.0
4.5
5.0
Vin(V)
Iout(mA)
Figure 13. Buck Boost Loading
85°C Ambient VBB > 4.5V
Figure 14. Buck Boost Loading
-10°C Ambient VBB > 4.5V
600
500
400
300
200
100
0
2.2
2.5
3.0
3.6
4.0
4.5
5.0
Vin(V)
Figure 15. Buck Boost Loading
-40°C Ambient VBB > 4.5V
14
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TYPICAL CHARACTERISTICS (LDO)
TJ = 25°C (unless otherwise noted)
Figure 16.
Figure 17.
Line Regulation Vo=2.8V, Io=5mA
2.85
2.84
2.83
VLDO(V)
2.82
2.81
2.8
2.79
2.78
2.77
2.76
2.75
3
3.5
4
4.5
5
5.5
6
6.5
Vin(V)
Figure 18.
Figure 19.
Figure 20. LDO Startup Waveform with I2C Command
Ch1: LDO output. Ch 2: I2C SCLK, Ch3: VMICRO, Ch4: VIN
current. Startup time is about 200μs.
Figure 21. LDO Load Transient Response (0 to 150mA)
Ch1: LDO output (10mV/div). Ch4 Load current (20mA/div).
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TYPICAL CHARACTERISTICS (LDO) (continued)
TJ = 25°C (unless otherwise noted)
Figure 22. LDO Input to Output Voltage
Ch1: LDO output. Ch 2: LDO input, Ch3: Ch4: LDO current
Figure 23. LDO PSRR(dB), 10 to 100kHz LDO output = 2.8V,
LDO input = 3.1V, 150mA loading.
Figure 24.
TYPICAL CHARACTERISTICS (LDOMINI)
TJ = 25°C (unless otherwise noted)
Figure 25.
16
Figure 26.
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TYPICAL CHARACTERISTICS (LDOMINI) (continued)
TJ = 25°C (unless otherwise noted)
Figure 27.
Figure 28. LDOMINI Load Transient Response (0 to 10mA)
Ch1: VBAT, Ch3: VMICRO (LDOMINI output) (100mV/div).
Ch4 Load current (10mA/div).
Line Regulation Vo=2.2V, no load
2.255
VMICRO(V)
2.250
2.245
2.240
2.235
2.230
2.225
2.220
3
3.5
4
4.5
5
5.5
6
6.5
Vin(V)
Figure 29. LDOMINI Startup Waveform with VIN Rising
Input battery connected to 27ȍ resistor and 1000μF
capacitor Ch1: VBAT rising. Ch 3: VMICRO (LDOMINI output)
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Figure 30.
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TYPICAL CHARACTERISTICS (ZERO IDQQ)
TJ = 25°C (unless otherwise noted)
18
Figure 31.
Figure 32. ZEROiddq Load Transient Response (0 to 10mA)
Code 4, 1.4V drop. Ch1: VBAT, Ch3: VMICRO (LDOMINI
output) (100mV/div). Ch4 Load current (10mA/div).
Figure 33. ZEROiddq Startup Waveform with VIN Rising
Code 4, 1.4V drop Ch2: VBAT rising. Ch 3: VMICRO
(ZEROIDDQ output)
Figure 34.
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TYPICAL CHARACTERISTICS (BUCKMINI)
TJ = 25°C (unless otherwise noted)
Figure 35. BUCKMINI Efficiency
CO = 1μF, ESR = 1ȍ, L = 33μF Automatic Mode
Figure 36. BUCKMINI Efficiency
CO = 100μF, L = 33μF Automatic Mode
Figure 37. BUCKMINI Transient Response
VIN = 3.6V, VO = 2.5V 0-50mA Step
Figure 38. BUCKMINI Output Ripple
VIN = 3.6V, VO = 2.5V, IO = 50mA
VMICRO(V)
Load Regulation BuckMini Vin=3.6V
2.34
2.32
2.30
2.28
2.26
2.24
2.22
2.20
2.18
2.16
0
10
20
30
40
50
60
Io(mA)
Figure 39. BUCKMINI Output Ripple
VIN = 3.6V, VO = 2.5V, IO = 50mA
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Figure 40. BUCKMINI Output Ripple
VIN = 3.6V, VO = 2.5V, IO = 50mA
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TYPICAL CHARACTERISTICS (BUCKMINI) (continued)
TJ = 25°C (unless otherwise noted)
BUCKmini Output Ripple when Vout=2.5V, Vin=3.6V for
Low- and High-Power Mode
BUCKmini Efficiency
when Vout=2.5V,
Vin=3.6V for
800
100.00%
700
Output Ripple (Vpk-pk) (mV)
Efficiency (%)
600
50.00%
500
400
300
200
100
0
0.00%
1.00E-07
1.00E-07
1.00E-06
1.00E-05
1.00E-04
1.00E-03
1.00E-02
1.00E-06
1.00E-05
1.00E-01
Load Current (A)
Low-Power Mode Vpk-pk
Figure 41.
1.00E-03
1.00E-02
1.00E-01
High-Power Mode Vpk-pk
Figure 42.
BUCKmini Switching
Frequency when
Vout=2.5V, Vin=3.6V for
Low - and High - Power
Buck Mini IDDQ 40°C
1000000
10000
μA
Switching Frequency (Hz)
1.00E-04
Load Current (A)
100
0.5
0.45
0.4
0.35
0.3
0.25
0.2
0.15
0.1
2
3
4
5
Vin
1
1.00E-07 1.00E-06 1.00E-05 1.00E-04 1.00E-03 1.00E-02 1.00E-01
1.8
Load Current (A)
Figure 43.
20
2.2
3.3
Figure 44.
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TYPICAL CHARACTERISTICS (BUCKMINI) (continued)
TJ = 25°C (unless otherwise noted)
Buck Mini IDDQ 85°C
0.5
0.45
0.4
0.35
0.3
0.25
0.2
0.15
0.1
μA
μA
Buck Mini IDDQ 25°C
2
3
4
0.5
0.45
0.4
0.35
0.3
0.25
0.2
0.15
0.1
2
5
3
5
Vin
Vin
1.8
4
2.2
1.8
3.3
Figure 45.
2.2
3.3
Figure 46.
TYPICAL CHARACTERISTICS (VMAX)
TJ = 25°C (unless otherwise noted)
Figure 47. Typical VMAX Waveforms. Rising BB output.
Figure 48. VMAX waveform. Falling BB output. Switch
configured for VMAX = MAX(VBAT,VBBout) when BB output
is disabled.
Figure 49. VMAX waveform. Falling BB output. Switch
configured for VMAX = VBAT when BB output is disabled.
Figure 50. VMAX waveform. Falling BB output. Switch
configured for VMAX = MAX(VBAT,VBBout)-diode when BB
output is disabled. Note: VMAX is not loaded.
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TYPICAL CHARACTERISTICS (VMAX) (continued)
TJ = 25°C (unless otherwise noted)
Figure 51. VMAX waveform. Falling BB output. Switch is configured for VMAX = MAX(VBAT,BBout). The VMAX comparator
turns off automatically when BBout falls below VBAT at BB turn off.
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CHOICE OF TPS65290 VERSION AND SERIAL INTERFACE
Once a voltage higher than 2.2V is applied to the VIN the always on supply will start as per the factory default
setting. This will be the only block available within the device and will always stay on as long as the input supply
does not drop beyond 2.2V.
There are 3 possible choices of always on supply. The main parameter for choice is the “efficiency” of the supply
during sleep mode, mostly processor current.
VIN
BB_OUT
I2C/SPI
Buck boost
EN BB
VMAX
I2C/SPI
GPIO3
I2C/SPI
GPIO3
MAX
PWR_BB1
PWR_VMAX
PWR_BB2
I2C/SPI
GPIO4
VMAX
I2C/SPI
LDO_IN
LDO_OUT
LDO
I2C/SPI
PWR_LDO1
I2C/SPI
GPIO2
CE
I2C/SPI
GPIO2
Zero Leak Adjustable Bias
TPS65290ZB
I2C/SPI
VMICRO
Low IQQ ldo
TPS65290LM
I2C/SPI
Buck Mini
TPS65290BM
I2C/SPI
Vin
I2C/SPI
GPIO1
PWR_LDO2
I2C/SPI
CHIP_EN*
PWR_VIN
INT management
2.5-3.6
INT
Control options
I2C
SPI
GPIO1,2,3,4
Serial Interface
GPIO control
Always on
Figure 52.
Zero Bias set to VIN-1.4
• Takes the least amount of quiescent current
• Provides voltage drops from 0.6 to 2V in 200mV steps
• Is not a regulated output
• Can be programmed to zero drop or to open circuit
• 10mA max
LDOMINI set to 2.2V
• Provides a regulated output
• Can be programmed from 1.8 to 3.3V in 100mV steps
• 10mA max
BUCKMINI set to 2.2V
• Provides a regulated output
• Can be programmed from 1.8 to 3.3V in 100mV steps
• 30mA max
• Output has a ripple content
• Requires additional inductor (0603) and resistor (0402) PWR_AUX2 switch is disabled (pin becomes
switching node)
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The chosen serial interface for the part is SPI as I2C lines are open drain lines with internal 20kȍ pull-up
resistors that guarantees 400kHz operation, but also create power losses when any of the bus lines are low. It is
expected that operation with SPI will produce less average current consumption when compared to I2C. For
I2C/GPIO operation please check with the factory.
FACTORY PROGRAMMED SETTINGS
The following blocks are programmed in the factory.
Buck boost
• Can be enabled or disabled when IC is enabled (can also be enabled with pin 15 high)
• Voltage can be set to
• 1.0 to 3.4V, 200mV steps
• 3.5 to 4.7V, 100mVsteps
• 4.9V, 5.0V
• Forced PWM or PFM (low power mode)
• Input UVLO comparator enabled/disabled. If disabled BB will try to operate with any input voltage higher than
1.8V LDO
• Can be disabled or enabled when IC is enabled
• Output voltage can be set to 1 to 4.0V, 100mV steps
Recovery comparator
• Can be enabled or disabled when IC is enabled
• Falling edge can be set to 1.7 to 2.4V, 100mV. An interruption is generated.
• Rising edge can be set to 2.4 to 3.1V, 100mV. The interruption is released.
Power switches
• Can be enabled or disabled when IC is enabled
• Pull-down resistance can be connected or disconnected when IC is enabled
• Power switches can be disabled when an Interruption is generated
• Switches can be turned on at slow or fast speed
24
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USING THE TPS65290
Power UP and Enabling the IC
There are two ways of enabling the PMIC by setting the CE or BB_EN pins. If CE IS disabled only the always on
blocks (as per default) and pull-down resistors are enabled by default.
VMICRO
BB_EN
GPIO
BUCK-BOOST
10MΩ
VMICRO
CE
GPIO
PMIC ENABLE
10MΩ
Figure 53. Power UP and Enabling the IC
When CE and BB_EN are low the PMIC is in deep sleep and bias supply to the micro is enabled. When high, the
I2C/SPI is active; the internal switches can be operated, along with the interrupt logic, and Boost/Buck. The Buck
boost is enabled either by BB_EN (high) or EN_BB bit (1). BB_EN can be used to enable the buck boost
converter without need of the serial interface.
With the serial interface ACTIVE it is possible to enable, disable AND change settings for the power blocks. All
changes on registers will be kept as long as the input supply is higher than 1.8V. If power is recycled the
registers will be re-loaded with the programmed factory defaults.
Band-Gap Enable (Non EEPROM Setting)
The LDO bandgap is normally disabled to reduce consumption and it is enabled when either of the of LDO,
LDOMINI or BUCKMINI blocks are enabled. However, to speed up the power-up timing of the LDO it can be
enabled in advance (register 4, bit 5)
BUCKMINI operation (Non EEPROM setting)
LDO_VOUT
SWITCH_AUX2
LDO_VIN
AUX2
LDO_VIN
VMICRO
Figure 54.
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BUCKMINI is a hysteretic buck converter that can deliver up to 30mA and therefore can be used beyond the sleep
mode operation of the micro. When using this block is important to keep the following in mind:
• AUX2 output is not available as this pin is used to connect the external inductor required by the converter.
• If VMICRO has a ceramic capacitor, it is recommend to add a small resistor (0.5 to 1ȍ) to guarantee a fixed
ripple value at the output.
• BUCKMINI does not feature a current limit circuit. Overcurrent protection (if needed) needs to be provided
externally.
• When used to support loads between 100μA to 1mA there is trade-off between input quiescent current and
output ripple. It is suggested to use the settings for low and high power mode (Register 2, Bits [5,4]) to
determine which power mode is most suitable for the application. Plots on the characteristics section show
the typical trade-off between efficiency and ripple.
• BUCKMINI starts at automatic power selection mode. If loading higher than 100μA-1mA is required, set the
BUCKMINI setting to (Register 2, Bits [5,4]) [11] to reduce ripple.
• Once the loading is removed, set (Register 2, Bits [5,4]) [10] to reduce power consumption
26
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BUCK-BOOST OPERATION
Inductor Selection
To estimate the inductance of the buck-boost converter the following equations can be used:
L1 = (VIN_MAX - VOUT) x 0.5 x (μs/A)
L2 = VOUT x 0.5 x (μs/A)
(1)
(2)
L1 is used for step down mode operation . VIN is the maximum input voltage. L2 is used for boost mode
operation is calculated. The recommended minimum inductor value is either L1 or L2 whichever is higher. As an
example, a suitable inductor for generating 3.3V from a Li-ion battery with a battery voltage range from 2.5V up
to 4.2V is 2.2μH. The recommended inductor range is between 1.5μH and 4.7μH. In general, this means that at
high voltage conversion rates, higher inductor values offer better performance.
The table below shows the recommended inductance for input and output voltage combinations. The highest
inductance among the region of interest is recommended.
Figure 55. Recommended Inductance for Input and Output Voltage Combination (μH)
With the chosen inductance value, the peak current for the inductor in steady state operation can be calculated.
Equation 3 shows how to calculate the peak current I1 in step down mode operation and Equation 4 show how to
calculate the peak current I2 in boost mode operation.
VOUT (VIN_MAX - VOUT)
IOUT
¾
I1 = ¾
+
0.8
2 · VOUT · f · L
VIN_MIN (VOUT - VIN_MIN)
VOUT · IOUT
¾
I2 = ¾
+
0.8 · VIN_MIN
2 · VOUT · f · L
(3)
(4)
In both equations f is the switching frequency. The critical current value for selecting the right inductor is the
higher value of I1 and I2. It also needs to be taken into account that load transient and error conditions may
cause higher inductor currents. This also needs to be taken into account when selecting an appropriate inductor.
The table below shows the recommended inductor current rating for input and output voltage combinations with
assumption of 1.6MHz switching frequency, 500mA loading, 3.3μH inductance. The highest current rating among
the region of interest is recommended.
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Figure 56. Recommended Inductor Current Rating for Input and Output Voltage Combination with 3.3μH
Inductor, 1.6MHz Switching Frequency and 500mA load (A)
Buck-Boost Input Capacitor Selection
A 10μF ceramic capacitor is recommended to improve transient behavior of the regulator and EMI behavior of
the total power supply circuit. A ceramic capacitor placed as close as possible to the buck-boost input pin and
power ground of the IC is recommended.
Battery Input Pin Capacitor Selection
To make sure that the internal control circuits are supplied with a stable low noise supply voltage, a capacitor can
be connected between VIN and AGND. Using a ceramic capacitor with a value of 0.1μF is recommended. The
value of this capacitor should not be higher than 0. 22μF
Buck-Boost Output Capacitor
For the output capacitor, it is recommended to use small ceramic capacitors placed as close as possible to the
BB_OUT and PGND. If, for any reason, the application requires the use of large capacitors which can not be
placed close to the IC, using a smaller ceramic capacitor in parallel to the large one is recommended. This small
capacitor should be placed as close as possible to the BB_OUT and PGND pins of the IC.
To get an estimate of the recommended minimum output capacitance, the following equation can be used.
(5)
A capacitor with a value in the range of the calculated minimum should be used. There are no additional
requirements regarding minimum ESR. There is also no upper limit for the output capacitor value. Larger
capacitors will cause lower output voltage ripple as well as lower output voltage drop during load transients.
Setting VMAX (Non EEPROM Setting)
The operation of VMAX is not set on EEPROM and the switches inside the block can be programmed for specific
conditions such as diode drops, To connect to VBAT, To follow the maximum voltage with its logic enabled or to
follow the maximum voltage and to connect to VBAT when VBB is lower than VBAT and to disconnect the VMAX
logic. The following table shows the options available.
28
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Table 1. Setting VMAX (Non EEPROM Setting)
REG6_BIT6
REG6_BIT7
REG3_BIT7
VMAXx_DIS
VMAXx_EN
VMAX_LATCH
OPERATION
Enabled when BB
enabled
VBAT
BB_OUT
BB_OUT
VBAT
0
0
0
VMAX switch comparator is enabled when BB is
enabled. When BB is disabled, the switch that
connects VMAX to VBAT is turned on.
X
Y
VMAX
Enabled when BB
enabled
VBAT
BB_OUT
BB_OUT
VBAT
1
0
0
VMAX switch comparator is enabled when BB is
enabled. When BB is disabled, the VMAX
switches are BOTH turned off.
X
VMAX
Y
OFF when BB
disabled
OFF when BB
disabled
Enabled when BB enabled
Disabled when BB_OUT
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