TPS6755IPG4

TPS6755 ADJUSTABLE INVERTING DC/DC CONVERTER SLVS155A – NOVEMBER 1996 REVISED DECEMBER 1996 D D D D D D D D D D 1-W Output (VCC ≥ 4.5 V) 2.7-V to 9-V Input Operating Range 78% Typical Efficiency 160-kHz Fixed-Frequency Current-Mode PWM Controller EN Input Inhibits Operation and Reduces Supply Current to 1 µA Output Voltage Limited to  VO ≤ 12 V– VCC Soft Start 8-Pin SOIC and DIP Packages – 40°C to 85°C Free-Air Temperature Range Pin-for-Pin Compatible with MAX755 D OR P PACKAGE (TOP VIEW) EN REF SS COMP 1 8 2 7 3 6 4 5 VCC OUT GND FB description The TPS6755 is an adjustable inverting dc/dc converter capable of operating from inputs as low as 2.7 V. The only external components required are an inductor, an output filter capacitor, an input filter capacitor, a reference filter capacitor, two resistors, and a Schottky rectifier. An enable input is provided to shut down the inverter when an output voltage is not needed. The typical supply current is 1.9 mA at no-load and is further reduced to 1-µA when the enable input is low. The device features a 160-kHz current-mode pulse-width-modulation (PWM) controller with a p-channel MOSFET power switch. The gate drive uses the converter output to reduce the die area needed to realize the 0.4-Ω MOSFET. Soft start is accomplished with the addition of one small capacitor at SS. A 1.22-V reference is available for external loads up to 125 µA. The TPS6755 is attractive for board-level dc/dc conversion in computer peripherals and in battery-powered equipment requiring high efficiency and low supply current. Available in an 8-pin DIP or an 8-pin SOIC package, the TPS6755 operates over a free-air temperature range of – 40°C to 85°C. VI 2.7 V to 9 V + 47 µF 1 ENABLE 2 10 µF + 3 4 TPS6755 EN VCC REF OUT SS GND COMP FB 8 7 1 µF 1N5817 –5V 6 5 10 µH + 100 µF 10.2 kΩ 82 pF† 42.2 kΩ † Not required for loads of 100 mA or less Figure 1. Typical Circuit Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  1996, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TPS6755 ADJUSTABLE INVERTING DC/DC CONVERTER SLVS155A – NOVEMBER 1996 REVISED DECEMBER 1996 AVAILABLE OPTIONS PACKAGED DEVICES TA SMALL OUTLINE (D) – 40°C to 85°C TPS6755ID CHIP FORM (Y) PLASTIC DIP (P) TPS6755IP TPS6755Y The D package is also available taped and reeled (TPS6755IDR). functional block diagram EN 1 EN EN FB 5 8 CurrentSense Amplifier VCC Overcurrent Comparator Σ x3 Drive Latch COMP GND 4 6 + _ R Error Amplifier REF 2 Driver Q Voltage Reference PWM Comparator S 7 FB 160-kHz Oscillator 1.2 MΩ SS 3 x3 SS Clamp 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Power Switch PMOS OUT TPS6755 ADJUSTABLE INVERTING DC/DC CONVERTER SLVS155A – NOVEMBER 1996 REVISED DECEMBER 1996 chip information These chips, when properly assembled, display characteristics similar to the TPS6755. Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. The chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS 1 8 8 8 (1) (8) (2) (7) EN 2 REF (3) TPS6755Y (6) SS (4) OUT GND (5) COMP 7 82 VCC FB 7 CHIP THICKNESS: 15 TYPICAL 6 BONDING PADS: 4 × 4 MINIMUM TJ max = 150°C TOLERANCES ARE ± 10%. 3 4 5 5 ALL DIMENSIONS ARE IN MILS. 75 Terminal Functions TERMINAL NAME DESCRIPTION NO. EN 1 Enable. EN > 2 V turns on the TPS6755. EN ≤ 0.4 V turns it off. REF 2 1.22-V reference voltage output. REF can source 125 µA for external loads. SS 3 Soft start. A capacitor between SS and GND brings the output voltage up slowly. COMP 4 Compensation. A capacitor to ground stabilizes the feedback loop. FB 5 Feedback. FB connects to the dc/dc converter output. GND 6 Ground OUT 7 Power MOSFET drain connection VCC 8 Supply-voltage input POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TPS6755 ADJUSTABLE INVERTING DC/DC CONVERTER SLVS155A – NOVEMBER 1996 REVISED DECEMBER 1996 detailed description The following descriptions refer to the functional block diagram. current-sense amplifier The current-sense amplifier, which has a fixed gain of 3, amplifies the slope-compensated current-sense voltage (a summation of the voltage on the current-sense resistor and the oscillator ramp) and feeds it to the PWM comparator. driver latch The latch, which consists of a set/reset flip-flop and associated logic, controls the state of the power switch by turning the driver on and off. A high output from the latch turns the switch on; a low output turns it off. In normal operation the flip-flop is set high during the clock pulse, but gating keeps the latch output low until the clock pulse is over. The latch is reset when the PWM comparator output goes high. enable (EN) A logic low on EN puts the TPS6755 in shutdown mode. In shutdown, the output power switch, voltage reference, and other functions shut off and the supply current is reduced to 10 µA maximum. The soft-start capacitor is discharged through a 1.2-MΩ resistance and the output falls to zero volts. error amplifier The error amplifier is a high-gain differential amplifier used to regulate the converter output voltage. The amplifier generates an error signal, which is fed to the PWM comparator, by comparing a sample of the output voltage to the reference and amplifying the difference. The output sample is obtained from a resistive divider connected between FB and REF. FB is connected externally to the converter output, and the divider output is connected to the error-amplifier input. An 82-pF capacitor connected between COMP and GND is required to stabilize the control loop for loads greater than 100 mA. oscillator and ramp generator The oscillator circuit provides a 160-kHz clock to set the converter operating frequency, and a timing ramp for slope compensation. The clock waveform is a pulse, a few hundred nanoseconds in duration, that is used to limit the maximum power switch duty cycle to 95%. The timing ramp is summed with the current-sense signal at the input to the current-sense amplifier. overcurrent comparator The overcurrent comparator monitors the current in the power switch. The comparator trips and initiates a soft-start cycle if the power-switch current exceeds 2 A peak. power switch The power switch is a 0.4-Ω p-channel MOSFET with current sensing. The drain is connected to OUT and the source is connected to a current-sense resistor. The voltage across the resistor is proportional to current in the power switch and is tied to the overcurrent comparator and the current-sense amplifier. In normal operation, the power switch is turned on at the start of each clock cycle and turned off when the PWM comparator resets the drive latch. PWM comparator The comparator resets the drive latch and turns off the power switch whenever the slope-compensated current-sense signal from the current-sense amplifier exceeds the error signal. reference The 1.22-V reference is brought out on REF and can source 125-µA maximum to external loads. A 10-µF capacitor connected between REF and GND is recommended to minimize noise pickup. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS6755 ADJUSTABLE INVERTING DC/DC CONVERTER SLVS155A – NOVEMBER 1996 REVISED DECEMBER 1996 SS clamp The SS clamp circuit limits the signal level on error-amplifier output during start-up. The voltage on SS is amplified and used to override the error-amplifier output until the error-amplifier voltage rises above that output, at which point the error amplifier takes over. This prevents the input to the PWM comparator from exceeding its common-mode range (i.e., error amplifier output too high to be reached by the current ramp) by limiting the maximum voltage on the error-amplifier output during start-up. Soft start causes the output voltage to increase to the regulation point at the controlled rate. The voltage on the charging soft-start capacitor gradually raises the clamp on the error amplifier output voltage, limiting surge currents at power up by increasing the current limit threshold on a cycle-by-cycle basis. A soft-start cycle is initiated when either the enable (EN) signal is switched high or an overcurrent fault condition triggers the discharge of the soft-start capacitor. DISSIPATION RATING TABLE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING D 725 mW 5.8 mW/°C 464 mW 377 mW P 1175 mW 9.4 mW/°C 752 mW 611 mW PACKAGE absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Pin voltages: VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 9 V OUT to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.5 V FB (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V SS, COMP, EN voltage range (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VCC +0.3 V Peak switch current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 A Reference current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperture range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C Lead temperature 1,6mm (1/16 inch) from case for 10 s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to network terminal ground. recommended operating conditions MIN Supply voltage NOM 2.7 MAX 9 UNIT V 1 µF Input capacitor 47 µF Reference capacitor 10 µF Decoupling capacitor 100 µF Compensation capacitor 82 pF Inductor 10 µH Output capacitor POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TPS6755 ADJUSTABLE INVERTING DC/DC CONVERTER SLVS155A – NOVEMBER 1996 REVISED DECEMBER 1996 electrical characteristics over recommended operating free-air temperature range, VCC = 5 V, IO = 0, EN = 5 V, typical values are at TA = 25°C (unless otherwise noted) (refer to Figure 15) PARAMETER TEST CONDITION MIN Supply current TYP MAX 1.9 Standby current EN = 0.4 V 1 High-level input threshold voltage, EN Low-level input threshold voltage, EN 0.4 Input current, EN –1 Impedance, COMP Oscillator frequency IO(ref) ≤ 125 µA Reference voltage UNIT mA 10 µA 2 V V 1 µA 7.5 kΩ 160 kHz 1.22 V Reference drift 50 ppm/°C On resistance, OUT 0.4 Ω Leakage current, OUT 20 nA Startup voltage 2.7 V performance characteristics over recommended operating free-air temperature range, typical values at TA = 25°C (unless otherwise noted) (refer to Figure 15) PARAMETER Output voltage TEST CONDITION MIN TYP MAX UNIT VCC = 4 V to 7 V IO = 0 mA to 200 mA –4.75 –5 –5.25 V Load current VCC = 2.7 V VCC = 4 V Line regulation VCC = 4.5 V VCC = 4 V Load regulation IO = 25 mA to 200 mA IO =100 mA Efficiency 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 125 175 200 270 0.4% 0.4% 78% mA TPS6755 ADJUSTABLE INVERTING DC/DC CONVERTER SLVS155A – NOVEMBER 1996 REVISED DECEMBER 1996 APPLICATION INFORMATION 5 0 –5 VI = 5 V VO = – 5 V IO = 100 mA 1 0.5 0 I – Inductor Current – A Voltage at OUT – V typical system waveforms 2.5 µs/div t – Time – s VI = 5 V VO = – 5 V IO = 100 mA 0 – 50 1 0.5 0 I – Inductor Current – A VO – Output Voltage – mV Figure 2. Switching Waveforms 2.5 µs/div t – Time – s Figure 3. Output Voltage Ripple POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TPS6755 ADJUSTABLE INVERTING DC/DC CONVERTER SLVS155A – NOVEMBER 1996 REVISED DECEMBER 1996 APPLICATION INFORMATION 0.2 0.1 0 50 0 –50 5 ms/div Output Voltage Ripple – mV I L – Load Current – A VI = 5 V VO = – 5 V IO = 0 mA to 200 mA t – Time – s Figure 4. Load Transient Response VI = 4 V to 7 V VO = – 5 V IO = 100 mA 6 4 20 2 0 0 – 20 500 µs/div t – Time – s Figure 5. Line Transient Response 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Output Voltage Ripple – mV VI – Input Voltage – V 8 TPS6755 ADJUSTABLE INVERTING DC/DC CONVERTER SLVS155A – NOVEMBER 1996 REVISED DECEMBER 1996 APPLICATION INFORMATION 4 2 0 0 –2 –4 –6 VO – Output Voltage – V Voltage at EN – V 6 VI = 5 V VO = –5 V IO = 100 mA 2.5 ms/div t – Time – s Figure 6. Enable Response Time system typical characteristics EFFICIENCY vs LOAD CURRENT PEAK INDUCTOR CURRENT vs LOAD CURRENT 80 1.6 79 TA = 25°C (see Figure 15) 1.4 VI =7 V 1.2 Efficiency – % 77 76 VI = 5 V 75 74 VI =2.7 V 73 Peak Inductor Current – A 78 1 0.8 0.6 0.4 72 0.2 71 70 0 25 50 75 100 125 150 175 200 225 250 275 300 IL – Load Current – mA 0 50 200 100 150 IL – Load Current – mA 250 300 Figure 8 Figure 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TPS6755 ADJUSTABLE INVERTING DC/DC CONVERTER SLVS155A – NOVEMBER 1996 REVISED DECEMBER 1996 APPLICATION INFORMATION NO-LOAD SUPPLY CURRENT vs SUPPLY VOLTAGE 400 2 IO = 0 A (see Figure 15) 1.8 (see Figure 15) 1.6 Maximum Load Current – mA No-Load Supply Current – mA MAXIMUM LOAD CURRENT vs SUPPLY VOLTAGE 1.4 1.2 1 0.8 0.6 0.4 350 300 250 200 0.2 0 150 0 1 2 3 4 5 Supply Voltage – V 6 2 7 2.5 4.5 5 5.5 6 6.5 7 SWITCH CURRENT LIMIT vs SOFT-START VOLTAGE 175 1.8 VI = 2.7 V VI =7 V 1.6 VI = 5 V VI = 5 V 1.4 Switch Current Limit – A f osc – Oscillator Frequency – kHz 4 Figure 10 OSCILLATOR FREQUENCY vs TEMPERATURE 165 VCC = 7 V 160 155 150 1.2 VI = 2.7 V 1 0.8 0.6 0.4 145 140 –40 –20 R1 and R2 Varied (see Figure 15) 0.2 0 20 40 60 80 100 120 140 0 0 T – Temperature – °C 200 400 600 800 Soft-Start Voltage – mV Figure 12 Figure 11 10 3.5 Supply Voltage – V Figure 9 170 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1000 1200 TPS6755 ADJUSTABLE INVERTING DC/DC CONVERTER SLVS155A – NOVEMBER 1996 REVISED DECEMBER 1996 APPLICATION INFORMATION SOFT-START DELAY vs CAPACITANCE DRAIN-SOURCE ON-STATE RESISTANCE vs TEMPERATURE C6 varied (see Figure 7) 80 r DS(on) – Drain-Source On-State Resistance – Ω 90 VI = 2.7 V Soft-Start Delay – ms 70 60 50 40 VI = 7 V 30 VI = 5 V 20 10 0 0 0.2 0.4 0.6 0.8 1 1.2 C – Capacitance – µF 1.4 1.6 0.7 0.6 VI = 2.7 V 0.5 VI = 7 V 0.4 VI = 5 V 0.3 0.2 0.1 0 –40 –20 0 20 40 60 80 100 120 140 T – Temperature – °C Figure 14 Figure 13 The TPS6755 operates in the voltage-inverting circuit, shown in Figure 15, which can generate an output. The circuit is ideal for applications that require a negative polarity voltage on the output with respect to the input ground, and for energy management systems. The TPS6755 can be placed in a shutdown mode (1-µA quiescent current) by forcing EN low. soft start The soft-start capacitor provides an orderly start-up of the converter by slowly increasing the switch current limit during power-up. The soft-start timing is controlled by the SS capacitance (see Figure 13 for the capacitance value corresponding to the desired delay time). The switch current limit is proportional to the voltage applied to SS, which is internally pulled to REF by a 1.2-MΩ resistor. SS can be externally pulled lower than REF to limit the switch current. A UVLO condition or an overcurrent condition initiates an SS cycle by discharging the SS capacitor to ground through an internal transistor. A minimum of a 10-nF capacitor must be connected to SS to current limit correctly. inductor selection The standard 10-µH inductor required by the TPS6755 must have a saturation current greater than the peak switch current at the desired maximum load. Operation over the full voltage range and current range is assured by the 10-µH inductor. To determine the required inductor staturation level, refer to the typical operating characteristics graph for peak inductor current versus load current (see Figure 8). POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TPS6755 ADJUSTABLE INVERTING DC/DC CONVERTER SLVS155A – NOVEMBER 1996 REVISED DECEMBER 1996 APPLICATION INFORMATION output filter capacitor A low equivalent series resistance (ESR) output filter capacitor is necessary to minimize the output-ripple voltage. An ESR of 100 mΩ limits the output ripple to 90 mV or less for output loads up to 200 mA. rectifier A Schottky diode or high-speed silicon rectifier should be used with a maximum continuous current rating of 1 A for operation up to full load. output ripple filtering A low-pass filter may be added to the converter output to reduce the output voltage ripple (see Figure 15). The LC filter has a cutoff frequency of 7.2 kHz. The inductor filter must have a low resistance to avoid large output voltage drops. The output voltage ripple is reduced to 5 mV when the LC output filter is used. FB must be connected to the output node before the connection for the low-pass filter. adjustable output voltage The output voltage of the TPS6755 is limited to VO ≤ 12 V – VCC and is set by two external resistors, R4 and R5 (see Figure 15). R5 can be set to any value between 10 kΩ to 20 kΩ, and R4 is calculated using the following formula: R4 = VO R5/1.22 V. These resistors form a voltage divider between FB, COMP, and REF. The converter adjusts the output such that COMP level is at GND. printed circuit board layout A ground plane is recommended in a printed circuit board (PCB) layout to ensure quiet operation. Attention should be given to minimizing the lengths of the switching loops. Bypass capacitors should be placed as close to the TPS6755 as possible to prevent instability and noise pickup. VCC and GND should be bypassed directly with a 1-µF ceramic capacitor and a large bypass capacitor (e.g. 47 µF) to maximize noise immunity. The TPS6755 should not be used with IC sockets, wire-wrap prototype boards, or other constructions that are susceptible to noise pick-up. 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS6755 ADJUSTABLE INVERTING DC/DC CONVERTER SLVS155A – NOVEMBER 1996 REVISED DECEMBER 1996 APPLICATION INFORMATION Optional Low-Pass Output Filter VI 22 µH + C1 47 µF R3 10 kΩ TPS6755ID 1 EN 8 VCC VO C5 1 µF ENABLE 2 R1 130 kΩ 3 R5 R2 300 kΩ C6 0.1 µF REF SS 7 OUT L1 10 µH 6 GND 4 COMP 22 µF + D1 1N5817 1 A, 20 V C2 + 100 µF/10 V 5 FB + C4 82 pF C3 10 µF R4 (kΩ) R5 (kΩ) VO (V) –5 42.2 10.2 –2 16.7 10.2 –9 75.2 10.2 R4 Figure 15. Application Circuit Table 1. Bill of Materials QTY REF DES DESCRIPTION MANUFACTURER PART NO. MANUFACTURER 1 IC Power supply U1 TPS6755ID Texas Instruments 1 Diode Schottky D1 1N5817GI General Instrument 1 Inductor 10 µH L1 DO1608C-103 CD54-100 Coilcraft, Sumida 1 Capacitor 47 µF tantalum 16 V 7343 C1 593D476X9016D2W TPSD476K016R0100 Sprague, AVX 1 Capacitor 100 µF tantalum 10 V 7343 C2 593D107X9010D2W TPSD107D016R0100 Sprague, AVX 1 Capacitor 10 µF tantalum 10 V 3528 C3 293D106X0010B2W 267E 1002 106 Sprague, MATSUO 1 Capacitor 82 pF ceramic 50 V 0805 C4 1 Capacitor 1 µF ceramic 16 V 1206 C5 1 Capacitor 0.1 µF ceramic 50 V 0805 C6 1 Resistor 130 kΩ 0805 R1 1 Resistor 300 kΩ 0805 R2 1 Resistor 10 kΩ 0805 R3 1 Resistor 42.2 kΩ 1% 0805 R4 1 Resistor 10.2 kΩ 1% 0805 R5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 TPS6755 ADJUSTABLE INVERTING DC/DC CONVERTER SLVS155A – NOVEMBER 1996 REVISED DECEMBER 1996 MECHANICAL DATA D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PIN SHOWN PINS ** 0.050 (1,27) 8 14 16 A MAX 0.197 (5,00) 0.344 (8,75) 0.394 (10,00) A MIN 0.189 (4,80) 0.337 (8,55) 0.386 (9,80) DIM 0.020 (0,51) 0.014 (0,35) 14 0.010 (0,25) M 8 0.244 (6,20) 0.228 (5,80) 0.008 (0,20) NOM 0.157 (4,00) 0.150 (3,81) 1 Gage Plane 7 A 0.010 (0,25) 0°– 8° 0.044 (1,12) 0.016 (0,40) Seating Plane 0.069 (1,75) MAX 0.010 (0,25) 0.004 (0,10) 0.004 (0,10) 4040047 / B 03/95 NOTES: A. B. C. D. E. 14 All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). Four center pins are connected to die mount pad. Falls within JEDEC MS-012 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS6755 ADJUSTABLE INVERTING DC/DC CONVERTER SLVS155A – NOVEMBER 1996 REVISED DECEMBER 1996 MECHANICAL DATA P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0°– 15° 0.010 (0,25) M 0.010 (0,25) NOM 4040082 / B 03/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TPS6755ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 6755I Samples TPS6755IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 6755I Samples TPS6755IP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type TPS6755IP Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of