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TPS767
SLVS208J – MAY 1999 – REVISED AUGUST 2015
TPS767xxQ Fast-Transient-Response 1-A Low-Dropout Linear Regulators
1 Features
2 Description
•
•
This device is designed to have a fast transient
response and be stable with 10 µF low ESR
capacitors.
This
combination
provides
high
performance at a reasonable cost.
1
•
•
•
•
•
•
•
1 A Low-Dropout Voltage Regulator
Available in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3.0V, 3.3-V, 5.0-V Fixed Output and Adjustable
Versions
Dropout Voltage Down to 230 mV at 1 A
(TPS76750)
Ultralow 85 µA Typical Quiescent Current
Fast Transient Response
2% Tolerance Over Specified Conditions for
Fixed-Output Versions
Open Drain Power-On Reset With 200-ms Delay
(See TPS768xx for PG Option)
8-Pin SOIC and 20-Pin TSSOP PowerPAD™
(PWP) Package
Thermal Shutdown Protection
Because the PMOS device behaves as a low-value
resistor, the dropout voltage is very low (typically
230 mV at an output current of 1 A for the TPS76750)
and is directly proportional to the output current.
Additionally, since the PMOS pass element is a
voltage-driven device, the quiescent current is very
low and independent of output loading (typically
85 µA over the full range of output current, 0 mA to
1 A). These two key specifications yield a significant
improvement in operating life for battery-powered
systems. This LDO family also features a sleep
mode; applying a TTL high signal to EN (enable)
shuts down the regulator, reducing the quiescent
current to 1 µA at TJ = 25°C.
Device Information(1)
PART NUMBER
TPS767xx
PACKAGE
BODY SIZE (NOM)
SOIC (8)
4.90 mm × 3.91 mm
HTSSOP (20)
6.50 mm x 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
TPS76733 Dropout Voltage vs Free-air
Temperature
102
I O − Output Current − A
101
IO = 10 mA
100
10−1
IO = 0
Co = 10 μF
10−2
−60 −40 −20
0
20
40
60
∆ VO − Change in
Output Voltage − mV
IO = 1 A
VDO − Dropout Voltage − mV
TPS76733 Load Transient Response
100
103
80 100 120 140
TA − Free-Air Temperature − °C
50
0
−50
1
0.5
0
0
100 200 300 400 500 600 700 800 900 1000
t − Time − μs
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS767
SLVS208J – MAY 1999 – REVISED AUGUST 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
9
Features ..................................................................
Description .............................................................
Revision History.....................................................
Description (Continued) ........................................
Device Options.......................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
2
3
3
4
5
7.1
7.2
7.3
7.4
7.5
7.6
5
5
5
5
6
8
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Parameter Measurement Information ................ 12
Detailed Description ............................................ 13
9.1 Overview ................................................................. 13
9.2
9.3
9.4
9.5
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
Programming ..........................................................
13
14
15
15
10 Application and Implementation........................ 16
10.1 Application Information.......................................... 16
10.2 Typical Application ............................................... 16
11 Layout................................................................... 18
11.1 Power Dissipation and Junction Temperature ...... 18
12 Device and Documentation Support ................. 19
12.1
12.2
12.3
12.4
12.5
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
19
19
19
19
19
13 Mechanical, Packaging, and Orderable
Information ........................................................... 19
3 Revision History
Changes from Revision I (January 2004) to Revision J
•
2
Page
Added ESD Ratings table, Overview section, Feature Description section, Device Functional Modes, Application
and Implementation section, Device and Documentation Support section, and Mechanical, Packaging, and
Orderable Information section. .............................................................................................................................................. 1
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Copyright © 1999–2015, Texas Instruments Incorporated
TPS767
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SLVS208J – MAY 1999 – REVISED AUGUST 2015
4 Description (Continued)
The RESET output of the TPS767xx initiates a reset in microcomputer and microprocessor systems in the event
of an undervoltage condition. An internal comparator in the TPS767xx monitors the output voltage of the
regulator to detect an undervoltage condition on the regulated output voltage.
The TPS767xx is offered in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3.0-V, 3.3-V, and 5.0-V fixed-voltage versions and
in an adjustable version (programmable over the range of 1.5 V to 5.5 V). Output voltage tolerance is specified
as a maximum of 2% over line, load, and temperature ranges. The TPS767xx family is available in 8-pin SOIC
and 20-pin PWP packages.
5 Device Options
PART NO.
(1)
VOLTAGE OPTIONS
(V)
(1)
TSSOP
(PWP)
SOIC
(D)
TPS76750Q
TPS76750Q
5
TPS76733Q
TPS76733Q
3.3
TPS76730Q
TPS76730Q
3
TPS76728Q
TPS76728Q
2.8
TPS76727Q
TPS76727Q
2.7
TPS76725Q
TPS76725Q
2.5
TPS76718Q
TPS76718Q
1.8
TPS76715Q
TPS76715Q
1.5
TPS76701Q
TPS76701Q
Adjustable 1.5 V to 5.5 V
TYP
The TPS76701 is programmable using an external resistor divider (see application information). The D and PWP packages are available
taped and reeled. Add an R suffix to the device type (e.g., TPS76701QDR).
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TPS767
SLVS208J – MAY 1999 – REVISED AUGUST 2015
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6 Pin Configuration and Functions
PWP Package
20 Pin HTSSOP
Top View
GND/HSINK
GND/HSINK
GND
NC
EN
IN
IN
NC
GND/HSINK
GND/HSINK
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
GND/HSINK
GND/HSINK
NC
NC
RESET
FB/NC
OUT
OUT
GND/HSINK
GND/HSINK
NC − No internal connection
D Package
8 Pin SOIC
Top View
GND
EN
IN
IN
1
8
2
7
3
6
4
5
RESET
FB/NC
OUT
OUT
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
SOIC PACKAGE
EN
2
I
Enable input
FB/NC
7
I
Feedback input voltage for adjustable device (no connect for fixed options)
GND
1
Regulator ground
IN
3, 4
I
Input voltage
OUT
5, 6
O
Regulated output voltage
8
O
RESET output
EN
5
I
Enable input
FB/NC
15
I
Feedback input voltage for adjustable device (no connect for fixed options)
GND
3
Regulator ground
1, 2, 9, 10, 11, 12, 19, 20
Ground/heatsink
RESET
HTSSOP PACKAGE
GND/HSINK
IN
6, 7
NC
4, 8, 17, 18
OUT
RESET
4
I
Input voltage
No connect
13, 14
O
Regulated output voltage
16
O
RESET output
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TPS767
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
VI
(1)
MIN
MAX
UNIT
Input voltage range (2)
–0.3
13.5
V
Voltage range at EN
–0.3
VI + 0.3
V
Maximum RESET voltage
16.5
Peak output current
VO
Internally limited
Output voltage (OUT, FB)
Continuous total power dissipation
7
V
See Thermal Information
TJ
Operating junction temperature range
–40
125
°C
Tstg
Storage temperature range
−65
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network terminal ground.
(2)
7.2 ESD Ratings
V(ESD)
(1)
Electrostatic
discharge
VALUE
UNIT
2000
V
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VI (1)
Input voltage
2.7
10
V
VO
Output voltage range
1.2
5.5
V
IO
(2)
TJ (2)
(1)
(2)
Output current
Operating junction temperature
UNIT
0
1.0
A
–40
125
°C
Maximum VIN = VOUT + VDO or 2.7V, whichever is greater.
Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the
device operate under conditions beyond those specified in this table for extended periods of time.
7.4 Thermal Information
TPS767xxQ
THERMAL METRIC (1)
PWP (HTSSOP)
D (SOIC)
(20 PINS)
(8 PINS)
UNIT
RθJA
Junction-to-ambient thermal resistance
35.8
106.9
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
26.1
52.5
°C/W
RθJB
Junction-to-board thermal resistance
8.7
47.7
°C/W
ψJT
Junction-to-top characterization parameter
0.4
9.0
°C/W
ψJB
Junction-to-board characterization parameter
8.6
47.1
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
2.6
n/a
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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7.5 Electrical Characteristics
VI = VO(typ) + 1 V, IO = 1 mA, EN = 0 V, Co = 10 µF (over recommended operating free-air temperature range, unless
otherwise noted)
PARAMETER
TEST CONDITIONS
TPS76701
TPS76715
TPS76718
TPS76725
Output voltage
(10 µA to 1 A load)
TPS76727
TPS76728
TPS76730
TPS76733
TPS76750
Quiescent current (GND current) EN = 0V
Output voltage line regulation (∆VO/VO)
1.5 V ≤ VO ≤ 5.5 V,
TJ = 25°C
1.5 V ≤ VO ≤ 5.5 V,
TJ = −40°C to 125°C
TJ = 25°C,
2.7 V < VIN < 10 V
TJ = −40°C to 125°C,
2.7 V < VIN < 10 V
TJ = 25°C,
2.8 V < VIN < 10 V
TJ = −40°C to 125°C,
2.8 V < VIN < 10 V
TJ = 25°C,
3.5 V < VIN < 10 V
TJ = −40°C to 125°C,
3.5 V < VIN < 10 V
TJ = 25°C,
3.7 V < VIN < 10 V
TJ = −40°C to 125°C,
3.7 V < VIN < 10 V
TJ = 25°C,
3.8 V < VIN < 10 V
TJ = −40°C to 125°C,
3.8 V < VIN < 10 V
TJ = 25°C,
4.0 V < VIN < 10 V
TJ = −40°C to 125°C,
4.0 V < VIN < 10 V
TJ = 25°C,
4.3 V < VIN < 10 V
TJ = −40°C to 125°C,
4.3 V < VIN < 10 V
TJ = 25°C,
6.0 V < VIN < 10 V
TJ = −40°C to 125°C,
6.0 V < VIN < 10 V
10 µA < IO < 1 A,
TJ = 25°C
IO = 1 A,
TJ = −40°C to 125°C
VO + 1 V < VI ≤ 10 V,
TJ = 25°C
MIN
Output noise voltage
TPS76718
Output current limit
0.98VO
FB input current
1.5
1.530
1.8
1.7646
1.836
2.5
2.450
2.550
2.7
2.646
2.754
2.8
2.7446
2.856
3
2.9400
3.060
3.2346
4.900
125
1.2
TJ = 25°C, 2.7 V < VI < 10 V
EN = VI,
TJ = −40°C to 125°C,
2.7 V < VI < 10 V
Reset
VO decreasing
Hysteresis voltage
Measured at VO
Output low voltage
VI = 2.7 V,
Leakage current
V(RESET) = 5 V
6
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V
TJ = 25°C
µA
mV
55
µVrms
1.7
2
A
150
°C
1
µA
2
µA
nA
V
60
V
dB
1.1
92
98
0.5
IO(RESET) = 1 mA
0.15
0.4
1
RESET time-out delay
Input current (EN)
V
%/V
0.9
Trip threshold voltage
V
3
1.7
IO(RESET) = 300 μA
V
0.01
10
FB = 1.5 V
Minimum input voltage for valid
RESET
V
5.100
85
EN = VI,
f = 1 kHz, Co = 10 µF,
V
3.366
Low level enable input voltage
Power supply ripple rejection
V
5
IC = 1 A,
TJ = 25°C
High level enable input voltage
UNIT
3.3
VO = 0 V
TPS76701
1.02VO
1.470
Thermal shutdown junction temperature
Standby current
MAX
VO
Load regulation
BW = 200 Hz to 100 kHz,
Co = 10 µF,
TYP
200
EN = 0 V
–1
EN = VI
–1
0
1
1
µA
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Electrical Characteristics (continued)
VI = VO(typ) + 1 V, IO = 1 mA, EN = 0 V, Co = 10 µF (over recommended operating free-air temperature range, unless
otherwise noted)
PARAMETER
Dropout voltage
(1)
TEST CONDITIONS
TPS76728
IO = 1 A
TPS76730
IO = 1 A
TPS76733
IO = 1 A
TPS76750
IO = 1 A
MIN
TJ = 25°C
TYP
MAX
TJ = −40°C to 125°C
825
TJ = 25°C
450
TJ = −40°C to 125°C
(1)
UNIT
500
675
TJ = 25°C
350
TJ = −40°C to 125°C
575
TJ = 25°C
230
TJ = −40°C to 125°C
380
mV
mV
mV
mV
IN voltage equals VO(typ) − 100 mV; TPS76701 output voltage set to 3.3 V nominal with external resistor divider. TPS76715, TPS76718,
TPS76725, and TPS76727 dropout voltage limited by input voltage range limitations (i.e., TPS76730 input voltage needs to drop to 2.9
V for purpose of this test).
VI
Vres(1)
Vres
t
VO
VIT+(2)
VIT+(2)
Threshold
Voltage
VIT−(2)
Less than 5% of the
output voltage
VIT−(2)
t
RESET
Output
200 ms
Delay
200 ms
Delay
Output
Undefined
Output
Undefined
t
Figure 1. Timing Diagram
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7.6 Typical Characteristics
Table 1. Table of Graphs
FIGURE
vs Output current
Figure 2, Figure 3, Figure 4
vs Free-air temperature
Figure 5, Figure 6, Figure 7
Ground current
vs Free-air temperature
Figure 8, Figure 9
Power supply ripple rejection
vs Frequency
Figure 10
Output spectral noise density
vs Frequency
Figure 11
Input voltage (min)
vs Output voltage
Figure 12
Zo
Output impedance
vs Frequency
Figure 13
VDO
Dropout voltage
vs Free-air temperature
VO
Figure 15, Figure 16
Load transient response
Figure 17, Figure 18
Output voltage
vs Time
Dropout voltage
vs Input voltage
Equivalent series resistance (ESR) (1)
vs Output current
Figure 19
Figure 20
Figure 21–Figure 24
Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added
externally, and PWB trace resistance to Co.
3.2835
1.4985
3.2830
1.4980
3.2825
1.4975
1.4970
3.2820
1.4965
3.2815
1.4960
3.2810
1.4955
3.2805
1.4950
3.2800
0
VI = 4.3 V
0.1
0.2 0.3 0.4 0.5 0.6 0.7 0.8
IO − Output Current − A
0.9
1
TA = 25°C
Figure 2. TPS76733 Output Voltage vs Output Current
8
Figure 14
Line transient response
VO − Output Voltage − V
(1)
Output voltage
VO − Output Voltage − V
VO
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0
0.1
0.2 0.3
0.4
0.5
0.6 0.7
0.8
0.9
1
IO − Output Current − A
VI = 2.7 V
TA = 25°C
Figure 3. TPS76715 Output Voltage vs Output Current
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2.4960
3.32
2.4955
3.31
VO − Output Voltage − V
VO − Output Voltage − V
2.4950
2.4945
2.4940
2.4935
2.4930
3.30
3.29
IO = 1 A
3.27
3.26
2.4925
2.4920
0
0.1 0.2 0.3
0.4 0.5
0.6 0.7
0.8 0.9
3.25
−60 −40 −20
1
IO − Output Current − A
VI = 3.5 V
0
20
40
60
80
100 120 140
TA − Free-Air Temperature − °C
TA = 25°C
VI = 4.3 V
Figure 4. TPS76725 Output Voltage vs Output Current
Figure 5. TPS76733 Output Voltage vs Free-Air Temperature
1.515
2.515
2.510
VO − Output Voltage − V
1.510
VO − Output Voltage − V
IO = 1 mA
3.28
1.505
1.500
IO = 1 A
IO = 1 mA
1.495
1.490
2.505
2.500
IO = 1 A
2.495
IO = 1 mA
2.490
2.485
1.485
−60 −40 −20
0
20
40
60
80
2.480
−60 −40
100 120 140
TA − Free-Air Temperature − °C
VI = 2.7 V
−20
0
20
40
60
80
100 120
TA − Free-Air Temperature − °C
VI = 3.5 V
Figure 6. TPS76715 Output Voltage vs Free-Air Temperature
Figure 7. TPS767125 Output Voltage vs Free-Air
Temperature
100
92
90
95
86
84
82
IO = 1 mA
80
IO = 1 A
78
IO = 500 mA
76
Ground Current − μ A
Ground Current − μ A
88
90
IO = 1 A
IO = 1 mA
85
IO = 500 mA
80
74
72
−60 −40 −20
0
20
40
60
80
100 120 140
75
−60 −40 −20
0
20
40
60
80
100 120 140
TA − Free-Air Temperature − °C
TA − Free-Air Temperature − °C
VI = 4.3 V
VI = 2.7 V
Figure 8. TPS76733 Ground Current vs Free-Air
Temperature
Figure 9. TPS76715 Ground Current vs Free-Air
Temperature
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10−5
PSRR − Power Supply Ripple Rejection − dB
90
Output Spectral Noise Density − µV Hz
80
60
50
40
30
20
10
0
−10
10
100
1k
10k
100k
IO = 7 mA
10−6
IO = 1 A
10−7
10−8
102
1M
103
f − Frequency − Hz
VI = 4.3 V
IO = 1 A
Co = 10 µF
TA = 25°C
VI = 4.3 V
Figure 10. TPS76733 Power Supply Ripple Rejection vs
Frequency
TA = 25°C
TA = 125°C
3
TA = −40°C
2.7
1.75
2
2.25
2.5
3
2.75
3.25
IO = 1 mA
10−1
IO = 1 A
10−2
101
3.5
IO = 1 A
102
103
104
f − Frequency − kHz
VI = 4.3 V
103
IO = 1 A
102
101
∆ VO − Change in
Output Voltage − mV
IO = 10 mA
100
10−1
IO = 0
10−2
−60 −40 −20
0
20
40
60
80 100 120 140
Figure 14. TPS76733 Dropout Voltage vs Free-Air
Temperature
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106
Co = 10 µF
TA = 25°C
3.7
2.7
10
0
−10
0
20
TA − Free-Air Temperature − °C
CO = 10 µF
105
Figure 13. TPS76733 Output Impedance vs Frequency
VI − Input Voltage − V
Figure 12. Input Voltage (MIN) vs Output Voltage
VDO − Dropout Voltage − mV
TA = 25°C
0
Zo − Output Impedance − Ω
VI − Input Voltage (Min) − V
Co = 10 µF
VO − Output Voltage − V
10
105
Figure 11. TPS76733 Output Spectral Noise Density vs
Frequency
4
2
1.5
104
f − Frequency − Hz
CO = 10 µF
40
60
80 100 120 140 160 180 200
t − Time − μs
TA = 25°C
Figure 15. TPS76715 Line Transient Response
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VI − Input Voltage − V
∆ VO − Change in
Output Voltage − mV
100
50
0
−50
4.3
∆ VO − Change in
Output Voltage − mV
I O − Output Current − A
−100
1
0.5
0
0
−10
0
20
40
60
80 100 120 140 160 180 200
t − Time − μs
TA = 25°C
Figure 17. TPS76733 Line Transient Response
4
VO− Output Voltage − V
100
50
0
−50
3
2
1
−100
0
1
Enable Pulse − V
∆ VO − Change in
Output Voltage − mV
0
CO = 10 µF
TA = 25°C
Figure 16. TPS76715 Load Transient Response
I O − Output Current − A
10
100 200 300 400 500 600 700 800 900 1000
t − Time − μs
CO = 10 µF
0.5
0
0
0
100 200 300 400 500 600 700 800 900 1000
t − Time − μs
CO = 10 µF
0
0.1
0.2 0.3
0.4 0.5 0.6 0.7 0.8
t − Time − ms
CO = 10 µF
TA = 25°C
Figure 18. TPS76733 Load Transient Response
0.9
1
IO = 1 A
TA = 25°C
Figure 19. TJPS7633 Output Voltage vs Time (At Startup)
900
ESR − Equivalent Series Resistance − Ω
10
800
VDO − Dropout Voltage − mV
5.3
700
600
500
TA = 25°C
400
TA = 125°C
300
200
TA = −40°C
Region of Instability
1
Region of Stability
100
0
0.1
2.5
3
4
3.5
VI − Input Voltage − V
4.5
5
IO = 1 A
Figure 20. TPS76701 Dropout Voltage vs Input Voltage
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0
200
400
600
800
1000
IO − Output Current − mA
VO = 3.3 V
VI = 4.3 A
Co = 4.7 µF
TA = 25°C
Figure 21. Typical Region of Stability
Equivalent Series Resistance vs Output Current
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10
ESR − Equivalent Series Resistance − Ω
ESR − Equivalent Series Resistance − Ω
10
Region of Instability
1
Region of Stability
0.1
Region of Instability
1
Region of Stability
0.1
0
200
400
600
800
1000
0
200
IO − Output Current − mA
VO = 3.3 V
VI = 4.3 A
400
600
800
1000
IO − Output Current − mA
Co = 4.7 µF
TA = 125°C
VO = 3.3 V
VI = 4.3 A
Figure 22. Typical Region of Stability
Equivalent Series Resistance vs Output Current
Co = 22 µF
TA = 25°C
Figure 23. Typical Region of Stability
Equivalent Series Resistance vs Output Current
ESR − Equivalent Series Resistance − Ω
10
Region of Instability
1
Region of Stability
0.1
0
200
400
600
800
1000
IO − Output Current − mA
VO = 3.3 V
VI = 4.3 A
Co = 22 µF
TA = 125°C
Figure 24. Typical Region of Stability
Equivalent Series Resistance vs Output Current
8 Parameter Measurement Information
VI
To Load
IN
OUT
+
EN
Co
GND
RL
ESR
Figure 25. Test Circuit for Typical Regions of Stability (Figure 21 through Figure 24) (Fixed Output
Options)
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9 Detailed Description
9.1 Overview
The TPS767xx features very low quiescent current, which remains virtually constant even with varying loads.
Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the
load current through the regulator (IB = IC/β). The TPS767xx uses a PMOS transistor to pass current; because
the gate of the PMOS is voltage driven, operating current is low and invariable over the full load range.
Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into
dropout. The resulting drop in β forces an increase in IB to maintain the load. During power up, this translates to
large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems, it
means rapid battery discharge when the voltage decays below the minimum required for regulation. The
TPS767xx quiescent current remains low even when the regulator drops out, eliminating both problems.
The TPS767xx family also features a shutdown mode that places the output in the high-impedance state
(essentially equal to the feedback-divider resistance) and reduces quiescent current to 2 µA. If the shutdown
feature is not used, EN should be tied to ground.
9.2 Functional Block Diagram
IN
EN
RESET
_
+
OUT
+
_
R1
200 ms Delay
Vref = 1.1834 V
FB/NC
R2
GND
External to the device
Figure 26. Adjustable Version
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Functional Block Diagram (continued)
IN
EN
RESET
_
+
OUT
+
_
200 ms Delay
R1
Vref = 1.1834 V
R2
GND
Figure 27. Fixed-Voltage Version
9.3 Feature Description
9.3.1 FB—Pin Connection (adjustable version only)
The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option . The output
voltage is sensed through a resistor divider network to close the loop as shown in Figure 28. Normally, this
connection should be as short as possible; however, the connection can be made near a critical circuit to
improve performance at that point. Internally, FB connects to a high-impedance wide-bandwidth amplifier and
noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup is
essential.
9.3.2 Reset Indicator
The TPS767xx features a RESET output that can be used to monitor the status of the regulator. The internal
comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal
regulated value, the RESET output transistor turns on, taking the signal low. The open-drain output requires a
pullup resistor. If not used, it can be left floating. RESET can be used to drive power-on reset circuitry or as a
low-battery indicator. RESET does not assert itself when the regulated output voltage falls outside the specified
2% tolerance, but instead reports an output voltage low relative to its nominal regulated value (refer to Figure 1
timing diagram for start-up sequence).
9.3.3 Regulator Protection
The TPS767xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be
appropriate.
The TPS767xx also features internal current limiting and thermal protection. During normal operation, the
TPS767xx limits output current to approximately 1.7 A. When current limiting engages, the output voltage scales
back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device
failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the
device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below
130°C(typ), regulator operation resumes.
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9.4 Device Functional Modes
9.4.1 Minimum Load Requirements
The TPS767xx family is stable even at zero load; no minimum load is required for operation.
9.5 Programming
9.5.1 Programming the TPS76701 Adjustable LDO Regulator
The output voltage of the TPS76701 adjustable regulator is programmed using an external resistor divider as
shown in Figure 28. The output voltage is calculated using:
R1 ö
æ
VO = Vref ´ ç 1 +
÷
R2
è
ø
(1)
Where: f = 1.1834 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be
used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage
currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 30.1 kΩ
to set the divider current at 50 µA and then calculate R1 using:
æ V
ö
R1 = ç O - 1÷ ´ R2
è Vref
ø
(2)
OUTPUT VOLTAGE
PROGRAMMING GUIDE
TPS76701
VI
IN
RESET
Reset Output
0.1 μF
250 kΩ
≥1.7 V
EN
OUT
≤0.9 V
VO
R1
FB / NC
GND
Co
OUTPUT
VOLTAGE
R1
R2
UNIT
2.5 V
33.2
30.1
kΩ
3.3 V
53.6
30.1
kΩ
3.6 V
61.9
30.1
kΩ
4.75 V
90.8
30.1
kΩ
R2
Figure 28. TPS76701 Adjustable LDO Regulator Programming
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The TPS767xx family includes eight fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 3.0 V, 3.3
V, and 5.0 V), and an adjustable regulator, the TPS76701 (adjustable from 1.5 V to 5.5 V).
10.1.1 External Capacitor Requirements
An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improves
load transient response and noise rejection if the TPS767xx is located more than a few inches from the power
supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load
transients with fast rise times are anticipated.
Like all low dropout regulators, the TPS767xx requires an output capacitor connected between OUT and GND to
stabilize the internal control loop. The minimum recommended capacitance value is 10 µF and the ESR
(equivalent series resistance) must be between 50 mΩ and 1.5 Ω. Capacitor values 10 µF or larger are
acceptable, provided the ESR is less than 1.5 Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayer
ceramic capacitors are all suitable, provided they meet the requirements described above. Most of the
commercially available 10 µF surface-mount ceramic capacitors, including devices from Sprague and Kemet,
meet the ESR requirements stated above.
10.2 Typical Application
TPS767xx
6
16
IN
VI
RESET
RESET
7
250 kΩ
IN
C1
0.1μF
OUT
5
14
VO
13
EN
OUT
GND
+
Co
10 μF
3
Figure 29. Typical Application Circuit (Fixed Versions)
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Typical Application (continued)
TPS767xx
VI
6
IN
RESET
16
RESET
7
IN
OUT
0.1 μF
5
EN
OUT
14
VO
13
+
GND
Co(1)
10 μF
3
(1) See application information section for capacitor selection details.
Figure 30. Typical Application Configuration (For Fixed Output Options)
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11 Layout
11.1 Power Dissipation and Junction Temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the
regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or
equal to PD(max).
The maximum-power-dissipation limit is determined using the following equation:
T max - TA
PD(max) = J
RqJA
(3)
Where:
TJmax is the maximum allowable junction temperature.
RθJA is the thermal resistance junction-to-ambient for the package, i.e., 172°C/W for the 8-terminal SOIC and
RθJA 32.6°C/W for the 20-terminal PWP with no airflow.
TA is the ambient temperature.
The regulator dissipation is calculated using:
PD = (VI - VO )´ IO
(4)
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the
thermal protection circuit.
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12 Device and Documentation Support
12.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 2. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPS76715
Click here
Click here
Click here
Click here
Click here
TPS76718
Click here
Click here
Click here
Click here
Click here
TPS76725
Click here
Click here
Click here
Click here
Click here
TPS76727
Click here
Click here
Click here
Click here
Click here
TPS76728
Click here
Click here
Click here
Click here
Click here
TPS76730
Click here
Click here
Click here
Click here
Click here
TPS76733
Click here
Click here
Click here
Click here
Click here
TPS76750
Click here
Click here
Click here
Click here
Click here
TPS76701
Click here
Click here
Click here
Click here
Click here
12.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 Trademarks
PowerPAD, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 1999–2015, Texas Instruments Incorporated
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PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TPS76701QD
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
76701
Samples
TPS76701QDR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
76701
Samples
TPS76701QPWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76701
Samples
TPS76701QPWPG4
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76701
Samples
TPS76701QPWPR
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76701
Samples
TPS76701QPWPRG4
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76701
Samples
TPS76715QD
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
76715
Samples
TPS76715QDR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
76715
Samples
TPS76715QPWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76715
Samples
TPS76718QD
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
76718
Samples
TPS76718QDR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
76718
X
Samples
TPS76718QPWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76718
Samples
TPS76718QPWPR
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76718
Samples
TPS76725QD
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
76725
Samples
TPS76725QPWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76725
Samples
TPS76725QPWPG4
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76725
Samples
TPS76725QPWPR
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76725
Samples
TPS76727QD
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
76727
Samples
TPS76727QPWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76727
Samples
TPS76728QD
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
76728
Samples
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TPS76730QD
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
76730
Samples
TPS76730QPWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76730
Samples
TPS76730QPWPG4
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76730
Samples
TPS76730QPWPR
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76730
Samples
TPS76733QD
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
76733
Samples
TPS76733QDR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
76733
Samples
TPS76733QPWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76733
Samples
TPS76733QPWPG4
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76733
Samples
TPS76733QPWPR
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76733
Samples
TPS76733QPWPRG4
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76733
Samples
TPS76750QD
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
76750
Samples
TPS76750QDR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
76750
Samples
TPS76750QPWP
ACTIVE
HTSSOP
PWP
20
70
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76750
Samples
TPS76750QPWPR
ACTIVE
HTSSOP
PWP
20
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
PT76750
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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