TPS79850QDGNRQ1

Product Folder Sample & Buy Support & Community Tools & Software Technical Documents TPS79801-Q1, TPS79850-Q1 SLVS822E – MARCH 2009 – REVISED SEPTEMBER 2015 TPS798xx-Q1 50 mA, 3 V to 50 V, Micropower, Low-Dropout Linear Regulator 1 Features 3 Description • • • • • • • • • • The TPS798xx-Q1 is the first device in a line of 50-V high-voltage micropower low-dropout (LDO) linear regulators. This device is capable of supplying 50-mA output current with a dropout voltage of only 300 mV. Designed for low quiescent current high voltage (50 V) applications, 40 μA operating and 1 μA in shutdown makes the TPS798xx-Q1 an ideal choice for battery-powered or high-voltage systems. Quiescent current is also well-controlled in dropout. 1 • • • • Qualified for Automotive Applications Wide Input Voltage Range: 3 V to 50 V Low Quiescent Current: 40 μA (Typical) Low Dropout Voltage: 300 mV (Typical) Output Current: 50 mA No Input Protection Diodes Needed Adjustable Output From 1.275 V to 28 V 1-μA Quiescent Current in Shutdown Stable With 1-μF Output Capacitor Stable With Aluminum, Tantalum, or Ceramic Capacitors Reverse Input-Battery Protection Reverse Output Current Flow Protection Thermal Limiting Available in an 8-Pin MSOP-PowerPAD IC Package Other features of the TPS798xx-Q1 include the ability to operate with low equivalent series resistance (ESR) ceramic output capacitors. This device is stable with only 1 μF on the output; most older devices require from 10-μF to 100-μF tantalum capacitors for stability. Small ceramic capacitors can be used without the necessary addition of ESR, as is common with other regulators. Internal protection circuitry includes reverse input-battery protection, reverse output current protection, current limiting, and thermal limiting to protect the device in various fault conditions. 2 Applications • • • • This device is available in a fixed output voltage of 5 V (TPS79850) and with an adjustable output voltage with a 1.275-V reference voltage (TPS79801). The TPS798xx-Q1 regulator is available in a 8-pin MSOPPowerPAD (DGN) package with an exposed pad for enhanced thermal management capability. Low-Current, High-Voltage Regulators Regulators for Battery-Powered Systems Telecom Automotives Device Information(1) PART NUMBER PACKAGE TPS79801-Q1 TPS79850-Q1 MSOP-PowerPAD (8) BODY SIZE (NOM) 3.00 mm × 3.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic VOUT OUT IN R2 VIN C1 TPS79801 EN FB GND R1 VOUT = 1.275 V (1 + R2 / R1) + IFBR2 VFB = 1.275 V IFB = 0.2 µA at 25°C Output Range = 1.275 V to 28 V 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS79801-Q1, TPS79850-Q1 SLVS822E – MARCH 2009 – REVISED SEPTEMBER 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 3 6.1 6.2 6.3 6.4 6.5 6.6 6.7 3 3 4 4 5 6 7 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Dissipation Ratings .................................................. Typical Characteristics .............................................. Detailed Description .............................................. 9 7.1 Overview ................................................................... 9 7.2 Functional Block Diagram ......................................... 9 7.3 Feature Description................................................. 10 7.4 Device Functional Modes........................................ 12 8 Application and Implementation ........................ 13 8.1 Application Information............................................ 13 8.2 Typical Application ................................................. 13 9 Power Supply Recommendations...................... 15 9.1 Thermal Considerations .......................................... 15 10 Layout................................................................... 15 10.1 Layout Guidelines ................................................. 15 10.2 Layout Example .................................................... 15 10.3 Thermal Considerations ........................................ 15 11 Device and Documentation Support ................. 17 11.1 11.2 11.3 11.4 11.5 Related Links ........................................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 17 17 17 17 17 12 Mechanical, Packaging, and Orderable Information ........................................................... 17 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision D (August 2011) to Revision E • 2 Page Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: TPS79801-Q1 TPS79850-Q1 TPS79801-Q1, TPS79850-Q1 www.ti.com SLVS822E – MARCH 2009 – REVISED SEPTEMBER 2015 5 Pin Configuration and Functions DGN Package 8-Pin MSOP With PowerPAD™ Top View OUT SENSE/FB NC GND 1 2 3 4 8 7 6 5 IN NC NC EN The exposed thermal pad is connected to ground through pin 4 (GND). Pin Functions PIN NAME NO. I/O DESCRIPTION EN 5 I Enable pin. Driving the EN pin high turns on the regulator over full operating range. Driving this pin low puts the regulator into shutdown mode over full operating range. IN 8 I Input pin. TI recommends a 0.1-μF ceramic or greater capacitor from this pin to ground to assure stability. Both input and output capacitor grounds should be tied back to the IC ground with no significant impedance between them. GND 4 O Ground. The exposed thermal pad is connected to ground through this pin. OUT 1 O Regulated output voltage pin. A small (1 μF) capacitor is needed from this pin to ground to assure stability. SENSE/FB 2 I This pin is the input to the control loop error amplifier; it is used to set the output voltage of the device. 3, 6, 7 — NC No internal connection 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT (2) –65 60 V OUT –0.3 28 V FB –0.3 7 V EN (2) –65 60 V IN VIN Input voltage range Enable to IN differential TJ Junction temperature range (3) Tstg Storage temperature (1) (2) (3) 0.6 VIN V –40 125 °C –65 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Transient: 500 ms for VIN > 50 V The junction temperature must not exceed 125ºC. See Figure 1 to determine the maximum ambient operating temperature versus the supply voltage and load current. The safe operating area curves assume a 50ºC/W thermal impedance and may need to be adjusted to match actual system thermal performance. 6.2 ESD Ratings VALUE V(ESD) (1) Electrostatic discharge Human body model (HBM), per AEC Q100-002 (1) ±2000 Charged device model (CDM), per AEC Q100-011 ±1000 UNIT V AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification. Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: TPS79801-Q1 TPS79850-Q1 Submit Documentation Feedback 3 TPS79801-Q1, TPS79850-Q1 SLVS822E – MARCH 2009 – REVISED SEPTEMBER 2015 www.ti.com 6.3 Recommended Operating Conditions VIN Input voltage IOUT Output current TJ Operating junction temperature (1) TA Ambient free-air temperature (1) (2) (3) MIN MAX IN –65 50 OUT –0.3 28 FB –0.3 7 EN –65 50 50 mA –40 125 °C –40 105 °C (2) (3) UNIT V Operating conditions are limited by maximum junction temperature. The regulated output voltage specification does not apply for all possible combinations of input voltage and output current. When operating at maximum input voltage, the output current range must be limited. When operating at maximum output current, the input voltage range must be limited. The TPS798xx-Q1 is specified to meet performance specifications from –40°C to 125°C operating junction temperature. Specifications over the full operating junction temperature range are specified by design, characterization, and correlation with statistical process controls. This device includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature exceeds 125°C (minimum) when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. 6.4 Thermal Information TPS79801-Q1, TPS79850-Q1 THERMAL METRIC (1) DGN (MSOP-PowerPAD) UNIT 8 PINS Junction-to-ambient thermal resistance (JEDEC 51-5 (2)) 57.1 °C/W Junction-to-ambient thermal resistance (JEDEC 51-7 (3)) 130 °C/W RθJC(top) Junction-to-case (top) thermal resistance 50.3 °C/W RθJB Junction-to-board thermal resistance 30.6 °C/W ψJT Junction-to-top characterization parameter 1.5 °C/W ψJB Junction-to-board characterization parameter 30.3 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 6.5 °C/W RθJA (1) (2) (3) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. The thermal data is based on using JEDEC 51-5. The copper pad is soldered to the thermal land pattern and using 5 by 8 thermal array (vias). Correct attachment procedure must be incorporated. The thermal data is based on using JEDEC 51-7. The copper pad is soldered to the thermal land. No thermal vias. Correct attachment procedure must be incorporated. Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: TPS79801-Q1 TPS79850-Q1 TPS79801-Q1, TPS79850-Q1 www.ti.com SLVS822E – MARCH 2009 – REVISED SEPTEMBER 2015 6.5 Electrical Characteristics VIN = VOUT(NOM) + 1 V or 4 V (whichever is greater for either fixed or adjustable versions), ILOAD = 1 mA, VEN = 3 V, COUT = CIN = 2.2 μF (unless otherwise noted). For TPS79801, FB pin tied to VOUT. Typical values are at TJ = 25°C. PARAMETER VIN Fixed VOUT Adjustable VOUT ΔVOUT/ΔVIN TEST CONDITIONS Minimum input voltage ILOAD = 50 mA Initial output voltage accuracy VIN = VOUT nom + 0.5 V Output voltage accuracy over line, load, and full temperature range VIN = VOUT nom + 1 V to 50 V, ILOAD = 1 mA to 50 mA Initial output voltage accuracy VIN = 3 V Output voltage accuracy over line, load, and full temperature range VIN = 4 V to 50 V, ILOAD = 1 mA to 50 mA Line regulation, adjustable VOUT ΔVIN = 3 V to 50 V Line regulation, TPS79850 VIN = VOUT nom + 0.5 V to 50 V Load regulation, adjustable VOUT ΔILOAD = 1 mA to 50 mA Load regulation, fixed VOUT ΔILOAD = 1 mA to 50 mA Output voltage range (2) 25°C (3) Dropout voltage (4) (5) TYP MAX 3 4 Full range –3% 3% 25°C 1.256 1.275 1.294 V Full range 1.237 1.275 1.313 V Full range 13 mV 15 mV 25°C 20 Full range 32 25°C 50 Full range 90 1.275 25°C 28 85 Full range Full range ILOAD = 50 mA, VIN = VOUT(NOM) – 0.1 V Full range mV V 190 25°C ILOAD = 10 mA, VIN = VOUT(NOM) – 0.1 V mV 150 170 260 350 25°C 300 mV 370 550 ILOAD = 0 mA Full range 30 80 ILOAD = 1 mA Full range 100 180 ILOAD = 10 mA Full range 400 700 ILOAD = 50 mA Full range 1.8 3.3 25°C 100 25°C 0.05 VIN = VOUT(NOM) VN Output voltage noise COUT = 10 μF, ILOAD = 50 mA, BW = 10 Hz to 100 kHz, VIN = 4.3 V, VOUT = 3.3 V (adjustable used) IFB FB pin bias current (7) VIN = 3 V EN pin high (enabled) (8) OFF to ON, VIN = 6 V Full range EN pin low (shutdown) (8) ON to OFF, VIN = 6 V 25°C 0.4 V EN pin low (shutdown) (8) ON to OFF, VIN = 6 V Full range 0.2 V VEN = 0 V VIN = 6 V, ILOAD = 0 mA Full range 0.4 2 VEN = 3 V, VIN = 6 V, ILOAD = 0 mA Full range 0.4 0.5 Full range 3 25 25°C 65 VEN V 1.5% GND pin current (6) IGND UNIT –1.5% Full range VIN = VOUT(NOM) – 0.1 V VDO MIN Full range ΔVOUT/ΔIOUT Adjustable VOUT TJ (1) μA mA μVRMS 0.2 μA 1.5 V V V IEN EN pin current (8) Ishutdown GND pin current (6) VIN = 6 V, VEN = 0 V, ILOAD = 0 mA Power-supply rejection ratio VIN = 4.3 V, VOUT 3.3-V VRIPPLE = 0.5 VPP, fRIPPLE = 120 Hz, ILOAD = 50 mA Fixed current limit (9) ΔVOUT = VOUT(NOM) – 0.1 V Full range 60 200 mA Adjustable current limit ΔVOUT = VOUT(NOM) – 0.1 V Full range 60 200 mA PSRR ILIMIT (1) (2) (3) (4) (5) (6) (7) (8) (9) μA μA dB Full range TJ = –40°C to 125°C This parameter is tested and specified under pulse load conditions such that TJ = TA. This device is 100% production tested at TA = 25°C. Performance at full range is specified by design, characterization, bench to ATE correlation testing, and other statistical process controls. This device is limited by a maximum junction temperature of TJ = 125°C. The regulated output voltage specification cannot be applied to all combinations of various VIN, VOUT, ambient temperature, and IOUT conditions. When operating with large voltage differentials across the device, the output load must be limited so as not to violate the maximum junction temperature for a given ambient temperature. In the adjustable version test, the output uses an external voltage divider. This resistor voltage divider is made up of R1 = 215 kΩ and R2 (bottom resistor) = 340 kΩ. This configuration preloads the output with 6 μA. By definition, dropout voltage is the minimum input voltage needed to maintain a given output voltage at a specific load current. For dropout testing, minimum VIN = VOUT(NOM) × 0.96. This specification ensures that the device is in dropout and takes into account the output voltage tolerance over the full temperature range. Ground pin current is tested with VIN = VOUT(NOM) or 3 V, whichever is greater. FB pin current flows into the FB pin. EN pin current flows into the EN pin. Current limit is tested with VIN = VOUT(NOM) + 0.5 V or 3 V, whichever is greater. VOUT is forced to VOUT(NOM) – 0.1 V and the output current is measured. Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: TPS79801-Q1 TPS79850-Q1 Submit Documentation Feedback 5 TPS79801-Q1, TPS79850-Q1 SLVS822E – MARCH 2009 – REVISED SEPTEMBER 2015 www.ti.com Electrical Characteristics (continued) VIN = VOUT(NOM) + 1 V or 4 V (whichever is greater for either fixed or adjustable versions), ILOAD = 1 mA, VEN = 3 V, COUT = CIN = 2.2 μF (unless otherwise noted). For TPS79801, FB pin tied to VOUT. Typical values are at TJ = 25°C. PARAMETER Input reverse leakage current(reverse battery test) IRL TJ (1) TEST CONDITIONS VIN = –60 V, VOUT = open, CIN open (10) IRO Reverse output current TSD Thermal shutdown temperature (TJ) (11) MIN TYP Full range VOUT = VOUT(NOM), VIN = ground 25°C 19 Shutdown, temperature increasing 135 Reset, temperature decreasing 135 MAX UNIT 6 mA 25 μA °C (10) Reverse output current is tested with the IN pin tied to ground and the output forced to VOUT(NOM) +0.1 V. This current flows into the OUT pin and out of the GND pin and then measured. (11) Specified by design 120 DC O pe ra t io n IOUT = 5 m A 100 TA – Temperature – °C T ra ns ie nt (