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TPS92691QPWPTQ1

TPS92691QPWPTQ1

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    TSSOP16

  • 描述:

    IC LED DRIVER 16HTSSOP

  • 数据手册
  • 价格&库存
TPS92691QPWPTQ1 数据手册
Sample & Buy Product Folder Support & Community Tools & Software Technical Documents TPS92691, TPS92691-Q1 SLVSD68 – DECEMBER 2015 TPS92691/-Q1 Multi-Topology LED Driver With Rail-to-Rail Current Sense Amplifier 1 Features 3 Description • • • The TPS92691/-Q1 is a versatile LED controller that can support a range of step-up or step-down driver topologies. The device implements a fixed-frequency peak current mode control technique with programmable switching frequency, slope compensation, and soft-start timing. It incorporates a high voltage (65-V) rail-to-rail current sense amplifier that can directly measure LED current using either a high-side or a low-side series sense resistor. The amplifier is designed to achieve low input offset voltage and attain better than ±3% LED current accuracy over junction temperature range of 25°C to 140°C and output common-mode voltage range of 0 to 60 V. Wide Input Voltage: 4.5 V to 65 V Wide Output Voltage Range: 2 V to 65 V Low Input Offset Rail-to-Rail Current Sense Amplifier – Better than ±3% LED Current Accuracy over 25°C to 140°C Junction Temperature Range – Compatible With High-Side and Low-Side Current Sense Implementations High-Impedance Analog LED Current Adjust Input (IADJ) With over 15:1 Contrast Ratio Over 1000:1 Series FET PWM Dimming Ratio With Integrated Series N-Channel Dim Driver Interface Continuous LED Current Monitor Output for System Fault Detection and Diagnoses Programmable Switching Frequency With External Clock Synchronization Capability Programmable Soft-Start and Slope Compensation Comprehensive Fault Protection Circuitry Including VCC Undervoltage Lockout (UVLO), Output Overvoltage Protection (OVP), Cycle-byCycle Switch Current Limit, and Thermal Protection TPS92691-Q1: Automotive Q100 Grade 1 Qualified 1 • • • • • • • LED current can be independently modulated using either analog or PWM dimming techniques. Linear analog dimming response with 15:1 range is obtained by varying the voltage from 140 mV to 2.25 V across the high impedance analog adjust (IADJ) input. PWM dimming of LED current is achieved by modulating the PWM input pin with the desired duty cycle and frequency. Optional DDRV gate driver output can be used to enable series FET dimming functionality to get over 1000:1 contrast ratio. The TPS92691/-Q1 supports continuous LED status check through the current monitor (IMON) output. This allows for LED short circuit or open circuit detection and protection. Additional fault protection features include VCC UVLO, output OVP, switch cycle-by-cycle current limit, and thermal protection. 2 Applications • Device Information(1) PART NUMBER TPS92691-Q1: Automotive Exterior Lighting Applications Architectural and General Lighting Applications • PACKAGE TPS92691-Q1 TPS92691 HTSSOP (16) BODY SIZE (NOM) 5.10 mm × 6.60 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical Boost LED Driver Application Schematic D CIN CVCC CSS 1 2 RT 3 VPWM 4 5 CCOMP RADJ1 6 7 CIMON 8 VIN SS RT/SYNC PWM COMP IADJ Q1 VCC GATE IS PGND OVP DDRV IMON CSP AGND PAD CSN Efficiency vs Output Voltage 100 LED+ VO = 60 V, ILED = 300 mA ROV2 TPS92691-Q1 RADJ2 RCS COUT 95 16 15 ROV1 14 13 12 11 10 RIS COV Q2 LEDÅ Efficiency (%) VIN L 90 85 9 80 75 8 9 10 11 12 13 14 VIN (V) 15 16 17 18 D019 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS92691, TPS92691-Q1 SLVSD68 – DECEMBER 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 5 5 7 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. 7.4 Device Functional Modes........................................ 16 8 Application and Implementation ........................ 17 8.1 Application Information............................................ 17 8.2 Typical Applications ................................................ 26 9 Power Supply Recommendations...................... 37 10 Layout................................................................... 37 10.1 Layout Guidelines ................................................. 37 10.2 Layout Example .................................................... 38 11 Device and Documentation Support ................. 39 11.1 11.2 11.3 11.4 11.5 Detailed Description ............................................ 11 7.1 Overview ................................................................. 11 7.2 Functional Block Diagram ....................................... 11 7.3 Feature Description................................................. 12 Related Links ........................................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 39 39 39 39 39 12 Mechanical, Packaging, and Orderable Information ........................................................... 39 4 Revision History 2 DATE REVISION NOTES December 2015 * Initial release. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 TPS92691, TPS92691-Q1 www.ti.com SLVSD68 – DECEMBER 2015 5 Pin Configuration and Functions PWP Package 16-Pin HTSSOP with PowerPAD™ Top View VIN 1 16 VCC SS 2 15 GATE RT/SYNC 3 14 IS PWM 4 13 PGND COMP 5 12 OVP IADJ 6 11 DDRV IMON 7 10 CSP AGND 8 9 CSN Thermal Pad Pin Functions PIN NO. NAME I/O DESCRIPTION 1 VIN — Input supply for the internal VCC regulator. Bypass with 100-nF capacitor to GND located close to the controller. 2 SS I/O Soft-start programming pin. Connect a capacitor to AGND to extend the start-up time. Switching can be disabled by shorting the pin to GND. 3 RT/SYNC I/O Oscillator frequency programming pin. Connect a resistor to AGND to set the switching frequency. The internal oscillator can be synchronized by coupling an external clock pulse through 100-nF series capacitor. 4 PWM I PWM dimming input. Driving the pin below 2.3 V (typ), turns off switching, idles the oscillator, disconnects the COMP pin, and sets DDRV output to ground. The input signal duty cycle controls the average LED current through PWM dimming operation. Connect to VCC when not used for PWM dimming. 5 COMP I/O Transconductance error amplifier output. Connect compensation network to achieve desired closedloop response. 6 IADJ I LED current reference input. Connecting pin to VCC with 100-kΩ series resistor sets internal reference voltage to 2.42 V and the current sense threshold, V(CSP-CSN)to 172 mV. The pin can be modulated by external voltage source from 0 V to 2.25 V to implement analog dimming. 7 IMON O LED current report pin. The LED current sensed by CSP/CSN input is reported as VIMON = 14 × ILED × Rcs. Bypass with a 1-nF ceramic capacitor to AGND. 8 AGND — Analog ground. Return for the internal voltage reference and analog circuit. Connect to circuit ground, GND, to complete return path. 9 CSN I Current sense amplifier negative input (–). Connect directly to the negative node of LED current sense resistor RCS). 10 CSP I Current sense amplifier positive input (+). Connect directly to the positive node of LED current sense resistor RCS). 11 DDRV O Series dimming FET gate driver output. Connect to gate of external N-channel MOSFET or a level-shift circuit with P-channel MOSFET to implement series FET PWM dimming. 12 OVP I Hysteretic overvoltage protection input. Connect resistor divider from output voltage to set OVP threshold and hysteresis. 13 PGND 14 IS I Switch current sense input. Connected to the switch current sense resistor, RIS, in the source of the Nchannel MOSFET. 15 GATE O N-channel MOSFET gate driver output. Connect to gate of external switching N-channel MOSFET. 16 VCC — VCC bias supply pin. Locally decouple to PGND using a 2.2-µF to 4.7-µF ceramic capacitor located close to the controller. — The AGND and PGND pin must be connected to the exposed PowerPAD for proper operation. This PowerPAD must be connected to PCB ground plane using multiple vias for good thermal performance. PowerPAD — Power ground connection pin for internal N-channel MOSFET gate drivers. Connect to circuit ground, GND, to complete return path. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 3 TPS92691, TPS92691-Q1 SLVSD68 – DECEMBER 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) Input voltage Output voltage (4) Source current Sink current MIN MAX UNIT VIN, CSP, CSN –0.3 65 V IADJ, IS, PWM, RT/SYNC –0.3 8.8 V OVP, SS –0.3 5.5 V CSP to CSN (3), PGND –0.3 0.3 V VCC, GATE, DDRV –0.3 8.8 V COMP –0.3 5.0 V IMON — 100 µA GATE, DDRV (Pulsed 2.5 V), the GATE and DDRV outputs are enabled to ramp the inductor current to the previous steady-state value. The COMP pin is connected and the error amplifier and oscillator are enabled only when the switch current sense voltage VIS exceeds the COMP voltage, VCOMP, thus immediately forcing the converter into steady-state operation with minimum LED current overshoot. The PWM pin should be connected to the VCC if dimming is not required. An internal pulldown resistor sets the input to logic-low and disables the part when the pin is disconnected or left floating. 14 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 TPS92691, TPS92691-Q1 www.ti.com SLVSD68 – DECEMBER 2015 Feature Description (continued) LED- LED+ TPS92691 TPS92691 DDRV DDRV Figure 22. Series Dimming FET Connections The DDRV output follows the PWM input signal and is capable of sinking and sourcing up to 500 mA of peak current to control a low-side series connected N-channel dimming FET. Alternatively, the DDRV output can be translated with an external level-shift circuit to drive a high-side series P-channel dimming FET as shown in Figure 22. The series dimming FET is required to achieve high contrast ratio as it ensures fast rise and fall times of the LED current in response to the PWM input. Without any dimming FET, the rise and fall times are limited by the inductor slew rate and the closed-loop bandwidth of the system. Leave the DDRV pin unconnected if not used. 7.3.9 Soft-Start The soft-start feature helps the regulator gradually reach the steady-state operating point, thus reducing startup stresses and surges. The TPS92691/-Q1 clamps the COMP pin to the SS pin, separated by a diode, until LED current nears the regulation threshold. The internal 10-µA soft-start current source gradually increases the voltage on an external soft-start capacitor CSS connected to the SS pin. This results in a gradual rise of the COMP voltage from GND. The internal 10-µA current source turns on when VCC exceeds the UVLO threshold. At the beginning of the softstart sequence, the SS pulldown switch is active and is released when the voltage VSS drops below 25 mV. The SS pin can also be pulled down by an external switch to stop switching. When the SS pin is externally driven to enable switching, the slew-rate on the COMP pin should be controlled by choosing a compensation capacitor that avoids large startup transients. The value of CSS should be large enough to charge the output capacitor during the soft-start transition period. 7.3.10 Current Monitor Output The IMON pin voltage represents the LED current measured by the rail-to-rail current sense amplifier across the external current shunt resistor. The linear relationship between the IMON voltage and LED current includes the amplifier gain-factor of 14 (see Figure 14). The IMON output can be connected to an external microcontroller or comparator to facilitate LED open, short, or cable harness fault detection and mitigation based on programmable threshold VOCTH. The IMON voltage is internally clamped to 3.7 V. TPS92691 SS PWM VOCTH + IMON Figure 23. LED Overcurrent Protection using IMON Output Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 15 TPS92691, TPS92691-Q1 SLVSD68 – DECEMBER 2015 www.ti.com Feature Description (continued) 7.3.11 Overvoltage Protection The TPS92691/-Q1 device includes a dedicated OVP pin which can be used for either input or output overvoltage protection. This pin features a precision 1.24 V (typ) threshold with 20-µA (typ) of hysteresis current. The overvoltage threshold limit is set by a resistor divider network from the input or output terminal to GND. When the OVP pin voltage exceeds the reference threshold, the GATE and DDRV pins are immediately pulled low and the SS and COMP capacitors are discharged. The GATE is enabled and a new startup sequence is initiated after the voltage drops below the hysteresis threshold set by the 20-µA source current and the external resistor divider. 7.3.12 Thermal Protection Internal thermal shutdown circuitry is implemented to protect the controller in the event the maximum junction temperature is exceeded. When activated, typically at 175°C, the controller is forced into a shutdown mode, disabling the internal regulator. This feature is designed to prevent overheating and damage to the device. 7.4 Device Functional Modes This device has no additional functional modes. 16 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 TPS92691, TPS92691-Q1 www.ti.com SLVSD68 – DECEMBER 2015 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The TPS92691/-Q1 controller is suitable for implementing step-up or step-down LED driver topologies including Buck, Boost, Buck-Boost, SEPIC, Cuk, and Flyback. Use the following design procedure to select component values for the TPS92691/-Q1 device. This section presents a simplified discussion of the design process for the Buck, Boost, and Buck-Boost converter. The expressions derived for Buck-Boost can also be altered to select components for a 1:1 coupled-inductor SEPIC converter. The design procedure can be easily adapted for Flyback and Cuk converter topologies. VIN L RCS D CIN CVCC ROV2 TPS92691-Q1 CSS RADJ2 1 2 RT 3 VPWM 4 5 CCOMP 6 7 RADJ1 CIMON 8 VIN Q1 VCC SS GATE RT/SYNC PWM IS PGND COMP IADJ OVP DDRV IMON CSP AGND PAD CSN LED+ COUT 16 15 ROV1 14 RIS 13 Q2 COV 12 LEDÅ 11 10 9 Figure 24. Boost LED Driver VIN L1 CIN L2 CS CVCC TPS92691-Q1 CSS RADJ2 1 2 RT 3 VPWM 4 5 CCOMP RADJ1 6 7 CIMON 8 VIN VCC SS GATE RT/SYNC PWM IS PGND COMP IADJ D OVP DDRV IMON CSP AGND PAD CSN Q1 16 ROV2 ROV1 14 12 LED+ COUT 15 13 RCS RIS COV Q2 LEDÅ 11 10 9 Figure 25. SEPIC LED Driver Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 17 TPS92691, TPS92691-Q1 SLVSD68 – DECEMBER 2015 www.ti.com Application Information (continued) RCS COUT VIN L D CIN ROV2 LEDÅ Q2 LED+ RLS2 CVCC TPS92691-Q1 CSS RADJ2 1 VIN 2 RT 3 VPWM 4 CIMON GATE RT/SYNC PWM IS PGND COMP 6 IADJ 7 RADJ1 VCC SS 5 CCOMP 8 Q1 OVP DDRV IMON CSP AGND PAD CSN Q4 16 Q3 15 14 ROV1 RIS 13 RLS1 COV 12 11 10 9 Figure 26. Buck-Boost LED Driver VIN LED+ RLS2 Q2 D ROV2 CIN L CVCC TPS92691-Q1 CSS RADJ2 1 2 RT 3 VPWM 4 5 CCOMP RADJ1 6 7 CIMON 8 VIN Q1 VCC SS GATE RT/SYNC PWM COMP IADJ IS PGND OVP DDRV IMON CSP AGND PAD CSN COUT RCS Q4 16 Q3 15 14 13 12 LEDÅ ROV1 RIS RLS1 COV 11 10 9 Figure 27. Buck LED Driver 18 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 TPS92691, TPS92691-Q1 www.ti.com SLVSD68 – DECEMBER 2015 Application Information (continued) 8.1.1 Duty Cycle Considerations The switch duty cycle, D, defines the converter operation and is a function of the input and output voltages. In steady state, the duty cycle is derived using expression: Buck: D VO VIN (2) Boost: D VO VIN VO (3) Buck-Boost: D VO VIN VO (4) The minimum duty cycle, DMIN, and maximum duty cycle, DMAX, are calculated by substituting maximum input voltage, VIN(MAX), and the minimum input voltage, VIN(MIN), respectively in the previous expressions. The minimum duty cycle achievable by the device is determined by the leading edge blanking period and the switching frequency. The maximum duty cycle is limited by the internal oscillator to 93% (typ) to allow for minimum off-time. It is necessary for the operating duty cycle to be within the operating limits of the device to ensure closed-loop LED current regulation over the specified input and output voltage range. 8.1.2 Inductor Selection The inductor peak-to-peak ripple current, ΔiL-PP, is typically set between 10% and 80% of the maximum inductor current, IL, as a good compromise between core loss and copper loss of the inductor. Higher ripple inductor current allows a smaller inductor size, but places more of a burden on the output capacitor to smooth the LED current ripple. Knowing the desired ripple ratio RR, switching frequency ƒSW, maximum duty cycle DMAX, and the typical LED current ILED, the inductor value can be calculated as follows: Buck: 'iL(PP) L RR ˜ IL VIN(MIN) RR ˜ ILED (5) VO u DMAX 'iL(PP) u fSW (6) Boost and Buck-Boost: 'iL(PP) L RR ˜ IL RR ˜ ILED 1 DMAX (7) VIN(MIN) u DMAX 'iL(PP) u fSW (8) As an alternative, the inductor can be selected based on CCM-DCM boundary condition specified based on output power, PO(BDRY). The choice of inductor ensures CCM operation in battery-powered LED driver applications that are designed to support different LED string configurations with a wide range of programmable LED current setpoints. The output power should be calculated based on the lowest LED current and the lowest output voltage requirements for a given application. PO(BDRY) d ILED(MIN) u VO(MIN) (9) Buck: L 2 VO(MAX) 2 u PO(BDRY) u fSW VO(MAX) § u ¨¨ 1 VIN © · ¸¸ ¹ (10) Boost: Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 19 TPS92691, TPS92691-Q1 SLVSD68 – DECEMBER 2015 www.ti.com Application Information (continued) L § VIN u ¨1 ¨ V O(MAX) © 2 VIN 2 u PO(BDRY) u fSW · ¸ ¸ ¹ (11) Buck-Boost: 1 L 2 u PO(BDRY) u fSW § 1 u¨ ¨ VO(MAX) © 1 · ¸ VIN ¸¹ 2 (12) The saturation current rating of the inductor should be greater than the peak inductor current, IL(PK), at the maximum operating temperature. VIN(MIN) u DMAX IL(PK) IL 2 u L u fSW (13) 8.1.3 Output Capacitor Selection The output capacitors are required to attenuate the discontinuous or large ripple current generated by switching and achieve the desired peak-to-peak LED current ripple, ΔiLED(PP). The capacitor value depends on the total series resistance of the LED string, rD, the switching frequency, ƒSW, and on the converter topology (that is, stepup or step-down). For the Buck and Cuk topology, the inductor is in series with LED load and requires a smaller capacitor than the Boost, Buck-Boost, and SEPIC topologies to achieve the same LED ripple current. The capacitance required for the target LED ripple current can be calculated based on following equations. Buck: COUT 'iL(PP) 8 u fSW u rD u 'iLED(PP) (14) Boost and Buck-Boost: ILED u DMAX COUT fSW u rD u 'iLED(PP) (15) When choosing the output capacitors, it is important to consider the ESR and the ESL characteristics as they directly impact the LED current ripple. Ceramic capacitors are the best choice due to their low ESR, high ripple current rating, long lifetime, and good temperature performance. When selecting ceramic capacitors, it is important to consider the derating factors associated with higher temperature and DC bias operating conditions. TI recommends an X7R dielectric with voltage rating greater than maximum LED stack voltage. An aluminum electrolytic capacitor can be used in parallel with ceramic capacitors to provide bulk energy storage. The aluminum capacitors must have necessary RMS current and temperature ratings to ensure prolonged operating lifetime. The minimum allowable RMS output capacitor current rating, ICOUT(RMS), can be approximated: Buck: ICOUT(RMS) 'iLED(PP) 12 (16) Boost and Buck-Boost: ICOUT(RMS) ILED u DMAX 1 DMAX (17) The expressions (Equation 14 to Equation 17) are best suited for designs driving a fixed LED load, with known output voltage and LED current. For applications that are required to support different LED string configurations with a wide range of programmable LED current setpoints, the previous expressions are rearranged to reflect output capacitance based on the maximum output power, PO(MAX), to ensure that LED current ripple specifications are met over the entire range of operation. Typical Buck-Boost LED Driver provides the details for Buck-Boost LED driver. 20 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 TPS92691, TPS92691-Q1 www.ti.com SLVSD68 – DECEMBER 2015 Application Information (continued) 8.1.4 Input Capacitor Selection The input capacitors, CIN, smooth the input voltage ripple and store energy to supply input current during input voltage or PWM dimming transients. The series inductor in the Boost, SEPIC, and Cuk topology provides continuous input current and requires a smaller input capacitor to achieve desired input ripple voltage, ΔvIN(PP). The Buck and Buck-Boost topology have discontinuous input current and require a larger capacitor to achieve the same input voltage ripple. Based on the switching frequency, ƒSW, and the maximum duty cycle, DMAX, the input capacitor value can be calculated as follows: Buck: CIN ILED u DMAX u (1 DMAX ) fSW u 'vIN(PP) (18) Boost: CIN 'iL(PP) 8 u fSW u 'vIN(PP) (19) Buck-Boost: CIN ILED u DMAX fSW u 'vIN(PP) (20) X7R dielectric-based ceramic capacitors are the best choice due to their low ESR, high ripple current rating, and good temperature performance. For applications using PWM dimming, TI recommends an aluminum electrolytic capacitor in addition to ceramic capacitors to minimize the voltage deviation due to large input current transients generated in conjunction with the rising and falling edges of the LED current. TPS92691 R VIN VIN CVIN Figure 28. VIN Filter For most applications, TI highly recommends to bypass the VIN pin with a 0.1-µF ceramic capacitor placed as close as possible to the device and add a series 10-Ω resistor to create a 150-kHz low-pass filter and eliminate undesired high-frequency noise. 8.1.5 Main Power MOSFET Selection The power MOSFET should be able to sustain the maximum switch node voltage, VSW, and switch RMS current derived based on the converter topology. TI recommends a drain voltage VDS rating of at least 20% greater than the maximum switch node voltage to ensure safe operation. The MOSFET drain-to-source breakdown voltage, VDS, and RMS current ratings are calculated using the following expressions. Buck: VDS VIN(MAX) u 1.2 IQ(RMS) Boost: VDS (21) ILED u DMAX (22) VO(OV) u 1.2 (23) Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 21 TPS92691, TPS92691-Q1 SLVSD68 – DECEMBER 2015 www.ti.com Application Information (continued) IQ(RMS) ILED u DMAX 1 DMAX (24) Buck-Boost: VDS VIN(MAX) IQ(RMS) ILED u VO(OV) u 1.2 (25) DMAX 1 DMAX (26) Where the voltage, VO(OV), is the overvoltage protection threshold and the worst-case output voltage under fault conditions. Select a MOSFET with low total gate charge, Qg, to minimize gate drive and switching losses. The MOSFET RDS resistance is usually a less critical parameter because the switch conduction losses are not a significant part of the total converter losses at high operating frequencies. The switching and conduction losses are calculated as follows: PCOND PSW 2 RDS u IQ(RMS) 2 IL u VSW (27) u CRSS u fSW IGATE (28) CRSS is the MOSFET reverse transfer capacitance. IL is the average inductor current. IGATE is gate drive output current, typically 500 mA. The MOSFET power rating and package should be selected based on the total calculated loss, the ambient operating temperature, and maximum allowable temperature rise. 8.1.6 Rectifier Diode Selection A Schottky diode (when used as a rectifier) provides the best efficiency due to low forward voltage drop and near-zero reverse recovery time. TI recommends a diode with a reverse breakdown voltage, VD(BR), greater than or equal to MOSFET drain-to-source voltage, VDS, for reliable performance. It is important to understand the leakage current characteristics of the Schottky diode, especially at high operating temperatures because it impacts the overall converter operation and efficiency. The current through the diode, ID, is given by: ID IL u (1 DMAX ) (29) The diode should be sized to exceed the current rating, and the package should be able to dissipate power without exceeding the maximum allowable temperature. 8.1.7 LED Current Programming The LED current is set by the external current sense resistor, RCS, and the analog adjust voltage, VIADJ. The current sense resistor is placed in series with the LED load and can be located either on the high side (connected to the output, VO), or on the low side (connected to ground, GND). The CSP and CSN inputs of the internal rail-to-rail current sense amplifier are connected to the RCS resistor to enable closed-loop regulation. When VIADJ > 2.5 V, the internal 2.42-V reference sets the V(CSP-CSN) threshold to 172 mV and the LED current is regulated to: 0.172 ILED RCS (30) The LED current can be programmed by varying VIADJ between 140 mV to 2.25 V. The LED current can be calculated using: VIADJ ILED 14 u RCS (31) 22 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 TPS92691, TPS92691-Q1 www.ti.com SLVSD68 – DECEMBER 2015 Application Information (continued) The output voltage ripple should be limited to 50 mV for best performance. TI recommends a low-pass commonmode filter consisting of 10-Ω resistors is series with CSP and CSN inputs and 0.01-µF capacitors to ground to minimize the impact of voltage ripple and noise on LED current accuracy (see Figure 20). A 0.1-µF capacitor across CSP and CSN is included to filter high-frequency differential noise. 8.1.8 Switch Current Sense Resistor and Slope Compensation The switch current sense resistor, RIS, is used to implement peak current mode control and to set the peak switch current limit. The value of switch current sense RIS is selected to achieve stable inner current loop operation based on the magnitude of slope compensation ramp, VSL, and to protect the main switching MOSFET under fault conditions. The lower of the two values calculated using the following equations should be selected for RIS. 2 u VSL u L u fSW RIS VO(MAX) (32) RIS VIS(LIMIT) VSL u DMAX IL(PK) (33) The internal slope compensation voltage, VSL is fixed at 200 mV (typ). A resistor can be placed in series with the IS pin to increase slope compensation, if necessary. The peak switch current limit is set based on the internal current limit threshold of 525 mV (typ) and adjusted based on slope compensation to ensure reliable operation while PWM dimming. TPS92691 VCC GATE 100 O IS PGND RIS 1 nF Figure 29. IS Input Filter The use of a 1-nF and 100-Ω low-pass filter is optional. If used, the resistor value should be less than 500 Ω to limit its influence on the internal slope compensation signal. 8.1.9 Feedback Compensation The open-loop response is the product of the modulator transfer function (shown in Equation 34) and the feedback transfer function. Using a first-order approximation, the modulator transfer function can be modeled as a single pole created by the output capacitor, and in the boost and buck-boost topologies, a right half-plane zero created by the inductor, where both have a dependence on the LED string dynamic resistance, rD. Because TI recommends a ceramic capacitor, the ESR of the output capacitor is neglected in the analysis. The small-signal modulator model also includes a DC gain factor that is dependent on the duty cycle, output voltage, and LED current. § s · ¨1 ¸ Öi ZZ ¹ © LED G0 vÖ COMP § s · ¨1 ¸ ZP ¹ © (34) Table 1 summarizes the expression for the small-signal model parameters. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 23 TPS92691, TPS92691-Q1 SLVSD68 – DECEMBER 2015 www.ti.com Application Information (continued) The feedback transfer function includes the current sense resistor and the loop compensation of the transconductance amplifier. A compensation network at the output of the error amplifier is used to configure loop gain and phase characteristics. A simple capacitor, CCOMP, from COMP to GND (as shown in Figure 30) provides integral compensation and creates a pole at the origin. Alternatively, a network of RCOMP, CCOMP, and CHF, shown in Figure 31, can be used to implement proportional and integral (PI) compensation and to create a pole at the origin, a low-frequency zero, and a high-frequency pole. Table 1. Small-Signal Model Parameters DC GAIN (G0) POLE FREQUENCY (ωP) ZERO FREQUENCY (ωZ) 1 1 rD u COUT — Buck (1 D) u VO Boost RIS u VO VO rD u ILED VO u rD u COUT (1 D) u VO Buck-Boost RIS u VO VO u (1 D)2 L u ILED rD u ILED VO D u rD u ILED VO u (1 D)2 D u L u ILED D u rD u ILED VO u rD u COUT The feedback transfer function is defined as follows. Feedback transfer function with integral compensation: vÖ COMP 14 u gM u RCS Öi s u CCOMP (35) Feedback transfer function with proportional integral compensation: 1 s u RCOMP u CCOMP vÖ COMP 14 u gM u RCS Öi s u CCOMP CHF § §C u CHF · · LED ¨¨ 1 s u R COMP u ¨ COMP ¸ ¸¸ © CCOMP CHF ¹ ¹ © (36) LED The pole at the origin minimizes output steady-state error. High bandwidth is achieved with the PI compensator by placing the low-frequency zero an order of magnitude less than the crossover frequency. Use the following expressions to calculate the compensation network. TPS92691 TPS92691 COMP COMP RCOMP CCOMP CSP ILED VCC CSN GAIN = 14 CSP + RCS + + CHF CCOMP GAIN = 14 + RCS ILED CURRENT SENSE AMPLIFIER VCC IADJ CSN CURRENT SENSE AMPLIFIER IADJ + + 2.42V 2.42V Figure 30. Integral Compensation Figure 31. Proportional-Integral Compensation Buck with integral compensator: CCOMP 8.75 u 10 3 u RCS ZP (37) Boost and Buck-Boost with proportional integral compensator: 24 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 TPS92691, TPS92691-Q1 www.ti.com CCOMP CHF RCOMP SLVSD68 – DECEMBER 2015 8.75 u 10 3 § R u G0 · u ¨ CS ¸ ZZ © ¹ (38) CCOMP 100 (39) 1 ZP u CCOMP (40) The loop response is verified by applying step input voltage transients. The goal is to minimize LED current overshoot and undershoot with a damped response. Additional tuning of the compensation network may be necessary to optimize PWM dimming performance. 8.1.10 Soft-Start The soft-start time (tSS) is the time required for the LED current to reach the target setpoint. The required softstart time, tSS, is programmed using a capacitor, CSS, from SS pin to GND, and is based on the LED current, output capacitor, and output voltage. § COUT u VOUT · CSS 12.5 u 10 6 ¨ t SS ¸ ILED © ¹ (41) 8.1.11 Overvoltage Protection The overvoltage threshold is programmed using a resistor divider, ROV2 and ROV1, from the output voltage, VO, to ground for Boost and SEPIC topologies, as shown in Figure 24 and Figure 25. If the LEDs are referenced to a potential other than ground, as in the Buck-Boost or Buck configuration, the output voltage is sensed and translated to ground by using a PNP transistor and level-shift resistors, as shown in Figure 27 and Figure 26. The overvoltage turn-off threshold, VO(OV), is: Boost: VO(OV) §R ROV2 · VOVP(THR) u ¨ OV1 ¸ ROV1 © ¹ (42) Buck and Buck-Boost: VO(OV) VOVP(THR) u ROV2 ROV1 0.7 (43) The overvoltage hysteresis, VOV(HYS) is: VOV(HYS) IOVP(HYS) u ROV2 (44) 8.1.12 PWM Dimming Considerations When PWM dimming, the TPS92691/-Q1 requires another MOSFET placed in series with the LED load. This MOSFET should have a voltage rating greater than the output voltage, VO, and a current rating at least 10% higher than the nominal LED current, ILED. It is important to control the slew-rate of the external FET to achieve a damped LED current response to PWM rising-edge transitions. For a low-side, N-channel dimming FET, the slew-rate is controlled by placing a resistor in series with the GATE pin. The rise and fall times depend on the value of the resistor and the gate-to-source capacitance of the MOSFET. The series resistor can be bypassed with a diode for fast rise time and slow fall times to achieve 100:1 or higher contrast ratios. If a high-side P-channel dimming FET is used, the rise and fall times can be controlled by selecting appropriate resistors for the level-shift network, RLS1 and RLS2, as shown in Figure 26. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 25 TPS92691, TPS92691-Q1 SLVSD68 – DECEMBER 2015 www.ti.com 8.2 Typical Applications 8.2.1 Typical Boost LED Driver Figure 32. Boost LED Driver With High-Side Current Sense 26 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 TPS92691, TPS92691-Q1 www.ti.com SLVSD68 – DECEMBER 2015 8.2.1.1 Design Requirements Table 2 shows the design parameters for the boost LED driver application. Table 2. Design Parameters PARAMETER TEST CONDITIONS MIN TYP MAX 7 14 18 UNIT INPUT CHARACTERISTICS Input voltage range Input UVLO setting V 4.5 V LED forward voltage 3.2 V Number of LEDs in series 12 OUTPUT CHARACTERISTICS VO Output voltage 38.4 V ILED Output current LED+ to LED– 500 mA RR LED current ripple ratio 5% rD LED string resistance Ω 4 Maximum output power 20 PWM dimming range 240-Hz PWM frequency 4% 25 W 100% SYSTEMS CHARACTERISTICS ΔiL(PP) Inductor current ripple ΔvIN(PP) Input voltage ripple 70 mV VO(OV) Output overvoltage protection threshold 50 V VOV(HYS) Output overvoltage protection hysteresis 5 V tss Soft-start period 8 ms 390 kHz 20% Switching frequency 8.2.1.2 Detailed Design Procedure This procedure is for the boost LED driver application. 8.2.1.2.1 Calculating Duty Cycle Solve for D, DMAX, and DMIN: VO VIN 38.4 14 D VO 38.4 DMAX DMIN VO VIN(MIN) (45) 38.4 7 38.4 VO VO 0.6354 VIN(MAX) 0.8177 (46) 38.4 18 38.4 VO 0.5312 (47) 8.2.1.2.2 Setting Switching Frequency Solve for RT: 1.432 u 1010 RT 1.047 fSW 1.432 u 1010 390 u 10 3 1.047 20.05 u 103 (48) The closest standard resistor of 20 kΩ is selected. 8.2.1.2.3 Inductor Selection The inductor value should ensure continuous conduction mode (CCM) of operation and should achieve desired ripple specification, ΔiL(PP). Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 27 TPS92691, TPS92691-Q1 SLVSD68 – DECEMBER 2015 'iL(PP) RR u www.ti.com ILED 1 DMAX Solving for inductor: VIN(MIN) u DMAX L 'iL(PP) u fSW 0.2 u 0.5 1 0.8177 7 u 0.8177 0.5485 u 390 u 103 0.5485 (49) 26.76 u 10 6 (50) The closest standard inductor is 27 µH. The expected inductor ripple based on the chosen inductor is: VIN(MIN) u DMAX 7 u 0.8177 0.5436 'iL(PP) L u fSW 27 u 10 6 u 390 u 103 (51) The inductor saturation current rating should be greater than the peak inductor current, IL(PK). VIN(MIN) u DMAX ILED 0.5 7 u 0.8177 IL(PK) 3.01 1 DMAX 2 u L u fSW 1 0.8177 2 u 27 u 10 6 u 390 u 103 (52) 8.2.1.2.4 Output Capacitor Selection The specified peak-to-peak LED current ripple, ΔiLED(PP), is: 'iLED(PP) 0.05 u ILED 25 u 10 3 (53) The output capacitance required to achieve the target LED current ripple is: ILED u DMAX 0.5 u 0.8177 COUT 10.48 u 10 6 fSW u rD u 'iLED(PP) 390 u 103 u 4 u 25 u 10 3 (54) Considering 40% derating factor under DC bias operation, four 4.7-µF, 100-V rated X7R ceramic capacitors are used in parallel to achieve a combined output capacitance of 18.8 µF. 8.2.1.2.5 Input Capacitor Selection The input capacitor is required to reduce switching noise conducted through the input wires and reduced the input impedance of the LED driver. The capacitor required to limit peak-to-peak input ripple voltage ripple, ΔvIN(PP), to 70 mV is given by: 'iL(PP) 0.5436 CIN 2.49 u 10 6 8 u fSW u 'vIN(PP) 8 u 390 u 103 u 70 u 10 3 (55) A 4.7-µF, 50-V X7R ceramic capacitor is selected. 8.2.1.2.6 Main N-Channel MOSFET Selection The MOSFET ratings should exceed the maximum output voltage and RMS switch current given by: VDS VO(OV) u 1.2 50 u 1.2 60 IQ(RMS) ILED u DMAX 1 DMAX 0.5 u 0.8177 1 0.8177 (56) 2.48 (57) A 60-V or a 100-V N-channel MOSFET with current rating exceeding 3 A is required for this design. 8.2.1.2.7 Rectifying Diode Selection The diode should be selected based on the following voltage and current ratings: VD(BR) VO(OV) u 1.2 50 u 1.2 60 ID IL u (1 DMAX ) ILED 0.5 (58) (59) A 60-V or a 100-V Schottky diode with low reverse leakage current is suitable for this design. The package must be able to handle the power dissipation resulting from continuous forward current, ID, of 0.5 A. 28 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 TPS92691, TPS92691-Q1 www.ti.com SLVSD68 – DECEMBER 2015 8.2.1.2.8 Programming LED Current LED current is based on the current shunt resistor, RCS and the V(CSP-CSN) threshold set by the voltage on the IADJ pin VIADJ. By default, IADJ is tied to VCC via an external resistor to enable the internal reference voltage of 2.42 V that then sets the V(CSP-CSN) threshold to 172 mV. The current shunt resistor value is calculated by: 0.172 0.172 RCS 0.344 ILED 0.5 (60) Two 0.68-Ω resistors are connected in parallel to achieve RCS of 0.34 Ω. 8.2.1.2.9 Setting Switch Current Limit and Slope Compensation The switch current sense resistor, RIS, is calculated by solving the following equations and choosing the lowest value: RIS RIS 2 u VSL u L u fSW VO(MAX) VIS(LIMIT) 2 u 0.2 u 27 u 10 6 u 390 u 103 38.4 VSL u DMAX IL(PK) 0.525 0.2 u 0.8177 3.01 0.11 (61) 0.12 (62) A standard value of 0.1 Ω is selected. 8.2.1.2.10 Deriving Compensator Parameters The modulator transfer function for the Boost converter is derived for nominal VIN voltage and corresponding duty cycle, D, and is given by the following equation. (See Table 1 for more information.) Öi LED vÖ COMP § s · ¨1 ¸ ZZ ¹ © G0 § s · ¨1 ¸ Z P ¹ © s § · ¨1 ¸ 378.12 u 103 ¹ © 3.466 s § · ¨1 3 ¸ u 14 10 © ¹ (63) The proportional-integral compensator components CCOMP and RCOMP are obtained by solving the following expressions: 3 § R u G0 · u ¨ CS ¸ 8.75 u 10 ZZ © ¹ 1 CCOMP 8.75 u 10 RCOMP 1 ZP u CCOMP 14 u 103 u 33 u 10 9 3 § 0.34 u 3.466 · u¨ ¸ © 378.12 u 103 ¹ 27.27 u 10 9 (64) 2.165 u 103 (65) The closet standard capacitor of 33 nF and resistor of 2.15 kΩ is selected. The high frequency pole location is set by a 100 pF CHF capacitor. 8.2.1.2.11 Setting Start-up Duration The soft-start capacitor required to achieve start-up in 8 ms is given by: CSS 12.5 u 10 6 § ¨ t SS © COUT u VOUT · ¸ ILED ¹ 12.5 u 10 6 § ¨ 8 u 10 ¨ © 3 18.8 u 10 6 u 38.4 · ¸ ¸ 0.5 ¹ 81.9 u 10 9 (66) The closet standard capacitor of 100 nF is selected. 8.2.1.2.12 Setting Overvoltage Protection Threshold The overvoltage protection threshold of 50 V and hysteresis of 5 V is set by the ROV1 and ROV2 resistor divider. VOV(HYS) 5 ROV2 250 u 103 6 20 u 10 20 u 10 6 (67) Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 29 TPS92691, TPS92691-Q1 SLVSD68 – DECEMBER 2015 ROV1 www.ti.com § · 1.24 ¨ ¸R ¨ VO(OV) 1.24 ¸ OV2 © ¹ § 1.24 · 3 ¨ 50 1.24 ¸ 250 u 10 © ¹ 6.36 u 103 (68) The standard resistor values of 249 kΩ and 6.34 kΩ are chosen. 8.2.1.2.13 PWM Dimming Considerations A series dimming FET is required to meet PWM dimming specification from 100% to 4% duty cycle. A 60-V, 2-A N-channel FET is suitable for this application. As an alternative, a 60-V, 2-A P-channel FET could be used to achieve PWM dimming. An external level-shift circuit is required to translate the DDRV signal to the gate of the P-channel dimming FET. The drive strength of 5 mA and gate-source voltage of 15 V are set by the 1-kΩ and 2-kΩ level-translator resistors and a small-signal Nchannel MOSFET, whose gate is connected to DDRV. By default, the PWM pin is connected to VCC through a 100-kΩ resistor to enable the part upon start-up. 8.2.1.3 Application Curves These curves are for the boost LED driver. 100 Efficiency (%) 95 90 85 80 75 7 8 9 10 11 12 13 VIN (V) 14 15 16 18 D021 Figure 33. Efficiency vs Input Voltage Ch1: Input voltage; Ch2: Soft-start (SS) voltage; Ch3: Input current; Ch4: LED current; Time: 2 ms/div Figure 35. Startup Transient 30 17 Ch1: Switch node voltage; Ch3: Switch sense current resistor voltage; Ch4: LED current; Time: 1 µs/div Figure 34. Normal Operation Ch1: Output voltage; Ch2: Soft-start (SS) voltage; Ch4: LED current; Time: 200 ms/div Figure 36. Overvoltage Protection Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 TPS92691, TPS92691-Q1 www.ti.com SLVSD68 – DECEMBER 2015 Ch1: GATE voltage; Ch2: External CLK signal; Ch3: Switch sense current resistor voltage; Ch4: LED current; Time: 1 µs/div Figure 37. Clock Synchronization Ch1: DDRV voltage; Ch2: PWM input; Ch3: Switch sense current resistor voltage; Ch4: LED current; Time: 2 ms/div Figure 38. PWM Dimming Transient Ch1: DDRV voltage; Ch2: PWM input; Ch3: Switch sense current resistor voltage; Ch4: LED current; Time: 4 µs/div Figure 39. PWM Dimming Transient (Zoomed) Ch1: Input voltage; Ch2: IMON voltage; Ch4: LED current; Time: 2 ms/div Figure 40. Step Input Voltage Transient and IMON Behavior Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 31 TPS92691, TPS92691-Q1 SLVSD68 – DECEMBER 2015 www.ti.com 8.2.2 Typical Buck-Boost LED Driver Figure 41. Buck-Boost LED Driver 32 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 TPS92691, TPS92691-Q1 www.ti.com SLVSD68 – DECEMBER 2015 8.2.2.1 Design Requirements Buck-Boost LED drivers provide the flexibility needed in applications that support multiple LED load configurations. For such applications, it is necessary to modify the design procedure presented in Application Information to account for the wider range of output voltage and LED current specifications. This design is based on the maximum output power PO(MAX), set by the lumen output specified for the lighting application. The design procedure for a battery connected application with 3 to 9 LEDs in series and maximum 15 W output power is outlined in this section. For applications that have a fixed number of LEDs and a narrow LED current range (for brightness correction), design equations provided in the Application Information and simplified design procedure, similar to one outlined in Typical Boost LED Driver for Boost LED driver, are recommended for developing an optimized circuit with lower Bill of Material (BOM) cost. Table 3. Design Parameters PARAMETER TEST CONDITIONS MIN TYP MAX 7 14 18 UNIT INPUT CHARACTERISTICS Input voltage range Input UVLO setting V 4.5 V 3.2 V OUTPUT CHARACTERISTICS LED forward voltage Number of LEDs in series VO Output voltage ILED Output current ΔiLED(PP) LED current ripple rD LED string resistance PO(MAX) Maximum output power LED+ to LED– 3 6 9 9.6 19.2 28.8 V 500 750 1500 mA 5% 1 PWM dimming range 240-Hz PWM frequency 2 4% 3 Ω 15 W 100% SYSTEMS CHARACTERISTICS PO(BDRY) Output power at CCM-DCM boundary condition 5 W ΔvIN(PP) VO(OV) Input voltage ripple 70 mV Output overvoltage protection threshold 40 V VOV(HYS) Output overvoltage protection hysteresis 5 V tss Soft-start period 8 ms 390 kHz Switching frequency 8.2.2.2 Detailed Design Procedure 8.2.2.2.1 Calculating Duty Cycle Solving for D, DMAX, and DMIN: VO 19.2 D VO VIN 19.2 14 DMAX DMIN VO(MAX) VO(MAX) VIN(MIN) VO(MIN) VO(MIN) VIN(MAX) 0.5783 (69) 28.8 28.8 7 0.8045 9.6 9.6 18 0.3478 (70) (71) 8.2.2.2.2 Setting Switching Frequency Solving for RT resistor: Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 33 TPS92691, TPS92691-Q1 SLVSD68 – DECEMBER 2015 RT www.ti.com 1.432 u 1010 fSW 1.047 1.432 u 1010 390 u 10 3 20.05 u 103 1.047 (72) 8.2.2.2.3 Inductor Selection The inductor is selected to meet the CCM-DCM boundary power requirement, PO(BDRY). Typically, the boundary condition is set to enable CCM operation at the lowest possible operating power based on minimum LED forward voltage drop and LED current. In most applications, PO(BDRY) is set to be 1/3 of the maximum output power, PO(MAX). The inductor value is calculated for maximum input voltage, VIN(MAX), and output voltage, VO(MAX): 1 1 L 31.46 u 10 6 2 2 1 · § · § 1 1 1 2 u 5 u 390 u 103 u ¨ 2 u PO(BDRY) u fSW u ¨ ¸ ¸ ¨ VO(MAX) VIN(MAX) ¸ © 28.8 18 ¹ © ¹ (73) The closest standard value of 33 µH is selected. The inductor ripple current is given by: VIN(MIN) u DMAX 7 u 0.8045 0.4376 'iL(PP) L u fSW 33 u 10 6 u 390 u 103 (74) The inductor saturation rating should exceed the calculated peak current which is based on the maximum output power using the following expression: IL(PK) IL(PK) § 1 PO(MAX) u ¨ ¨ VO(MIN) © § 1 15 u ¨ © 9.6 1· 7 ¸¹ 1 VIN(MIN) · ¸ ¸ ¹ VO(MIN) u VIN(MIN) 2 u L u fSW u VO(MIN) 9.6 u 7 2 u 33 u 10 6 u 390 u 103 u 9.6 7 VIN(MIN) (75) 3.863 8.2.2.2.4 Output Capacitor Selection The output capacitor should be selected to achieve the 5% peak-to-peak LED current ripple specification. Based on the maximum power, the capacitor is calculated as follows: PO(MAX) COUT fSW u rD(MIN) u 'i LED(PP)u VO(MIN) VIN(MIN) (76) COUT 15 30.9 u 10 3 6 390 u 10 u 1u 0.075 u 9.6 7 A minimum of four 10-µF, 50-V X7R ceramic capacitors in parallel are needed to meet the LED current ripple specification over the entire range of output power. Additional capacitance may be required based on the derating factor under DC bias operation. 8.2.2.2.5 Input Capacitor Selection The input capacitor is calculated based on the peak-to-peak input ripple specifications, ΔvIN(PP). The capacitor required to limit the ripple to 70 mV over range of operation is calculated using: PO(MAX) 15 CIN 33.1u 10 6 3 fSW u 'v IN(PP)u VO(MIN) VIN(MIN) 390 u 10 u 0.07 u 9.6 7 (77) A parallel combination of four 10-µF, 50-V X7R ceramic capacitors are used for a combined capacitance of 40 µF. Additional capacitance may be required based on the derating factor under DC bias operation. 8.2.2.2.6 Main N-Channel MOSFET Selection Calculating the minimum transistor voltage and current rating: VDS 34 1.2 u VO(OV) VIN(MAX) 1.2 u (40 18) 69.6 Submit Documentation Feedback (78) Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 TPS92691, TPS92691-Q1 www.ti.com SLVSD68 – DECEMBER 2015 IQ(RMS) PO(MAX) § VIN(MIN) · ¨1 ¸ VIN(MIN) ¨© VO(MIN) ¸¹ 15 § 7 · 1 7 ¨© 9.6 ¸¹ 2.82 (79) This application requires a 60-V or 100-V N-channel MOSFET with a current rating exceeding 3 A. 8.2.2.2.7 Rectifier Diode Selection Calculating the minimum Schottky diode voltage and current rating: VD(BR) ID 1.2 u VO(OV) ILED(MAX) VIN(MAX) 1.2 u (40 18) 69.6 (80) 1.5 (81) This application requires a 60-V or 100-V Schottky diode with a current rating exceeding 1.5 A. TI recommends a single high-current diode instead of paralleling multiple lower-current-rated diodes to ensure reliable operation over temperature. 8.2.2.2.8 Setting Switch Current Limit and Slope Compensation Solving for RIS: RIS RIS 2 u VSL u L u fSW VO(MAX) VIS(LIMIT) 2 u 0.2 u 33 u 10 6 u 390 u 103 28.8 VSL u DMAX IL(PK) 0.525 0.2 u 0.8045 3.863 0.179 (82) 0.094 (83) A standard resistor of 0.1 Ω is selected based on the lower of the two calculated values. The resistor ensures stable current loop operation with no subharmonic oscillations over the entire input and output voltage ranges. 8.2.2.2.9 Programming LED Current The LED current can be programmed to match the LED string configuration by using a resistor divider, RADJ1 and RADJ2, from VCC to GND for a given sense resistor, RCS, as shown in Figure 21. To maximize the accuracy, the IADJ pin voltage is set to 2.1 V for the specified LED current of 1.5 A. The current sense resistor, RCS, is then calculated as: VIADJ 2.1 RCS 0.1 14 u ILED(MAX) 14 u 1.5 (84) A standard resistor of 0.1 Ω is selected. Table 4 summarizes the IADJ pin voltage and the choice of the RADJ1 and RADJ2 resistors for different current settings. Table 4. Design Requirements LED CURRENT IADJ VOLTAGE (VIADJ) RADJ1 RADJ2 500 mA 700 mV 10.2 kΩ 100 kΩ 750 mA 1.05 V 16.2 kΩ 100 kΩ 1.5 A 2.1 V 39.2 kΩ 100 kΩ 8.2.2.2.10 Deriving Compensator Parameters A simple integral compensator provides a good starting point to achieve stable operation across the wide operating range. The modulator transfer function with the lowest frequency pole location is calculated based on maximum output voltage, VO(MAX), duty cycle, DMAX, LED dynamic resistance, rD(MAX), and minimum LED string current, ILED(MIN). (See Table 1 for more information.) Öi LED vÖ COMP § s · ¨1 ¸ ZZ ¹ G0 © § s · ¨1 ¸ ZP ¹ © s § · ¨1 3 ¸ 82.92 u 10 ¹ 1.876 © s § · ¨1 3 ¸ 8.68 u 10 ¹ © (85) Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 35 TPS92691, TPS92691-Q1 SLVSD68 – DECEMBER 2015 www.ti.com The compensation capacitor needed to achieve stable response is: CCOMP 8.75 u 10 3 u RCS ZP 8.75 u 10 3 u 0.1 100.8 u 10 8.68 u 103 9 (86) A 100 nF capacitor is selected. A proportional integral compensator can be used to achieve higher bandwidth and improved transient performance. However, it is necessary to experimentally tune the compensator parameters over the entire operating range to ensure stable operation. 8.2.2.2.11 Setting Startup Duration Solving for soft-start capacitor, CSS, based on 8-ms startup duration: CSS 12.5 u 10 6 § ¨ t SS ¨ © COUT u VOUT(MAX) · ¸ ¸ ILED(MIN) ¹ 12.5 u 10 6 § ¨ 8 u 10 ¨ © 3 40 u 10 6 u 28.8 · ¸ ¸ 0.5 ¹ 71.2 u 10 9 (87) A 100-nF soft-start capacitor is selected. 8.2.2.2.12 Setting Overvoltage Protection Threshold Solving for resistors, ROV1 and ROV2: VOV(HYS) 5 ROV2 250 u 103 6 6 20 u 10 20 u 10 1.24 u ROV2 VO(OV) 0.7 ROV1 1.24 u 250 u 103 40 0.7 (88) 7.89 u 103 (89) The closest standard values of 249 kΩ and 7.87 kΩ along with a 60-V PNP transistor are used to set the OVP threshold to 40 V with 5 V of hysteresis. 8.2.2.2.13 PWM Dimming Consideration A 60-V, 2-A P-channel FET is used in conjunction with an external level-shift circuit to achieve PWM dimming. The drive strength of 5 mA and gate-source voltage of 15 V are set by the 1-kΩ and 2-kΩ level-translator resistors and a small-signal N-channel MOSFET, whose gate is connected to DDRV. 8.2.2.3 Application Curves These curves are for the buck-boost LED driver. 1600 1503 508 LEDs = 3 LEDs = 9 506 1502 504 1200 1501 502 1500 500 1499 498 1498 496 400 1497 494 200 1496 492 18 0 LED Current (mA) 1400 LED Current (mA) LED Current (mA) 1504 1000 800 600 LEDs = 3 8 9 10 11 12 13 14 VIN (V) 15 16 17 0 0.28 0.56 D022 0.84 1.12 1.4 VIADJ (V) 1.68 1.96 2.24 D023 VIN = 14 V Figure 42. Line Regulation (3 LEDs at 1.5 A and 9 LEDs at 500 mA) 36 Figure 43. LED Current vs IADJ Voltage Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 TPS92691, TPS92691-Q1 www.ti.com SLVSD68 – DECEMBER 2015 100 Effiency (%) 90 80 70 60 LEDs = 3 LEDs = 5 LEDs = 7 LEDs = 9 50 40 100 200 300 400 500 ILED (mA) 700 1000 2000 D024 VIN = 14 V Figure 44. Efficiency from 100 mA to 1.5 A 9 Power Supply Recommendations This device is designed to operate from an input voltage supply range between 4.5 V and 65 V. The input could be a car battery or another preregulated power supply. If the input supply is located more than a few inches from the TPS92691/-Q1 device, additional bulk capacitance or an input filter may be required in addition to the ceramic bypass capacitors to address noise and EMI concerns. 10 Layout 10.1 Layout Guidelines • • • • • • The performance of the switching regulator depends as much on the layout of the PCB as the component selection. Following a few simple guidelines will maximize noise rejection and minimize the generation of EMI within the circuit. Discontinuous currents are the most likely to generate EMI. Therefore, take care when routing these paths. The main path for discontinuous current in the TPS92691/-Q1 Buck regulator contains the input capacitor, CIN, the recirculating diode, D, the N-channel MOSFET, Q1, and the sense resistor, RIS. In the TPS92691/-Q1 Boost regulator, the discontinuous current flows through the output capacitor COUT, diode, D, N-channel MOSFET, Q1, and the current sense resistor, RIS. In Buck-Boost regulator, both loops are discontinuous and should be carefully laid out. These loops should be kept as small as possible and the connection between all the components should be short and thick to minimize parasitic inductance. In particular, the switch node (where L, D, and Q1 connect) should be just large enough to connect the components. To minimize excessive heating, large copper pours can be placed adjacent to the short current path of the switch node. CSP and CSN traces should be routed together with Kelvin connections to the current sense resistor as short as possible. If needed, use common mode and differential mode noise filters to attenuate switching and diode reverse recovery noise from affecting the internal current sense amplifier. The COMP, IS, OVP, PWM, and IADJ pins are all high-impedance inputs that couple external noise easily; therefore, the loops containing these nodes should be minimized whenever possible. In some applications, the LED or LED array can be far away from the TPS92691/-Q1, or on a separate PCB connected by a wiring harness. When an output capacitor is used and the LED array is large or separated from the rest of the regulator, the output capacitor should be placed close to the LEDs to reduce the effects of parasitic inductance on the AC impedance of the capacitor. The TPS92691/-Q1 has an exposed thermal pad to aid power dissipation. Adding several vias under the exposed pad helps conduct heat away from the device. The junction-to-ambient thermal resistance varies with application. The most significant variables are the area of copper in the PCB and the number of vias under the exposed pad. The integrity of the solder connection from the device exposed pad to the PCB is critical. Excessive voids greatly decrease the thermal dissipation capacity. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 37 TPS92691, TPS92691-Q1 SLVSD68 – DECEMBER 2015 www.ti.com 10.2 Layout Example INPUT CONN LED+ GND BOOST VIN LED+ BUCK-BOOST VIA TO BOTTOM GROUND PLANE VCC SS GATE RT/SY PWM COMP IADJ TPS92691Q VIN IS PGND OVP DDRV IMON CSP AGND CSN Figure 45. Layout Recommendation 38 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 TPS92691, TPS92691-Q1 www.ti.com SLVSD68 – DECEMBER 2015 11 Device and Documentation Support 11.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 5. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY TPS92691 Click here Click here Click here Click here Click here TPS92691-Q1 Click here Click here Click here Click here Click here 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.3 Trademarks PowerPAD, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 11.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS92691 TPS92691-Q1 39 PACKAGE OPTION ADDENDUM www.ti.com 16-Jan-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS92691PWP ACTIVE HTSSOP PWP 16 90 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 125 92691 TPS92691PWPR ACTIVE HTSSOP PWP 16 2000 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 125 92691 TPS92691QPWPQ1 ACTIVE HTSSOP PWP 16 90 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 125 92691Q TPS92691QPWPRQ1 ACTIVE HTSSOP PWP 16 2000 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 125 92691Q TPS92691QPWPTQ1 ACTIVE HTSSOP PWP 16 250 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 125 92691Q (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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