TRF37A73IDSGT

Product Folder Sample & Buy Support & Community Tools & Software Technical Documents TRF37A73 SLASE39 – MAY 2014 TRF37A73 1-6000 MHz RF Gain Block 1 Features 3 Description • • • • • • • • • • The TRF37A73 is packaged in a 2.00mm x 2.00mm WSON with a power down pin feature making it ideal for applications where space and low power modes are critical. 2 Applications • • • • • • • • • • • • • • • • • • • General Purpose RF Gain Block Consumer Industrial Utility Meters Low-cost Radios Cellular Base Station Wireless Infrastructure RF Backhaul Radar Electronic Warfare Software-defined Radio Test and Measurement Point-to-Point/Multipoint Microwave Software Defined Radios RF Repeaters Distributed Antenna Systems LO and PA Driver Amplifier Wireless Data, Satellite, DBS, CATV IF Amplifier The TRF37A73 is designed for ease of use. For maximum flexibility, this family of parts uses a common 3.3 V supply and consumes 55 mA. In addition, this family was designed with an active bias circuit that provides a stable and predictable bias current over process, temperature and voltage variations. For gain and linearity budgets the device was designed to provide a flat gain response and excellent OIP3 out to 6000 MHz. For space constrained applications, this family is internally matched to 50 Ω, which simplifies ease of use and minimizes needed PCB area. Device Information(1) PART NUMBER TRF37A73 PACKAGE WSON (32) BODY SIZE (NOM) 2.00mm x 2.00mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Simplified Schematic VCC VCC 1 2 C1 1000pF 8 Output Match 1 MHz – 6000 MHz Gain: 12 dB Noise Figure: 4.5 dB Output P1dB: 14.5 dBm at 2000 MHz Output IP3: 28.5 dBm at 2000 MHz Power Down Mode Single Supply: 3.3 V Stabilized Performance Over Temperature Unconditionally Stable Robust ESD: >1 kV HBM; >1 kV CDM Input Match 1 L1 RF choke 100nH 7 3 6 4 5 C2 1000pF PWDN 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TRF37A73 SLASE39 – MAY 2014 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 4 4 4 4 5 5 6 Absolute Maximum Ratings ...................................... Handling Ratings....................................................... Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Timing Requirements ................................................ Typical Characteristics .............................................. 7.2 Functional Block Diagram ......................................... 8 7.3 Feature Description................................................... 8 7.4 Device Functional Modes.......................................... 8 8 Applications and Implementation ........................ 9 8.1 Application Information.............................................. 9 8.2 Typical Application ................................................... 9 9 Power Supply Recommendations...................... 10 10 Layout................................................................... 11 10.1 Layout Guidelines ................................................. 11 10.2 Layout Example .................................................... 11 11 Device and Documentation Support ................. 12 11.1 Trademarks ........................................................... 12 11.2 Electrostatic Discharge Caution ............................ 12 11.3 Glossary ................................................................ 12 Detailed Description .............................................. 8 12 Mechanical, Packaging, and Orderable Information ........................................................... 12 7.1 Overview ................................................................... 8 4 Revision History 2 DATE REVISION NOTES May 2014 * Initial release. Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: TRF37A73 TRF37A73 www.ti.com SLASE39 – MAY 2014 5 Pin Configuration and Functions DSG PACKAGE (TOP VIEW) 8 NC RFIN 2 7 RFOUT NC 3 6 NC NC 4 5 PWDN Output Match 1 Input Match VCC Pin Functions PIN NAME VCC RFIN NC DESCRIPTION NO. 1 DC Bias. 2 RF input. Connect to an RF source through a DC-blocking capacitor. Internally matched to 50 Ω. 3, 4, 6, 8 No electrical connection. Connect pad to GND for board level reliability integrity. PWDN 5 When high the device is in power down state. When LOW or NC the device is in active state. Internal pulldown resistor to GND. RFOUT 7 RF Output and DC Bias (VCC). Connect to DC supply through an RF choke inductor. Connect to output load through a DC-blocking capacitor. Internally matched to 50 Ω. GND PowerPAD™ RF and DC GND. Connect to PCB ground plane. Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: TRF37A73 3 TRF37A73 SLASE39 – MAY 2014 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) Supply Input voltage MIN MAX UNIT –0.3 3.6 V 10 dBm –40 150 °C Input Power Operating virtual junction temperature range (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 6.2 Handling Ratings TSTG VESD (1) (2) MIN MAX UNIT –65 150 °C Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) –1 1 kV Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) –1 1 kV Storage temperature range Electrostatic discharge JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) Supply Voltage, VCC Operating junction temperature, TJ MIN NOM MAX 3 3.3 3.45 V 125 °C –40 UNIT 6.4 Thermal Information THERMAL METRIC (1) DSG 8 PINS RθJA Junction-to-ambient thermal resistance 79.3 RθJCtop Junction-to-case (top) thermal resistance 110 RθJB Junction-to-board thermal resistance 49 ψJT Junction-to-top characterization parameter 6 ψJB Junction-to-board characterization parameter 49.4 RθJCbot Junction-to-case (bottom) thermal resistance 19.2 (1) 4 UNIT °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: TRF37A73 TRF37A73 www.ti.com SLASE39 – MAY 2014 6.5 Electrical Characteristics VCC = 3V3, TA = 25°C, PWDN = Low, LOUT = 100 nH, C1 = C2 = 1000 pF, ZS = ZL = 50 Ω (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 55 65 UNIT DC PARAMETERS ICC Pdiss Total supply current Power down current PWDN = High Power dissipation mA 125 µA 0.182 W RF FREQUENCY RANGE Frequency range 1 6000 fRF = 400 MHz G Small signal gain MHz 12.5 dB fRF = 2000 MHz 12 dB fRF = 3000 MHz 11.5 dB fRF = 4000 MHz 11.5 dB fRF = 5000 MHz 11 dB fRF = 6000 MHz 10.5 dB OP1dB Output 1dB compression point At 2000 MHz 14.5 dBm OIP3 Output 3rd order intercept point At 2000 MHz, 2-tone 10 MHz apart 28.5 dBm NF Noise figure At 2000 MHz 4.5 dB R(LI) Input return loss At 2000 MHz 16 dB R(LO) Output return loss At 2000 MHz 15 dB PWDN PIN VIH High level input level VIL Low level input level 2 V IIH High level input current 30 µA IIL Low level input current 1 µA 0.8 V 6.6 Timing Requirements MIN TYP MAX UNIT PWDN PIN tON Turn-on Time 50% TTL to 90% POUT 0.6 µs tOFF Turn-off Time 50% TTL to 10% POUT 1.4 µs Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: TRF37A73 5 TRF37A73 SLASE39 – MAY 2014 www.ti.com 6.7 Typical Characteristics 17 17 3.45V 16 3.3V 15 14 3.0V 13 Gain (dB) Gain (dB) 15 3.15V 14 ±40ƒC 25°C 85°C 16 12 11 13 12 11 10 10 9 9 8 8 7 7 0 1000 2000 3000 4000 5000 6000 Frequency (MHz) VCC curves 0 1000 Temp = 25°C Pin = –10 dBm Temp curves 16 16 15 15 14 14 13 12 3.45V 10 C002 VCC = 3.3 V Pin = –10 dBm ±40ƒC 25°C 85°C 13 12 11 7 0 1000 2000 3000 4000 5000 6000 Frequency (MHz) VCC curves 0 1000 2000 3000 4000 Temp = 25°C Temp curves C004 VCC = 3.3 V 35 3.45V 31 3.15V 29 OIP3 (dBm) 29 3.0V 27 ±40ƒC 25°C 85°C 33 3.3V 31 6000 Figure 4. OP1dB vs Frequency 35 33 5000 Frequency (MHz) C003 Figure 3. OP1dB vs Frequency OIP3 (dBm) 6000 8 3.0V 7 25 23 27 25 23 21 21 19 19 17 17 15 15 0 1000 2000 3000 4000 Frequency (MHz) VCC curves Temp = 25°C 5000 6000 0 1000 Pin = –10 dBm/tone 2000 3000 4000 Frequency (MHz) C005 Temp curves Figure 5. OIP3 vs Frequency 6 5000 9 3.15V 8 4000 10 3.3V 9 3000 Figure 2. Gain vs Frequency 17 OP1dB (dBm) OP1dB (dBm) Figure 1. Gain vs Frequency 17 11 2000 Frequency (MHz) C001 VCC = 3.3 V 5000 6000 C006 Pin = –10 dBm/tone Figure 6. OIP3 vs Frequency Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: TRF37A73 TRF37A73 www.ti.com SLASE39 – MAY 2014 6.5 6.5 6 6 5.5 5.5 5 5 NF (dB NF (dB) Typical Characteristics (continued) 4.5 4 4.5 4 3.45V 3.5 3.5 3.3V 3.15V 3 3.0V 2.5 0 1000 2000 3000 4000 5000 2.5 6000 Frequency (MHz) VCC curves ±40ƒC 25°C 85°C 3 0 1000 Temp = 25°C Temp curves Figure 7. NF vs Frequency 3000 4000 5000 6000 C008 VCC = 3.3 V Figure 8. NF vs Frequency 60 60 57 57 54 54 51 Icc (mA) Icc (mA) 2000 Frequency (MHz) C007 3.45V ±40ƒC 25°C 85°C 51 3.3V 48 48 3.15V 3.0V 45 45 1000 2000 3000 4000 5000 Frequency (MHz) VCC curves 6000 0 1000 Temp = 25°C Temp curves 1.4 3000 4000 5000 6000 C010 VCC = 3.3 V Figure 10. ICC vs Frequency 0 16 -5 14 -10 12 0.5 2.0 1.8 1.6 1.0 1.2 0.9 0.8 6 0. 0.7 Figure 9. ICC vs Frequency 0. 4 0 3. 0 .3 4.0 0.2 0.1 20 10 4.0 5.0 3.0 1.4 1.6 1.8 2.0 1.2 0.8 0.9 1.0 0.7 0.6 0.5 0.4 0.3 0.2 0.1 20 -20 - 0.1 Sxx (dB) 5.0 10 -15 10 -20 8 -25 S22 6 -30 S11 4 -35 S12 2 -10 S(1,1) S(2,2) 2000 Frequency (MHz) C009 -0.2 -5. 0 -4. 0 3 -3.0 -0 . S21 -40 .0 -2 .8 -1 .6 -1 4 -1. -1.2 -1.0 - 0.9 -0.8 -0.7 -0. 6 -0 .5 .4 -0 0 0 1000 2000 3000 4000 5000 6000 7000 8000 Frequency (MHz) freq (1.000MHz to 8.000GHz) VCC = 3.3 V Temp = 25°C 1 MHz to 8 GHz Data Taken with EVM and Bias T, De-embedded to DUT pin S21 (dB) 0 C016 VCC = 3.3 V Temp = 25°C 1 MHz to 8 GHz Data Taken with EVM and Bias T, De-embedded to DUT pin Figure 11. Smith Chart – S11, S22 Figure 12. S22, S11, S12, S21 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: TRF37A73 7 TRF37A73 SLASE39 – MAY 2014 www.ti.com 7 Detailed Description 7.1 Overview The device is a 3.3 V general purpose RF gain block. It is a SiGe Darlington amplifier with integrated 50 Ω input and output matching. The device contains an active bias circuit to maintain performance over a wide temperature and voltage range. The included power down function allows the amplifier to shut down saving power when the amplifier is not needed. Fast shut down and start up enable the amplifier to be used in a host of time division duplex applications. 7.2 Functional Block Diagram VCC Output Match RF Input Active Bias and Temperature Compensation Input Match Power Down VCC RF Output 7.3 Feature Description The TRF37A73 is a fixed gain RF amplifier. It is internally matched to 50 Ω on both the input and output. It is a fully cascadable general purpose amplifier. The included active bias circuitry ensures the amplifier performance is optimized over the full operating temperature and voltage ranges. 7.4 Device Functional Modes 7.4.1 Power Down The TRF37A73 PWDN pin can be left unconnected for normal operation or a logic-high for disable mode operation. For applications that use the power down mode, normal 5 V TLL levels are supported. 8 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: TRF37A73 TRF37A73 www.ti.com SLASE39 – MAY 2014 8 Applications and Implementation 8.1 Application Information The TRF37A73 is a wideband, high performance, general purpose RF amplifier. To maximize its performance, good RF layout and grounding techniques should be employed. 8.2 Typical Application The TRF37A73 device is typically placed in a system as illustrated in Figure 13. VCC C5 DC Bypass Capacitor C4 RF Bypass Capacitors C3 L1 RF In 1 VCC 8 2 RFIN RFOUT 7 C1 3 DC Blocking Capacitor 4 PWDN RF Choke Inductor RF Out 6 C2 5 DC Blocking Capacitor Figure 13. Typical Application Schematic for TRF37A73 8.2.1 Design Requirements Table 1. Design Parameters PARAMETERS EXAMPLE VALUES Input power range < 3 dBm Output power < 18 dBm Operating frequency range 1 — 6000 MHz Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: TRF37A73 9 TRF37A73 SLASE39 – MAY 2014 www.ti.com 8.2.2 Detailed Design Procedure The TRF37A73 is a simple to use internally matched and cascadable RF amplifier. Following the recommended RF layout with good quality RF components and local DC bypass capacitors will ensure optimal performance is achieved. TI provides various support materials including S-Parameter and ADS models to allow the design to be optimized to the user's particular performance needs. 22 22 20 20 18 18 16 16 14 14 12 12 OP1dB 10 10 NF 8 8 6 6 4 4 2 2 0 0 1000 NF (dB) OP1dB (dBm) 8.2.3 Application Curve 2000 3000 4000 5000 0 6000 Frequency (MHz) C017 Figure 14. OP1dB and NF vs Frequency 9 Power Supply Recommendations All supplies may be generated from a common nominal 3.3 V source but should be isolated through decoupling capacitors placed close to the device. The typical application schematic in Figure 13 is an excellent example. Select capacitors with self-resonant frequency near the application frequency. When multiple capacitors are used in parallel to create a broadband decoupling network, place the capacitor with the higher self-resonant frequency closer to the device. Expensive tantalum capacitors are not needed for optimal performance. 10 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: TRF37A73 TRF37A73 www.ti.com SLASE39 – MAY 2014 10 Layout 10.1 Layout Guidelines Good layout practice helps to enable excellent linearity and isolation performance. An example of good layout is shown in Figure 15. In the example, only the top signal layer and its adjacent ground reference plane are shown. • Excellent electrical connection from the PowerPAD™ to the board ground is essential. Use the recommended footprint, solder the pad to the board, and do not include solder mask under the pad. • Connect pad ground to device terminal ground on the top board layer. • Verify that the return DC and RF current path have a low impedance ground plane directly under the package and RF signal traces into and out of the amplifier. • Ensure that ground planes on the top and any internal layers are well stitched with vias. • Do not route RF signal lines over breaks in the reference ground plane. • Avoid routing clocks and digital control lines near RF signal lines. • Do not route RF or DC signal lines over noisy power planes. Ground is the best reference, although clean power planes can serve where necessary. • Place supply decoupling close to the device. 10.2 Layout Example VCC DC Bypass Capacitor Note: Single DC bypass capacitor can be used as long as it is close to the pin 1 and is tied to the common ground plane DC Bypass Capacitor RF Bypass Capacitors RF Choke Inductor VCC 11 RF In 88 NC RFIN 22 77 RFOUT NC 33 66 NC 44 55 PWDN DC Blocking Capacitor NC RF Out DC Blocking Capacitor Note: Ensure good RF microstrip or stripline traces are used to connect the external components to the RF input and output pins Note: Ensure all components are connected to a common RF/DC ground plane with plenty of vias Figure 15. Layout Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: TRF37A73 11 TRF37A73 SLASE39 – MAY 2014 www.ti.com 11 Device and Documentation Support 11.1 Trademarks PowerPAD is a trademark of Texas Instruments. 11.2 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.3 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 12 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: TRF37A73 PACKAGE OPTION ADDENDUM www.ti.com 11-Aug-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TRF37A73IDSGR ACTIVE WSON DSG 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 A73I Samples TRF37A73IDSGT ACTIVE WSON DSG 8 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 A73I Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of