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TRS3243CPWR

TRS3243CPWR

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    TSSOP28

  • 描述:

    IC TRANSCEIVER FULL 3/5 28TSSOP

  • 数据手册
  • 价格&库存
TRS3243CPWR 数据手册
TRS3243 SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 TRS3243 3-V to 5.5-V Multichannel RS-232 Line Driver and Receiver With ±15-kV ESD (HBM) Protection 1 Features 2 Applications • • • • • • • • • • • • • • • • • • • Operates with 3-V to 5.5-V VCC supply Single-chip and single-supply interface for IBM® PC/AT™ serial port RS-232 bus-pin ESD protection of ±15 kV using human-body model (HBM) Meets or exceeds the requirements of TIA/EIA-232-F and ITU V.28 standards Three drivers and five receivers Operates up to 250 kbps Low active current: 300-μA typical Low standby current: 1-μA typical External capacitors: 4 × 0.1 μF Accepts 5-V logic input with 3.3-V supply Always-active noninverting receiver output (ROUT2B) Operating temperature – TRS3243C: 0°C to 70°C – TRS3243I: –40°C to 85°C Serial-mouse driveability Automatic power-down feature to disable driver outputs when no valid RS-232 signal is sensed Battery-powered systems Tablets Notebooks Laptops Hand-held equipment 3 Description The TRS3243 device consists of three line drivers, and five line receivers, which is ideal for DE-9 DTE interface. A ±15-kV ESD (HBM) protection pin-to-pin (serial-port connection pins, including GND). Flexible power features save power automatically. Special outputs ROUT2B and INVALID are always enabled to allow checking for ring indicator and valid RS232 input. Package Information PART NUMBER TRS3243 (1) PACKAGE(1) BODY SIZE (NOM) SSOP (28) 10.20 mm × 5.30 mm TSSOP (28) 9.70 mm × 4.40 mm For all available packages, see the orderable addendum at the end of the data sheet. 3.3 V, 5 V POWER FORCEON FORCEOFF 3 3 TX DIN DOUT RS232 5 ROUT 5 RX RIN RS232 INVALID STATUS Simplified Schematic An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3 6 Specifications.................................................................. 4 6.1 Absolute Maximum Ratings........................................ 4 6.2 ESD Ratings............................................................... 4 6.3 Recommended Operating Conditions.........................4 6.4 Thermal Information....................................................5 6.5 Electrical Characteristics—Power and Status.............5 6.6 Electrical Characteristics—Driver............................... 6 6.7 Electrical Characteristics—Receiver...........................6 6.8 Switching Characteristics—Power and Status............7 6.9 Switching Characteristics—Driver...............................7 6.10 Switching Characteristics—Receiver........................ 7 6.11 Typical Characteristics.............................................. 8 7 Parameter Measurement Information............................ 9 8 Detailed Description...................................................... 11 8.1 Overview................................................................... 11 8.2 Functional Block Diagram......................................... 11 8.3 Feature Description...................................................12 8.4 Device Functional Modes..........................................13 9 Application and Implementation.................................. 14 9.1 Application Information............................................. 14 9.2 Typical Application.................................................... 14 9.3 Power Supply Recommendations.............................15 9.4 Layout....................................................................... 15 10 Device and Documentation Support..........................17 10.1 Support Resources................................................. 17 10.2 Trademarks............................................................. 17 10.3 Electrostatic Discharge Caution..............................17 10.4 Glossary..................................................................17 11 Mechanical, Packaging, and Orderable Information.................................................................... 17 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (June 2015) to Revision C (October 2022) Page • Changed the Thermal Information table............................................................................................................. 5 • Changed the MAX value of ICC Supply current auto-powerdown disabled from 1 mA to 1.2 mA in Electrical Characteristics—Power and Status ................................................................................................................... 5 Changes from Revision A (September 2011) to Revision B (June 2015) Page • Added Pin Functions table, ESD Ratings table, Thermal Information table, Typical Characteristics section, Detailed Description, Application and Implementation, Power Supply Recommendations, Layout, Device and Documentation Support and Mechanical, Packaging, and Orderable Information sections...............................1 • Deleted Ordering Information table.....................................................................................................................3 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 5 Pin Configuration and Functions C2+ 1 28 C1+ C2- 2 27 V+ V- 3 26 V   CC RIN1 4 25 GND RIN2 5 24 C1- RIN3 6 23 FORCEON RIN4 7 22 FORCEOFF RIN5 8 21 INVALID DOUT1 9 20 ROUT2B DOUT2 10 19 ROUT1 DOUT3 11 18 ROUT2 DIN3 12 17 ROUT3 DIN2 13 16 ROUT4 DIN1 14 15 ROUT5 Not to scale Figure 5-1. DB, PW Packages, 28-Pin SSOP, TSSOP (Top View) Table 5-1. Pin Functions PIN NO. NAME TYPE DESCRIPTION 1 C2+ — Positive terminal of the voltage-doubler charge-pump capacitor 2 C2- — Negative terminal of the voltage-doubler charge-pump capacitor 3 V- 4 RIN1 5 RIN2 6 RIN3 7 RIN4 8 RIN5 9 DOUT1 10 DOUT2 11 DOUT3 12 DIN3 13 DIN2 14 DIN1 15 ROUT5 16 ROUT4 17 ROUT3 18 ROUT2 19 ROUT1 20 21 Negative charge pump output voltage I RS-232 receiver inputs O RS-232 driver outputs I Driver inputs O Receiver outputs ROUT2B — Always-active noninverting receiver output; INVALID O Invalid Output Pin 22 FORCEOFF I Auto Powerdown Control input (Refer to Truth Table) 23 FORCEON I Auto Powerdown Control input (Refer to Truth Table) 24 C1- — Negative terminal of the voltage-doubler charge-pump capacitor 25 GND — Ground 26 VCC — 3-V to 5.5-V supply voltage 27 V+ — Positive charge pump output voltage 28 C1+ — Positive terminal of the voltage-doubler charge-pump capacitor Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 3 TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) Supply voltage(2) VCC voltage(2) V+ Positive output supply V– Negative output supply voltage(2) V+ – V– Supply voltage Input voltage VO Output voltage TJ Operating virtual junction temperature Tstg Storage temperature (2) MAX UNIT 6 V –0.3 7 V 0.3 –7 V 13 V difference(2) VI (1) MIN –0.3 Driver, FORCEOFF, FORCEON –0.3 6 Receiver –25 25 Driver –13.2 13.2 Receiver, INVALID –0.3 VCC + 0.3 –65 V V 150 °C 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to network GND. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 RIN , DOUT, and GND pins (1) ±15000 Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 All other pins(1) ±3000 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±1000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions (see Figure 9-1)(1) VCC = 3.3 V VCC Supply voltage VCC = 5 V NOM 3 3.3 3.6 4.5 5 5.5 V 2 5.5 5.5 DIN, FORCEOFF, FORCEON 0 0.8 V DIN, FORCEOFF, FORCEON 0 5.5 V –25 25 V 0 70 –40 85 Driver and control high-level input voltage DIN, FORCEOFF, FORCEON VIL Driver and control low-level input voltage VI Driver and control input voltage VI Receiver input voltage VCC = 5 V TRS3243C TA Operating free-air temperature (1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. 4 MAX UNIT 2.4 VIH VCC = 3.3 V MIN TRS3243I Submit Document Feedback V °C Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 6.4 Thermal Information THERMAL METRIC(1) {DB} (SSOP) {PW} (TSSOP) 16 PINS 16 PINS UNIT RθJA Junction-to-ambient thermal resistance 76.1 70.3 °C/W RθJC(top) Junction-to-case (top) thermal resistance 35.8 21.0 °C/W RθJB Junction-to-board thermal resistance 37.4 29.2 °C/W ψJT Junction-to-top characterization parameter 7.4 1.3 °C/W ψJB Junction-to-board characterization parameter 37.0 28.8 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report (SPRA953). 6.5 Electrical Characteristics—Power and Status over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1) (see Figure 9-1) PARAMETER TEST CONDITIONS MIN TYP(2) MAX 0.3 1.2 UNIT Supply current Automatic power down disabled No load, FORCEOFF and FORCEON at VCC. TA = 25°C Supply current Powered off No load, FORCEOFF at GND. TA = 25°C 1 10 Supply current Automatic power down enabled No load, FORCEOFF at VCC, FORCEON at GND, All RIN are open or grounded, All DIN are grounded. TA = 25°C 1 10 Input leakage current of FORCEOFF, FORCEON VI = VCC or VI at GND ±0.01 ±1 μA VIT+ Receiver input threshold for INVALID high-level output voltage FORCEON = GND, FORCEOFF = VCC 2.7 V VIT– Receiver input threshold for INVALID high-level output voltage FORCEON = GND, FORCEOFF = VCC –2.7 VT Receiver input threshold for INVALID low-level output voltage FORCEON = GND, FORCEOFF = VCC –0.3 VOH INVALID high-level output voltage IOH = –1 mA, FORCEON = GND, FORCEOFF = VCC VOL INVALID low-level output voltage IOL = 1.6 mA, FORCEON = GND, FORCEOFF = VCC ICC II (1) (2) mA μA V 0.3 VCC – 0.6 V V 0.4 V Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 5 TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 6.6 Electrical Characteristics—Driver over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1) (see Figure 9-1) PARAMETER TEST CONDITIONS MIN TYP(2) MAX UNIT VOH High-level output voltage All DOUT at RL = 3 kΩ to GND 5 5.4 V VOL Low-level output voltage All DOUT at RL = 3 kΩ to GND –5 –5.4 V VO Output voltage (mouse driveability) DIN1 = DIN2 = GND, DIN3 = VCC, 3 kΩ to GND at DOUT3, DOUT1 = DOUT2 = 2.5 mA ±5 IIH High-level input current VI = VCC ±0.01 ±1 μA IIL Low-level input current VI at GND ±0.01 ±1 μA Vhys Input hysteresis ±1 V IOS Short-circuit output current(3) ±60 mA ro Ioff (1) (2) (3) VCC = 3.6 V, VO = 0 V VCC = 5.5 V, VO = 0 V Output resistance VCC = 0 V, V+ = 0 V, and V– = 0 V, VO = ±2 V Output leakage current FORCEOFF = GND, V ±35 300 10M Ω VO = ±12 V, VCC = 3 to 3.6 V ±25 VO = ±10 V, VCC = 4.5 to 5.5 V ±25 μA Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Short-circuit durations must be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one output should be shorted at a time. 6.7 Electrical Characteristics—Receiver over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1) (see Figure 9-1) PARAMETER VOH High-level output voltage IOH = –1 mA VOL Low-level output voltage IOH = 1.6 mA MIN TYP(2) VCC – 0.6 VCC – 0.1 MAX 0.4 1.6 2.4 VCC = 5 V 1.9 2.4 Positive-going input threshold voltage VIT– Negative-going input threshold voltage Vhys Input hysteresis (VIT+ – VIT–) Ioff Output leakage current (except ROUT2B) FORCEOFF = 0 V rI Input resistance VI = ±3 V or ±25 V VCC = 3.3 V 0.6 1.1 VCC = 5 V 0.8 1.4 V V V 0.5 3 UNIT V VCC = 3.3 V VIT+ (1) (2) 6 TEST CONDITIONS V ±0.05 ±10 μA 5 7 kΩ Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 6.8 Switching Characteristics—Power and Status over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 7-5) PARAMETER TYP(1) TEST CONDITIONS UNIT tvalid Propagation delay time, low- to high-level output VCC = 5 V 1 μs tinvalid Propagation delay time, high- to low-level output VCC = 5 V 30 μs ten Supply enable time VCC = 5 V 100 μs (1) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. 6.9 Switching Characteristics—Driver over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1) (see Figure 9-1) TRS3243C, TRS3243I PARAMETER TEST CONDITIONS Maximum data rate RL = 3 kΩ One DOUT switching, CL = 1000 pF See Figure 7-1 tsk(p) Pulse skew(3) RL = 3 kΩ to 7 kΩ CL = 150 pF to 2500 pF See Figure 7-3 SR(tr) Slew rate, transition region (see Figure 7-1) VCC = 3.3 V, RL = 3 kΩ to 7 kΩ (1) (2) (3) MIN TYP(2) 150 250 kbps 100 ns MAX CL = 150 pF to 1000 pF 6 30 CL = 150 pF to 2500 pF 4 30 UNIT V/μs Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V + 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Pulse skew is defined as |tPLH – tPHL| of each channel of the same device. 6.10 Switching Characteristics—Receiver over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1) PARAMETER tPLH Propagation delay time, low- to high-level output tPHL Propagation delay time, high- to low-level output ten Output enable time tdis Output disable time tsk(p) (1) (2) (3) Pulse skew(3) TYP(2) TEST CONDITIONS UNIT CL = 150 pF, See Figure 7-3 150 ns 150 ns CL = 150 pF, RL = 3 kΩ, See Figure 7-4 200 ns 200 ns See Figure 7-3 50 ns Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Pulse skew is defined as |tPLH - tPHL| of each channel of the same device. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 7 TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 6.11 Typical Characteristics VCC = 3.3 V 0 6 5 -1 4 -2 VOL (V) VOH (V) VOH 3 -3 2 -4 1 -5 0 -6 VOL 0 5 10 15 20 25 30 Load Current (mA) 0 5 10 15 20 25 30 Load Current (mA) C001 Figure 6-1. DOUT VOH vs Load Current 8 35 35 C001 Figure 6-2. DOUT VOL vs Load Current Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 7 Parameter Measurement Information 3V Generator (see Note B) 50 Ω RL TEST CIRCUIT 0V CL (see Note A) 3V FORCEOFF A. B. Input RS-232 Output t TLH t THL −3 V −3 V 6V SR(tr) = t THL or t TLH VOH 3V 3V Output VOL VOLTAGE WAVEFORMS CL includes probe and jig capacitance. The pulse generator has the following characteristics: PRR = 250 kbps, (MAX3243C/I) and 1 Mbit/s (MAX3243FC/I), ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 7-1. Driver Slew Rate 3V Generator (see Note B) RS-232 Output 50 Ω RL Input 0V CL (see Note A) t PHL t PLH VOH 3V FORCEOFF 50% 50% Output VOL TEST CIRCUIT A. B. 1.5 V 1.5 V VOLTAGE WAVEFORMS CL includes probe and jig capacitance. The pulse generator has the following characteristics: PRR = 250 kbps, (MAX3243C/I) and 1 Mbit/s (MAX3243FC/I), ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 7-2. Driver Pulse Skew 3 V or 0 V FORCEON 3V Input 1.5 V 1.5 V −3 V Output Generator (see Note B) 50 Ω 3V FORCEOFF t PHL CL (see Note A) t PLH VOH 50% Output 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 7-3. Receiver Propagation Delay Times Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 9 TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 3V Input VCC 3 V or 0 V FORCEON 1.5 V GND S1 0V t PZH (S1 at GND) t PHZ (S1 at GND) RL 3 V or 0 V 1.5 V VOH Output 50% Output CL (see Note A) FORCEOFF Generator (see Note B) 0.3 V t PZL (S1 at VCC) t PLZ (S1 at VCC) 50 Ω 0.3 V Output 50% VOL TEST CIRCUIT A. B. C. D. VOLTAGE WAVEFORMS CL includes probe and jig capacitance. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. tPLZ and tPHZ are the same as tdis. tPZL and tPZH are the same as ten. Figure 7-4. Receiver Enable and Disable Times 2.7 V 2.7 V 0V Receiver Input 0V 50 Ω −2.7 V −2.7 V ROUT Generator (see Note B) 3V −3 V t valid t invalid VCC 50% VCC 0V INVALID Output Automatic power down t en INVALID CL = 30 pF (see Note A) 50% VCC V+ ≈V+ 0.3 V VCC 0V 0.3 V Supply Voltages FORCEOFF DIN FORCEON DOUT V− ≈V− TEST CIRCUIT VOLTAGE WAVEFORMS Valid RS-232 Level, INVALID High 2.7 V Indeterminate 0.3 V 0V If Signal Remains Within This Region For More Than 30 µs, INVALID Is Low (see Note C) −0.3 V Indeterminate −2.7 V Valid RS-232 Level, INVALID High A. B. C. CL includes probe and jig capacitance. The pulse generator has the following characteristics: PRR = 5 kbps, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Automatic power down disables drivers and reduces supply current to 1 μA. Figure 7-5. INVALID Propagation Delay Times and Supply Enabling Time 10 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 8 Detailed Description 8.1 Overview The TRS3243 device consists of three line drivers, five line receivers, and a dual charge-pump circuit with ±15-kV ESD (HBM) protection pin-to-pin (serial-port connection pins, including GND). The TRS3243 device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. This combination of drivers and receivers matches what is needed for the typical serial port used in an IBM PC, AT, or compatible device. The charge pump and four small external capacitors allow operation from one 3-V to 5.5-V supply. In addition, the device includes an always-active noninverting output (ROUT2B), which allows applications using the ring indicator to transmit data while the device is powered down. Flexible control options for power management are available when the serial port is inactive. The automatic power-down feature functions when FORCEON is low and FORCEOFF is high. During this mode of operation, if the device does not sense a valid RS-232 signal, the driver outputs are disabled. If FORCEOFF is set low, both drivers and receivers (except ROUT2B) are shut off, and the supply current is reduced to 1 µA. Disconnecting the serial port or turning off the peripheral drivers causes the automatic power-down condition to occur. Automatic power down can be disabled when FORCEON and FORCEOFF are high and must be done when driving a serial mouse. With automatic power down enabled, the device is activated automatically when a valid signal is applied to any receiver input. The INVALID output is used to notify the user if an RS-232 signal is present at any receiver input. INVALID is high (valid data) if any receiver input voltage is greater than 2.7 V, is less than –2.7 V, or has been between –0.3 V and 0.3 V for less than 30 µs. INVALID is low (invalid data) if all receiver input voltages are between –0.3 V and 0.3 V for more than 30 µs. 8.2 Functional Block Diagram DIN1 DIN2 DIN3 FORCEOFF 14 9 DOUT1 13 10 DOUT2 12 11 DOUT3 22 21 Automatic Power Down INVALI D 23 FORCEON ROUT1 19 4 20 5 kΩ 18 5 RIN1 ROUT2B ROUT2 RIN2 5 kΩ 17 6 ROUT3 RIN3 5 kΩ ROUT4 7 16 RIN4 5 kΩ ROUT5 15 8 RIN5 5 kΩ Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 11 TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 8.3 Feature Description 8.3.1 Automatic Power Down Automatic power down can be used to automatically save power when the receivers are unconnected or when they are connected to a powered down remote RS232 port. FORCEON being high overrides automatic power down and the drivers are active. FORCEOFF being low overrides FORCEON and powers down all outputs except for ROUT2B and INVALID. 8.3.2 Charge Pump The charge pump increases, inverts, and regulates voltage at V+ and V– pins. The charge pump requires four external capacitors. 8.3.3 RS232 Driver Three drivers interface standard logic level to RS232 levels. All DIN inputs must be valid high or low. 8.3.4 RS232 Receiver Five receivers interface RS232 levels to standard logic levels. An open input results in a high output on ROUT. Each RIN input includes an internal standard RS232 load. 8.3.5 ROUT2B Receiver ROUT2B is an always-active, noninverting output of RIN2 input, which allows applications using the ring indicator to transmit data while the device is powered down. 8.3.6 Invalid Input Detection The INVALID output goes active low when all RIN inputs are unpowered. The INVALID output goes inactive high when any RIN input is connected to an active RS232 voltage level. 12 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 8.4 Device Functional Modes Table 8-1. Each Driver(1) INPUTS DIN (1) FORCEON OUTPUT FORCEOFF VALID RIN RS-232 LEVEL DRIVER STATUS DOUT X X L X Z Powered off L H H X H H H H X L Normal operation with automatic power down disabled L L H YES H H L H YES L X L H NO Z Normal operation with automatic power down enabled Power off by automatic power down feature H = high level, L = low level, X = irrelevant, Z = high impedance, YES = any RIN valid, NO = all RIN invalid Table 8-2. Each Receiver(1) INPUTS (1) OUTPUTS RIN FORCEON FORCEOFF ROUT X X L Z L X H H H X H L Open X H H RECEIVER STATUS Powered off Normal operation H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off Table 8-3. INVALID and ROUT2B Outputs(1) INPUTS VALID RIN RS-232 LEVEL (1) OUTPUTS RIN2 FORCEON FORCEOFF INVALID YES L X X H L YES H X X H H YES OPEN X X H L NO OPEN X X L L OUTPUT STATUS ROUT2B Always Active Always Active H = high level, L = low level, X = irrelevant, Z = high impedance (off), OPEN = input disconnected or connected driver off, YES = any RIN valid, NO = all RIN invalid Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 13 TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 9 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 9.1 Application Information The TRS3243 device is designed to convert single-ended signals into RS232-compatible signals, and viceversa. This device can be used in any application where RS232 line driver or receiver is required. One benefit of this device is its ESD protection, which helps protect other components on the board when the RS232 lines are tied to a physical connector. The device also features an automatic power-down circuit. 9.2 Typical Application C1+ 1 + C2 − 2 3 − V− GND C1− RIN2 RIN3 RIN4 RIN5 DOUT1 RS-232 Outputs VCC + RIN1 RS-232 Inputs C2− DOUT2 4 27 + − 26 25 C3(A) + + CBYPASS − = 0.1 µF − C1 24 23 FORCEON 5 Automatic Power down C4 V+ C2+ 28 6 7 22 FORCEOFF 8 21 9 20 10 19 INVALID ROUT2B ROUT1 5 kΩ DOUT3 18 11 ROUT2 5 kΩ DIN3 12 Logic Outputs 17 ROUT3 5 kΩ Logic Inputs DIN2 13 16 ROUT4 5 kΩ DIN1 14 15 ROUT5 5 kΩ A. B. C. C3 can be connected to VCC or GND. Resistor values shown are nominal. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they must be connected as shown. Figure 9-1. Typical Operating Circuit and Capacitor Values 14 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 9.2.1 Design Requirements • • VCC minimum is 3 V and maximum is 5.5 V Maximum recommended bit rate is 250 kbps Table 9-1. VCC versus Capacitor Values VCC C1 C2, C3, C4 3.3 V ± 0.3 V 0.1 µF 0.1 µF 5 V ± 0.5 V 0.047 µF 0.33 µF 3 V to 5.5 V 0.1 µF 0.47 µF 9.2.2 Detailed Design Procedure It is recommended to add capacitors as shown in Figure 9-1. All DIN, FORCEOFF and FORCEON inputs must be connected to valid low or high logic levels. Select capacitor values based on VCC level for best performance. 9.2.3 Application Curve Voltage (V) VCC= 3.3 V 6 5 4 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 DIN DOUT to RIN ROUT 0 1 2 3 4 5 Time (µs) 6 7 C001 Figure 9-2. Driver to Receiver Loopback Timing Waveform 9.3 Power Supply Recommendations VCC must be between 3 V and 5.5 V. Charge pump capacitors must be chosen using Table 9-1. 9.4 Layout 9.4.1 Layout Guidelines Keep the external capacitor traces short. This is more important on C1 and C2 nodes that have the fastest rise and fall times. Figure 9-3 shows only critical layout sections. Input and output traces will vary in shape and size depending on the customer application. FORCEON and FORCEOFF must be pulled up to VCC or GND through a pullup resistor, depending on which configuration is desired upon powerup. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 15 TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 9.4.2 Layout Example C1 1 C2+ C1+ 28 2 C2- V+ 27 C2 Ground C3 Ground 3 V- VCC 26 4 RIN1 GND 25 5 RIN2 C1- 24 6 RIN3 FORCEON 23 7 RIN4 FORCEOFF 22 8 RIN5 INVALID 21 9 DOUT1 ROUT2B 20 10 DOUT2 ROUT1 19 11 DOUT3 ROUT2 18 12 DIN3 ROUT3 17 13 DIN2 ROUT4 16 14 DIN1 ROUT5 15 C4 VCC 0.1 μF Ground Figure 9-3. Layout Diagram 16 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 TRS3243 www.ti.com SLLS806C – JUNE 2007 – REVISED OCTOBER 2022 10 Device and Documentation Support 10.1 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 10.2 Trademarks PC/AT™ is a trademark of IBM. TI E2E™ is a trademark of Texas Instruments. IBM® is a registered trademark of IBM. All trademarks are the property of their respective owners. 10.3 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 10.4 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 11 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243 17 PACKAGE OPTION ADDENDUM www.ti.com 18-Nov-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TRS3243CDBR ACTIVE SSOP DB 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TRS3243C TRS3243CPW LIFEBUY TSSOP PW 28 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 RS43C TRS3243CPWR LIFEBUY TSSOP PW 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 RS43C TRS3243IDB LIFEBUY SSOP DB 28 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TRS3243I TRS3243IDBR ACTIVE SSOP DB 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TRS3243I TRS3243IPW LIFEBUY TSSOP PW 28 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 RS43I TRS3243IPWR LIFEBUY TSSOP PW 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 RS43I (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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