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TRS3243ECDB

TRS3243ECDB

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SSOP28

  • 描述:

    IC TRANSCEIVER FULL 3/5 28SSOP

  • 数据手册
  • 价格&库存
TRS3243ECDB 数据手册
TRS3243E SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 TRS3243E 3-V to 5.5-V Multichannel RS-232 Line Driver or Receiver With ±15-kV IEC ESD Protection 1 Features • • • • • • • • • • • • • 3 Description IBM™ Single-chip and single-supply interface for PC/AT™ serial port ESD Protection for RS-232 bus pins – ±15-kV Human-body model (HBM) – ±8-kV IEC61000-4-2, Contact discharge – ±15-kV IEC61000-4-2, Air-gap discharge Meets or exceeds requirements of TIA/EIA-232-F and ITU v.28 standards Operates with 3-V to 5.5-V VCC supply Always-active noninverting receiver output (ROUT2B) Designed to transmit at a data rate up to 500 kbit/s Low standby current: 1 μA typical External capacitors: 4 × 0.1 μF Accepts 5-V logic input with 3.3-V supply Designed to be interchangeable with industry standard '3243E devices Serial-mouse driveability Auto-powerdown feature to disable driver outputs when no valid RS-232 signal is sensed Package options include plastic small-outline (DW), shrink small-outline (DB), and thin shrink small-outline (PW) The TRS3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with ±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge) protection on serial-port connection pins. The device meets the requirements of TIA/ EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. This combination of drivers and receivers matches that needed for the typical serial port used in an IBM PC/AT, or compatible. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. In addition, the device includes an always-active noninverting output (ROUT2B), which allows applications using the ring indicator to transmit data while the device is powered down. The device operates at data signaling rates up to 250 kbit/s and a maximum of 30-V/μs driver output slew rate. Package Information PACKAGE(1) PART NUMBER TRS3243E 2 Applications • • • • • • Battery-powered systems Personel electronics Notebooks Laptops Palmtop PCs Hand-held equipment (1) BODY SIZE (NOM) SSOP (DB) 10.20 mm × 5.30 mm SOIC (DW) 17.90 mm x 7.50mm TSSOP (PW) 9.70 mm x 4.40 mm VQFN (RHB) 5.00 mm x 5.00 mm For all available packages, see the orderable addendum at the end of the data sheet. 3.3 V, 5 V POWER FORCEOFF AUTOPOWERDOWN FORCEON 3 DIN 3 DOUTx RS-232 TX 5 5 ROUT RX RIN RS-232 ROUT2B RX RIN2 RS-232 STATUS INVALID Simplified Circuit An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3 6 Specifications.................................................................. 6 6.1 Absolute Maximum Ratings........................................ 6 6.2 ESD Ratings............................................................... 6 6.3 ESD Ratings - IEC Specifications............................... 6 6.4 Recommended Operating Conditions.........................7 6.5 Thermal Information....................................................7 6.6 Electrical Characteristics.............................................8 6.7 Switching Characteristics............................................9 7 Parameter Measurement Information.......................... 10 8 Detailed Description......................................................13 8.1 Overview................................................................... 13 8.2 Functional Block Diagram......................................... 13 8.3 Device Functional Modes..........................................14 9 Application and Implementation.................................. 15 9.1 Typical Application.................................................... 15 10 Device and Documentation Support..........................18 10.1 Receiving Notification of Documentation Updates..18 10.2 Support Resources................................................. 18 10.3 Trademarks............................................................. 18 10.4 Electrostatic Discharge Caution..............................18 10.5 Glossary..................................................................18 11 Mechanical, Packaging, and Orderable Information.................................................................... 18 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (September 2011) to Revision D (October 2022) Page • Deleted the Ordering Information table...............................................................................................................1 • Added Device Information table, Pin Configuration and Functions section, Feature Description section, Device Functional Modes, Application and Implementation section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ........................................................ 1 • Changed the front page image from Block Diagram to Simplified Circuit...........................................................1 • Added the ESD Ratings - IEC Specifications table.............................................................................................6 • Changed the ICC Supply current auto-powerdown disabled MAX value from 1 mA to 1.2 mA in the Electrical Characteristics ................................................................................................................................................... 8 Changes from Revision B (July 2009) to Revision C (September 2011) Page • Deleted "VALID RIN RS-232 LEVEL" from INPUTS.........................................................................................14 • Deleted "ROUT2B is active" RECEIVER STATUS and combined ROUT outputs............................................14 • Added table "ROUT2B and INVALID Outputs" defining truth for ROUT2B and INVALID outputs. .................. 14 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 5 Pin Configuration and Functions C2+ 1 28 C1+ C2- 2 27 V+ V- 3 26 V   CC RIN1 4 25 GND RIN2 5 24 C1- RIN3 6 23 FORCEON RIN4 7 22 FORCEOFF RIN5 8 21 INVALID DOUT1 9 20 ROUT2B DOUT2 10 19 ROUT1 DOUT3 11 18 ROUT2 DIN3 12 17 ROUT3 DIN2 13 16 ROUT4 DIN1 14 15 ROUT5 Not to scale Figure 5-1. DB, DW, or PW Package, 28 Pin (SSOP, SOIC, TSSOP) (Top View) Table 5-1. Pin Functions PIN NO. NAME TYPE DESCRIPTION 1 C2+ — Positive terminal of the voltage-doubler charge-pump capacitor 2 C2- — Negative terminal of the voltage-doubler charge-pump capacitor 3 V- 4 RIN1 5 RIN2 6 RIN3 7 RIN4 8 RIN5 9 DOUT1 10 DOUT2 11 DOUT3 12 DIN3 13 DIN2 14 DIN1 15 ROUT5 16 ROUT4 17 ROUT3 18 ROUT2 19 ROUT1 20 Negative charge pump output voltage I RS-232 receiver inputs O RS-232 driver outputs I Driver inputs O Receiver outputs ROUT2B — Always-active noninverting receiver output; 21 INVALID O Invalid Output Pin 22 FORCEOFF I Auto Powerdown Control input (Refer to Truth Table) 23 FORCEON I Auto Powerdown Control input (Refer to Truth Table) 24 C1- — Negative terminal of the voltage-doubler charge-pump capacitor 25 GND — Ground 26 VCC — 3-V to 5.5-V supply voltage 27 V+ — Positive charge pump output voltage 28 C1+ — Positive terminal of the voltage-doubler charge-pump capacitor Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E 3 TRS3243E www.ti.com NC V- C2- C2+ C1+ V+ V   CC NC 32 31 30 29 28 27 26 25 SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 6 19 ROUT2B DOUT2 7 18 ROUT1 DOUT3 8 17 ROUT2 16 DOUT1 NC INVALID 15 20 ROUT3 5 14 RIN5 13 FORCEOFF ROUT4 21 ROUT5 4 12 FORCEON RIN4 11 22 DIN2 3 DIN1 C1- RIN3 9 GND 23 10 24 2 NC 1 RIN2 DIN3 RIN1 Not to scale Figure 5-2. RHB Package, 32 Pin (VQFN) (Top View) Table 5-2. Pin Functions PIN NO. 4 NAME 1 RIN1 2 RIN2 3 RIN3 4 RIN4 5 RIN5 6 DOUT1 7 DOUT2 8 DOUT3 9 NC 10 DIN3 11 DIN2 12 DIN1 13 ROUT5 14 ROUT4 15 ROUT3 16 NC 17 ROUT2 18 ROUT1 19 20 TYPE DESCRIPTION I RS-232 receiver inputs O RS-232 driver outputs — Not connected internally I Driver inputs O Receiver outputs — Not connected internally O Receiver outputs ROUT2B O Always-active noninverting receiver output INVALID O Invalid Output Pin 21 FORCEOFF I Auto Powerdown Control input (Refer to Truth Table) 22 FORCEON I Auto Powerdown Control input (Refer to Truth Table) 23 C1- — Negative terminal of the voltage-doubler charge-pump capacitor 24 GND — Ground 25 NC — Not connected internally 26 VCC — 3-V to 5.5-V supply voltage 27 V+ — Positive charge pump output voltage Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 Table 5-2. Pin Functions (continued) PIN NO. NAME TYPE DESCRIPTION 28 C1+ — 29 C2+ — 30 C2- — Negative terminal of the voltage-doubler charge-pump capacitor 31 V- — Negative charge pump output voltage 32 NC — Not connected internally Positive terminal of the voltage-doubler charge-pump capacitor Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E 5 TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) Supply voltage(2) VCC voltage(2) V+ Positive output supply V– Negative output supply voltage(2) V+ – V– Output supply voltage VI Input voltage VO Output voltage Tstg Storage temperature (1) (2) MIN MAX –0.3 6 V –0.3 7 V 0.3 –7 V 13 V difference(2) Driver ( FORCEOFF, FORCEON) –0.3 6 Receiver –25 25 –13.2 13.2 –0.3 VCC + 0.3 –65 150 Driver Receiver ( INVALID) UNIT V V °C Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime. All voltages are with respect to network GND. 6.2 ESD Ratings VALUE UNIT Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) Driver output pins ±15,000 V Human-body model (HBM), per ANSI/ ESDA/JEDEC JS-001(1) ±15,000 V Driver Section V(ESD) Electrostatic discharge Receiver Section V(ESD) (1) Electrostatic discharge Receiver input pins JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. 6.3 ESD Ratings - IEC Specifications VALUE UNIT Driver Section V(ESD) Electrostatic discharge IEC61000-4-2, Air-Gap Discharge(1) IEC61000-4-2, Contact Discharge(1) Driver outputs pins ±15 ±8 kV Receiver Section V(ESD) (1) 6 Electrostatic discharge IEC61000-4-2, Air-Gap Discharge(1) IEC61000-4-2, Contact Discharge(1) Receiver input pins ±15 ±8 kV For the DB, PW and RHB package only: A minimum of 1-µF capacitor between VCC and GND is required to meet the specified IEC 61000-4-2 rating Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 6.4 Recommended Operating Conditions See Figure 9-1 (1) MIN VCC = 3.3 V Supply voltage VCC = 5 V VIH Driver and control high-level DIN, FORCEOFF, FORCEON input voltage VIL Driver and control low-level input voltage DIN, FORCEOFF, FORCEON VI Driver and control input voltage DIN, FORCEOFF, FORCEON VI Receiver input voltage TA (1) VCC = 3.3 V VCC = 5 V TRS3243EC Operating free-air temperature TRS3243EI NOM MAX 3 3.3 3.6 4.5 5 5.5 UNI T 2 V V 2.4 0.8 V 0 5.5 V –25 25 V 0 70 –40 85 °C Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. 6.5 Thermal Information THERMAL METRIC(1) VQFN (RHB) TSSOP (PW) SOIC (DW) DB (SSOP) 32 PINS 28 PINS 28 PINS 28 PINS UNIT RθJA Junction-to-ambient thermal resistance 34.1 70.3 59.0 76.1 °C/W RθJC(top) Junction-to-case (top) thermal resistance 25.9 21.0 28.8 35.8 °C/W RθJB Junction-to-board thermal resistance 14.6 29.2 30.3 37.4 °C/W ψJT Junction-to-top characterization parameter 0.5 1.3 7.8 7.4 °C/W ψJB Junction-to-board characterization parameter 14.6 28.8 30.0 37.0 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 5.1 N/A N/A N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E 7 TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 6.6 Electrical Characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 9-1)(2) TYP(1) MAX ±0.01 ±1 μA Auto-powerdown disabled No load, FORCEOFF and FORCEON at VCC For DB, PW and RHB package 0.3 1.2 mA Auto-powerdown disabled No load, FORCEOFF and FORCEON at VCC For DW package 0.3 1 mA Powered off No load, FORCEOFF at GND 1 10 Auto-powerdown enabled No load, FORCEOFF at VCC, FORCEON at GND, All RIN are open or grounded, All DIN are grounded 1 10 PARAMETER II Input leakage current Supply current (TA = 25°C) ICC TEST CONDITIONS MIN FORCEOFF, FORCEON UNIT μA DRIVER SECTION VOH High-level output voltage All DOUT at RL = 3 kΩ to GND 5 5.4 V VOL Low-level output voltage All DOUT at RL = 3 kΩ to GND –5 –5.4 V VO Output voltage (mouse driveability) DIN1 = DIN2 = GND, DIN3 = VCC, 3-kΩ to GND at DOUT3, DOUT1 = DOUT2 = 2.5 mA ±5 IIH High-level input current VI = VCC ±0.01 ±1 μA IIL Low-level input current VI at GND ±0.01 ±1 μA Vhys Input hysteresis ±1 V ±60 mA IOS Short-circuit output current(3) rO Output resistance Ioff Output leakage current VCC = 3.6 V, VO = 0 V VCC = 5.5 V, VO = 0 V VCC, V+, and V– = 0 V, VO = ±2 V FORCEOFF = GND, VO = ±12 V, 300 V 10M VCC = 0 to 5.5 V Ω ±25 μA RECEIVER SECTION VCC – 0.6 VCC – 0.1 VOH High-level output voltage IOH = –1 mA V VOL Low-level output voltage IOH = 1.6 mA VIT+ Positive-going input threshold voltage VCC = 3.3 V 1.6 2.4 VCC = 5 V 1.9 2.4 VIT– Negative-going input threshold VCC = 3.3 V voltage VCC = 5 V Vhys Input hysteresis (VIT+ – VIT– ) Ioff Output leakage current (except FORCEOFF = 0 V ROUT2B) ri Input resistance 0.4 0.6 1.1 0.8 1.4 3 V V 0.5 VI = ±3 V or ±25 V V V ±0.05 ±10 μA 5 7 kΩ 2.7 V AUTO-POWERDOWN SECTION VIT+(valid) Receiver input threshold for INVALID high-level output voltage FORCEON = GND, FORCEOFF = VCC VIT–(valid) Receiver input threshold for INVALID high-level output voltage FORCEON = GND, FORCEOFF = VCC –2.7 VT(invalid) Receiver input threshold for INVALID low-level output voltage FORCEON = GND, FORCEOFF = VCC –0.3 VOH INVALID high-level output voltage IOH = -1 mA, FORCEON = GND, FORCEOFF = VCC VOL INVALID low-level output voltage IOL = 1.6 mA, FORCEON = GND, FORCEOFF = VCC (1) (2) (3) 8 V 0.3 VCC – 0.6 V V 0.4 V All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one output should be shorted at a time. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 6.7 Switching Characteristics switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 9-1) (2) PARAMETER TEST CONDITIONS MIN TYP(1) 250 500 MAX UNIT DRIVER SECTION tsk(p) SR(tr) Maximum data rate CL = 1000 pF, One DOUT switching, RL = 3 kΩ See Figure 1 Pulse skew(3) CL = 150 pF to 2500 pF, RL = 3 kΩ to 7 kΩ, See Figure 2 Slew rate, transition region (see Figure 1) VCC = 3.3 V, RL = 3 kΩ to 7 kΩ, PRR = 250 kbit/s CL = 150 pF to 1000 pF 6 30 CL = 150 pF to 2500 pF 4 30 kbit/s 100 ns V/μs RECEIVER SECTION tPLH Propagation delay time, lowto high-level output tPHL Propagation delay time, highto low-level output ten Output enable time tdis Output disable time tsk(p) Pulse skew(3) CL = 150 pF, See Figure 7-2 CL = 150 pF, RL = 3 kΩ, See Figure 7-3 See Figure 7-2 150 ns 150 ns 200 ns 200 ns 50 ns AUTO-POWERDOWN SECTION tvalid Propagation delay time, lowto high-level output VCC = 5 V 1 μs tinvalid Propagation delay time, highVCC = 5 V to low-level output 30 μs ten Supply enable time 100 μs (1) (2) (3) VCC = 5 V All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V + 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. Pulse skew is defined as |tPLH – tPHL| of each channel of the same device. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E 9 TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 7 Parameter Measurement Information 3V Generator (see Note B) Input RS-232 Output 50 Ω RL 0V CL (see Note A) 3V FORCEOFF t THL Output SR(tr) TEST CIRCUIT 6V t THL or t TLH t TLH VOH 3V 3V −3 V −3 V VOL VOLTAGE WAVEFORMS Copyright © 2017, Texas Instruments Incorporated A. B. CL includes probe and jig capacitance. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 7-1. Driver Slew Rate 3V Generator (see Note B) RS-232 Output 50 Ω RL Input 1.5 V 1.5 V 0V CL (see Note A) t PHL t PLH VOH 3V FORCEOFF 50% 50% Output VOL TEST CIRCUIT VOLTAGE WAVEFORMS Copyright © 2017, Texas Instruments Incorporated A. B. CL includes probe and jig capacitance. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 7-2. Driver Pulse Skew 3 V or 0 V FORCEON 3V Input 1.5 V 1.5 V −3 V Output Generator (see Note B) 50 Ω 3V FORCEOFF t PHL CL (see Note A) t PLH VOH 50% Output 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS Copyright © 2017, Texas Instruments Incorporated A. B. CL includes probe and jig capacitance. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 7-3. Receiver Propagation Delay Times 10 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 3V Input VCC 3 V or 0 V FORCEON 1.5 V GND S1 −3 V t PZH (S1 at GND) t PHZ (S1 at GND) RL 3 V or 0 V 1.5 V VOH Output 50% Output CL (see Note A) FORCEOFF Generator (see Note B) 0.3 V t PZL (S1 at VCC) t PLZ (S1 at VCC) 50 Ω 0.3 V Output 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS Copyright © 2017, Texas Instruments Incorporated A. B. C. D. CL includes probe and jig capacitance. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. tPLZ and tPHZ are the same as tdis. tPZL and tPZH are the same as ten. Figure 7-4. Receiver Enable And Disable Times Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E 11 TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 2.7 V 2.7 V 0V Receiver Input 0V −2.7 V −2.7 V ROUT Generator (see Note B) 50 Ω 3V t invalid −3 V t valid VCC 50% VCC t en INVALID V+ CL = 30 pF (see Note A) ≈V+ 0.3 V VCC 0V 0.3 V Supply Voltages FORCEOFF FORCEON 0V INVALID Output Autopowerdown 50% VCC DIN DOUT V− TEST CIRCUIT ≈V− VOLTAGE WAVEFORMS Valid RS-232 Level, INV ALID High 2.7 V Indeterminate 0.3 V 0V If Signal Remains Within This Region For More Than 30 ms, INVALID Is Low † −0.3 V Indeterminate −2.7 V Valid RS-232 Level, INV ALID High † Auto-powerdown disables drivers and reduces supply current to 1 mA. Copyright © 2017, Texas Instruments Incorporated A. B. CL includes probe and jig capacitance. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 7-5. INVALID Propagation Delay Times And Supply Enabling Time 12 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 8 Detailed Description 8.1 Overview Flexible control options for power management are available when the serial port is inactive. The autopowerdown feature functions when FORCEON is low and FORCEOFF is high. During this mode of operation, if the device does not sense a valid RS-232 signal, the driver outputs are disabled. If FORCEOFF is set low, both drivers and receivers (except ROUT2B) are shut off, and the supply current is reduced to 1 μA. Disconnecting the serial port or turning off the peripheral drivers causes the auto-powerdown condition to occur. Auto-powerdown can be disabled when FORCEON and FORCEOFF are high, and should be done when driving a serial mouse. With auto-powerdown enabled, the device is activated automatically when a valid signal is applied to any receiver input. The INVALID output is used to notify the user if an RS-232 signal is present at any receiver input. INVALID is high (valid data) if any receiver input voltage is greater than 2.7 V or less than –2.7 V or has been between –0.3 V and 0.3 V for less than 30 μs. INVALID is low (invalid data) if all receiver input voltages are between –0.3 V and 0.3 V for more than 30 μs. Refer to Figure 7-5 for receiver input levels. The TRS3243E is characterized for operation from 0°C to 70°C. The TRS3243EI is characterized for operation from –40°C to +85°C. 8.2 Functional Block Diagram DIN1 DIN2 DIN3 FORCEOFF FORCEON ROUT1 ROUT2B ROUT2 ROUT3 ROUT4 ROUT5 14 9 13 10 12 11 DOUT1 DOUT2 DOUT3 22 23 Auto-powerdown 19 21 4 INVALID RIN1 20 18 5 17 6 16 7 15 8 RIN2 RIN3 RIN4 RIN5 Logic Diagram (Positive Logic) Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E 13 TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 8.3 Device Functional Modes Table 8-1 through Table 8-3 show the device functional modes. Table 8-1. Each Driver INPUTS(1) (1) OUTPUT DRIVER STATUS DIN FORCEON FORCEOFF VALID RIN RS-232 LEVEL X X L X Z Powered off Normal operation with auto-powerdown disabled DOUT L H H X H H H H X L L L H Yes H H L H Yes L X L H No Z Normal operation with auto-powerdown enabled Powered off by auto-powerdown feature H = high level, L = low level, X = irrelevant, Z = high impedance Table 8-2. Each Receiver INPUTS(1) (1) OUTPUT RIN FORCEON FORCEOFF X X L Z L X H H H X H L Open X H H RECEIVER STATUS ROUT Powered off Normal operation with auto-powerdown disabled/enabled H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off Table 8-3. ROUT2B And Outputs INVALID INPUTS(1) (1) 14 OUTPUTS VALID RIN RS-232 LEVEL RIN2 FORCEON FORCEOFF INVALID ROUT2B Yes L X X H L Yes H X X H H Yes Open X X H L No Open X X L L OUTPUT STATUS Always active H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 9 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 9.1 Typical Application C1+ C2 + C2+ V+ C2- VCC + - - + - + C1 CBYPASS - = 0.1 µF GND C2 C3 V- + C1- RIN2 RS-232 Inputs RIN3 RIN4 RIN5 DOUT1 DOUT2 RS-232 Outputs 4 FORCE ON Auto-Powerd own RIN1 5 6 7 FORCE OFF 8 INV ALID 9 ROUT2B ROUT1 10 5 kŸ DOUT3 11 ROUT2 5 kŸ DOUT4 Log ic Outputs 12 ROUT3 Log ic In puts DOUT5 5 kŸ 13 ROUT4 DOUT6 14 5 kŸ ROUT5 5 kŸ A. B. C. C3 can be connected to VCC or GND. Resistor values shown are nominal. Nonpolarized ceramic capacitors are acceptable. If using polarized tantalum or electrolytic capacitors, connect them as shown. Figure 9-1. Typical Operating Circuit and Capacitor Values Table 9-1. VCC vs Capacitor Values VCC C1 C2, C3, and C4 3.3 V ± 0.3 V 0.1 µF 0.1 µF 5 V ± 0.5 V 0.47 µF 0.33 µF 3 V ± 5.5 V 0.1 µF 0.47 µF Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E 15 TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 9.1.1 Detailed Design Procedure 9.1.1.1 ESD Protection TI TRS3243E devices have standard ESD protection structures incorporated on the pins to protect against electrostatic discharges encountered during assembly and handling. In addition, the RS232 bus pins (driver outputs and receiver inputs) of these devices have an extra level of ESD protection. Advanced ESD structures were designed to successfully protect these bus pins against ESD discharge of ±15-kV in all states: normal operation, shutdown, and powered down. The TRS3243E devices are designed to continue functioning properly after an ESD occurrence without any latchup. The TRS3243E devices have three specified ESD limits on the driver outputs and receiver inputs, with respect to GND: • ±15-kV Human-Body Model (HBM) • ±15-kV IEC61000-4-2, Air-Gap Discharge (formerly IEC1000-4-2) • ±8-kV IEC61000-4-2, Contact Discharge 9.1.1.2 ESD Test Conditions ESD testing is stringently performed by TI, based on various conditions and procedures. Please contact TI for a reliability report that documents test setup, methodology, and results. 9.1.1.3 Human-Body Model (HBM) The HBM of ESD testing is shown in Figure 9-2, while Figure 9-3 shows the current waveform that is generated during a discharge into a low impedance. The model consists of a 100-pF capacitor, charged to the ESD voltage of concern, and subsequently discharged into the DUT through a 1.5-kΩ resistor. RD 1.5 kΩ VHBM + − CS 100 pF DUT Copyright © 2017, Texas Instruments Incorporated Figure 9-2. HBM ESD Test Circuit 1.5 VHBM = 2 kV I DUT (A) 1.0 0.5 DUT = 10-V 1-Ω Zener Diode 0.0 0 50 100 150 200 Time (ns) Figure 9-3. Typical HBM Current Waveform 16 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 9.1.1.4 IEC61000-4-2 (Formerly Known as IEC1000-4-2) Unlike the HBM, MM, and CDM ESD tests that apply to component level integrated circuits, the IEC61000-4-2 is a system-level ESD testing and performance standard that pertains to the end equipment. The TRS3243E is designed to enable the manufacturer in meeting the highest level (Level 4) of IEC61000-4-2 ESD protection with no further need of external ESD protection circuitry. The more stringent IEC test standard has a higher peak current than the HBM, due to the lower series resistance in the IEC model. Figure 9-4 shows the IEC61000-4-2 model, and Figure 9-5 shows the current waveform for the corresponding ±8-kV contact-discharge (Level 4) test. This waveform is applied to a probe that has been connected to the DUT. On the other hand, the corresponding ±15-kV (Level 4) air-gap discharge test involves approaching the DUT with an already energized probe. High-Voltage DC Source 50−100 MΩ 330 Ω RC RD + − CS 150 pF DUT Copyright © 2017, Texas Instruments Incorporated Figure 9-4. Simplified IEC61000-4-2 ESD Test Circuit I (30A) 100% (Vcontact = 8 kV) I Peak 90% (16A) (8A) 10% t 30 ns 60 ns tr = 0.7 ns to 1 ns Figure 9-5. Typical Current Waveform Of IEC61000-4-2 ESD Generator Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E 17 TRS3243E www.ti.com SLLS789D – APRIL 2007 – REVISED OCTOBER 2022 10 Device and Documentation Support 10.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 10.2 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 10.3 Trademarks IBM™ and PC/AT™ are trademarks of International Business Machines Corporation. TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 10.4 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 10.5 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 11 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 18 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TRS3243E PACKAGE OPTION ADDENDUM www.ti.com 18-Nov-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TRS3243ECDB LIFEBUY SSOP DB 28 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TRS3243EC TRS3243ECDBR ACTIVE SSOP DB 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TRS3243EC Samples TRS3243ECDW ACTIVE SOIC DW 28 20 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TRS3243EC Samples TRS3243ECDWR ACTIVE SOIC DW 28 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TRS3243EC Samples TRS3243ECPW ACTIVE TSSOP PW 28 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 RS43EC Samples TRS3243ECPWR ACTIVE TSSOP PW 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 RS43EC Samples TRS3243ECRHBR ACTIVE VQFN RHB 32 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR 0 to 70 RS43EC Samples TRS3243EIDB LIFEBUY SSOP DB 28 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TRS3243EI TRS3243EIDBR ACTIVE SSOP DB 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TRS3243EI Samples TRS3243EIDW ACTIVE SOIC DW 28 20 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TRS3243EI Samples TRS3243EIDWR ACTIVE SOIC DW 28 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TRS3243EI Samples TRS3243EIPW LIFEBUY TSSOP PW 28 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 RS43EI TRS3243EIPWR ACTIVE TSSOP PW 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 RS43EI Samples TRS3243EIRHBR ACTIVE VQFN RHB 32 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 RS43EI Samples TRS3243EIRHBRG4 ACTIVE VQFN RHB 32 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 RS43EI Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 18-Nov-2022 RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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