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TRS3386EIDW

TRS3386EIDW

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC20_300MIL

  • 描述:

    IC TRANSCEIVER FULL 3/2 20SOIC

  • 数据手册
  • 价格&库存
TRS3386EIDW 数据手册
TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com RS-232 TRANSCEIVER WITH SPLIT SUPPLY PIN FOR LOGIC SIDE Check for Samples: TRS3386E FEATURES APPLICATIONS • • • • • • 1 • • • • • • VL Pin for Compatibility With Mixed-Voltage Systems Down to 2.5 V on Logic Side Enhanced ESD Protection on RIN Inputs and DOUT Outputs – ±15-kV Human-Body Model – ±15-kV IEC 61000-4-2, Air-Gap Discharge – ±8-kV IEC 61000-4-2, Contact Discharge Low 300-μA Supply Current Specified 250-kbps Data Rate 1-μA Low-Power Shutdown Meets EIA/TIA-232 Specifications Down to 3 V Designed to be Interchangeable With Industry Standard '3386 Devices Hand-Held Equipment PDAs Cell Phones Battery-Powered Equipment Data Cables PW OR DW PACKAGE TOP VIEW C1+ 1 20 PWRDOWN V+ 2 19 VCC C1− 3 18 GND C2+ 4 17 DOUT1 C2− 5 16 DOUT2 V− 6 15 DOUT3 DIN1 7 14 RIN1 DIN2 8 13 RIN2 DIN3 9 12 VL 10 11 ROUT1 ROUT2 DESCRIPTION/ORDERING INFORMATION The TRS3386E is a three-driver and two-receiver RS-232 interface device, with split supply pins for mixed-signal operations. All RS-232 inputs and outputs are protected to ±15 kV using the IEC 61000-4-2 Air-Gap Discharge method, ±8 kV using the IEC 61000-4-2 Contact Discharge method, and ±15 kV using the Human-Body Model. The charge pump requires only four small 0.1-μF capacitors for operation from a 3.3-V supply. The TRS3386E is capable of running at data rates up to 250 kbps, while maintaining RS-232-compliant output levels. The TRS3386E has a unique VL pin that allows operation in mixed-logic voltage systems. Both driver in (DIN) and receiver out (ROUT) logic levels are pin programmable through the VL pin. The TRS3386E is available in a space-saving thin shrink small-outline package (TSSOP). ORDERING INFORMATION TA 0°C to 70°C –40°C to 85°C (1) (2) PACKAGE (1) (2) ORDERABLE PART NUMBER TOP-SIDE MARKING TSSOP – PW TRS3386ECPWR RV86EC SOIC – DW TRS3386ECDWR TRS3386EC TSSOP – PW TRS3386EIPWR RV86EI SOIC – DW TRS3386EIDWR TRS3386EI Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007–2011, Texas Instruments Incorporated TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com Table 1. TRUTH TABLE (SHUTDOWN FUNCTION) PWRDWN DRIVER OUTPUTS RECEIVER OUTPUTS CHARGE PUMP L High-Z High-Z Inactive H Active Active Active FUNCTIONAL BLOCK DIAGRAM DIN1 DIN1 DIN2 PWRDOWN ROUT1 7 17 8 16 9 15 20 DOUT1 DOUT2 DOUT3 Powerdown 11 14 RIN1 5K ROUT2 10 13 RIN2 5K 2 Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRS3386E TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com TERMINAL FUNCTIONS TERMINAL NAME DESCRIPTION NO. C1+ 1 Positive terminal of the voltage-doubler charge-pump capacitor V+ 2 5.5-V supply generated by the charge pump C1– 3 Negative terminal of the voltage-doubler charge-pump capacitor C2+ 4 Positive terminal of the inverting charge-pump capacitor C2– 5 Negative terminal of the inverting charge-pump capacitor V– 6 –5.5-V supply generated by the charge pump DIN1 DIN2 DIN3 7 8 9 Driver inputs ROUT2 ROUT1 10 11 Receiver outputs. Swing between 0 and VL. VL 12 Logic-level supply. All CMOS inputs and outputs are referenced to this supply. RIN2 RIN1 13 14 RS-232 receiver inputs DOUT3 DOUT2 DOUT1 15 16 17 RS-232 driver outputs GND 18 Ground VCC 19 3-V to 5.5-V supply voltage PWRDWN 20 Powerdown input L = Powerdown H = Normal operation Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN VCC to GND –0.3 6 V VL to GND –0.3 VCC + 0.3 V V+ to GND –0.3 7 V V– to GND 0.3 –7 V 13 V V+ + |V–| (2) VI Input voltage VO Output voltage DIN, PWRDWN to GND –0.3 ±13.2 DOUT to GND ROUT Continuous power dissipation TJ Junction temperature Tstg Storage temperature range –0.3 VL + 0.3 V V Continuous TA = 70°C, 20-pin TSSOP (derate 7 mW/°C above 70°C) –65 Lead temperature (soldering, 10 s) (2) 6 ±25 RIN to GND Short-circuit duration DOUT to GND (1) MAX UNIT 559 mW 150 °C 150 °C 300 °C Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. V+ and V– can have maximum magnitudes of 7 V, but their absolute difference cannot exceed 13 V. Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRS3386E 3 TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com Recommended Operating Conditions MIN MAX VCC Supply voltage 3 5.5 V VL Supply voltage 2.25 VCC V Input logic threshold low DIN, PWRDWN Input logic threshold high DIN, PWRDWN VL = 3 V or 5.5 V 0.8 VL = 2.3 V 0.6 VL = 5.5 V 2.4 VL = 3 V 2.0 VL = 2.7 V 1.4 TRS3386ECPWR Operating temperature TRS3386EIPWR Receiver input voltage UNIT V V 0 70 –40 85 –25 25 °C V Electrical Characteristics over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 μF (tested at 3.3 V ± 10%), C1 = 0.047 μF, C2–C4 = 0.33 μF (tested at 5 V ± 10%) (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX 1 10 μA 0.3 1 mA UNIT DC Characteristics (VCC = 3.3 V or 5 V, TA = 25°C) Powerdown supply current PWRDWN = GND, All inputs at VCC or GND Supply current PWRDWN = VCC, No load (1) Typical values are at VCC = VL = 3.3 V, TA = 25°C. ESD Protection PARAMETER RIN, DOUT 4 TEST CONDITIONS TYP Human-Body Model ±15 IEC 61000-4-2 Air-Gap Discharge ±15 IEC 61000-4-2 Contact Discharge ±8 Submit Documentation Feedback UNIT kV Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRS3386E TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com RECEIVER SECTION Electrical Characteristics over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 μF (tested at 3.3 V ± 10%), C1 = 0.047 μF, C2–C4 = 0.33 μF (tested at 5 V ± 10%), TA = TMIN to TMAX (unless otherwise noted) PARAMETER TEST CONDITIONS Ioff Output leakage current ROUT, receivers disabled VOL Output voltage low IOUT = 1.6 mA VOH Output voltage high IOUT = –1 mA VIT– Input threshold low TA = 25°C VIT+ Input threshold high TA = 25°C Vhys Input hysteresis Input resistance (1) MIN TYP (1) MAX UNIT ±0.05 ±10 μA 0.4 V VL – 0.6 VL – 0.1 VL = 5 V 0.8 1.2 VL = 3.3 V 0.6 1.5 V V VL = 5 V 1.8 2.4 VL = 3.3 V 1.5 2.4 0.5 TA = 25°C 3 5 V V 7 kΩ Typical values are at VCC = VL = 3.3 V, TA = 25°C Switching Characteristics over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 μF (tested at 3.3 V ± 10%), C1 = 0.047 μF, C2–C4 = 0.33 μF (tested at 5 V ± 10%), TA = TMIN to TMAX (unless otherwise noted) PARAMETER tPHL Receiver propagation delay tPLH TEST CONDITIONS Receiver input to receiver output, CL = 150 pF TYP (1) 0.15 0.15 UNIT μs tPHL – tPLH Receiver skew 50 ns ten Receiver output enable time From PWRDWN 200 ns tdis Receiver output disable time From PWRDWN 200 ns (1) Typical values are at VCC = VL = 3.3 V, TA = 25°C. Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRS3386E 5 TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com DRIVER SECTION Electrical Characteristics over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 μF (tested at 3.3 V ± 10%), C1 = 0.047 μF, C2–C4 = 0.33 μF (tested at 5 V ± 10%), TA = TMIN to TMAX (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (1) ±5 ±5.4 V 300 10M Ω MAX UNIT VOH Output voltage swing All driver outputs loaded with 3 kΩ to ground rO Output resistance VCC = V+ = V– = 0, Driver output = ±2 V IOS Output short-circuit current VT_OUT = 0 ±60 mA Output leakage current VT_OUT = ±12 V, Driver disabled, VCC = 0 or 3 V to 5.5 V ±25 μA 0.5 V ±1 μA IOZ Driver input hysteresis Input leakage current (1) ±0.01 DIN, PWRDWN Typical values are at VCC = VL = 3.3 V, TA = 25°C Timing Requirements over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 μF (tested at 3.3 V ± 10%), C1 = 0.047 μF, C2–C4 = 0.33 μF (tested at 5 V ± 10%), TA = TMIN to TMAX (unless otherwise noted) PARAMETER |tPHL – tPLH| Maximum data rate RL = 3 kΩ, CL = 1000 pF, One driver switching Time-to-exit powerdown |VT_OUT| > 3.7 V VCC = 3.3 V, TA = 25°C, RL = 3 kΩ to 7 kΩ, Measured from 3 V to –3 V or –3 V to 3 V TYP (1) MAX 250 Driver skew (2) Transition-region slew rate (1) (2) MIN UNIT kbps 100 μs 100 ns CL = 150 pF to 1000 pF 6 30 CL = 150 pF to 2500 pF 4 30 V/μs Typical values are at VCC = VL = 3.3 V, TA = 25°C. Driver skew is measured at the driver zero crosspoint. ESD Protection PARAMETER RIN, DOUT 6 TEST CONDITIONS TYP Human-Body Model ±15 IEC 61000-4-2 Air-Gap Discharge ±15 IEC 61000-4-2 Contact Discharge ±8 Submit Documentation Feedback UNIT kV Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRS3386E TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com APPLICATION INFORMATION 3.3 V 20 CBYPASS C1 0.1mF C2 0.1mF TTL/CMOS Inputs 19 12 PWRDWN V CC 1 C1+ 3 VL V+ 2 C3 0.1µF C1− 4 C2+ 5 C2− V− 6 7 DIN1 DOUT1 17 DIN2 DOUT2 16 DIN3 DOUT3 15 C4 0.1 µF VL RIN1 14 11 ROUT1 5kΩ TTL/CMOS Outputs VL 10 ROUT2 RIN2 13 5kΩ GND 18 Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRS3386E 7 TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION 3V Input Generator (see Note B) 1.5 V RS-232 Output 50 Ω RL 1.5 V 0V CL (see Note A) tTHL 3V PWRDWN tTLH VOH 3V 3V Output −3 V −3 V VOL TEST CIRCUIT VOLTAGE WAVEFORMS SR(tr) + t THL 6V or t TLH NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 1. Driver Slew Rate 3V Generator (see Note B) RS-232 Output 50 Ω RL Input 1.5 V 1.5 V 0V CL (see Note A) tPHL tPLH VOH 3V PWRDWN 50% 50% Output VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 2. Driver Pulse Skew PWRDWN 3V 3V Input 1.5 V 1.5 V −3 V Output Generator (see Note B) 50 Ω tPHL CL (see Note A) tPLH VOH 50% Output 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 3. Receiver Propagation Delay Times 8 Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRS3386E TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (Continued) VCC GND S1 RL 3 V or 0 V Output CL (see Note A) PWRDWN 3V Input 1.5 V 0V tPZH (S1 at GND) tPHZ S1 at GND) VOH Output 50% 0.3 V Generator (see Note B) 1.5 V 50 Ω tPLZ (S1 at VCC) 0.3 V Output 50% VOL tPZL (S1 at VCC) TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 4. Receiver Enable and Disable Times Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRS3386E 9 TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com REVISION HISTORY Changes from Revision B (April 2009) to Revision C Page • Changed VL Pin for Compatibility With Mixed-Voltage Systems Down to 2.5 V (originally 1.8 V) on the Logic Side. ......... 1 • Changed VL Supply MIN value from 1.65 V to 2.25 V. ......................................................................................................... 4 • Deleted VL = 1.65V parameter from Input logic threshold low. ............................................................................................. 4 • Deleted VL = 1.95V parameter from Input logic threshold high. ........................................................................................... 4 10 Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRS3386E PACKAGE OPTION ADDENDUM www.ti.com 29-Aug-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TRS3386ECDW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TRS3386EC TRS3386ECDWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TRS3386EC TRS3386ECPW ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 RV86EC TRS3386ECPWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 RV86EC TRS3386ECPWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 RV86EC TRS3386EIDW ACTIVE SOIC DW 20 TBD Call TI Call TI -40 to 85 TRS3386EI TRS3386EIDWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TRS3386EI TRS3386EIPW ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 RV86EI TRS3386EIPWG4 ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 RV86EI TRS3386EIPWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 RV86EI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 29-Aug-2015 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing TRS3386ECDWR SOIC TRS3386ECPWR TRS3386EIDWR TRS3386EIPWR SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 13.0 2.7 12.0 24.0 Q1 DW 20 2000 330.0 24.4 10.8 TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TRS3386ECDWR SOIC DW 20 2000 367.0 367.0 45.0 TRS3386ECPWR TSSOP PW 20 2000 367.0 367.0 38.0 TRS3386EIDWR SOIC DW 20 2000 367.0 367.0 45.0 TRS3386EIPWR TSSOP PW 20 2000 367.0 367.0 38.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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