TRSF3221E
SLLS822B – JULY 2007 – REVISED JULY 2021
TRSF3221E 3-V to 5.5-V Single-Channel RS-232 1-Mbit Line Driver and Receiver
With ±15-kV IEC ESD Protection in Small Package
1 Features
•
•
•
•
•
•
•
•
ESD protection for RS-232 pins
– ±15-kV Human-body model (HBM)
– ±8-kV IEC 61000-4-2 Contact discharge
– ±15-kV IEC 61000-4-2 Air-gap discharge
Operates with 3-V to 5.5-V VCC supply
Operates up to 1 Mbit/s
– Low-speed pin-compatible device (250 kbit/s) –
TRS3221E
Available in near chip-scale package, 16-pin VQFN
(RGT, 82% smaller than TSSOP package)
Low standby current: 1 μA typical
External capacitors : 4 × 0.1 μF
Accepts 5-V logic input with 3.3-V supply
Auto-powerdown feature automatically disables
drivers for power savings
2 Applications
•
•
•
•
•
•
•
•
•
Industrial PCs
Wired networking
Data center and enterprise computing
Battery-powered systems
PDAs
Notebooks
Laptops
Palmtop PCs
Hand-held equipment
Flexible control options for power management are
available when the serial port is inactive. The autopowerdown feature functions when FORCEON is
low and FORCEOFF is high. During this mode of
operation, if the TRSF3221E does not sense a valid
RS-232 signal on the receiver input, the driver output
is disabled. If FORCEOFF is set low and the enable
(EN) input is high, both the driver and receiver
are shut off, and the supply current is reduced to
1 μA. Disconnecting the serial port or turning off
the peripheral drivers causes the auto-powerdown
condition to occur. Auto-powerdown can be disabled
when FORCEON and FORCEOFF are high. With
auto-powerdown enabled, the device is activated
automatically when a valid signal is applied to the
receiver input. The INVALID output notifies the user
if an RS-232 signal is present at the receiver input.
INVALID is high (valid data) if the receiver input
voltage is greater than 2.7 V or less than –2.7 V, or
has been between –0.3 V and 0.3 V for less than 30
μs. INVALID is low (invalid data) if the receiver input
voltage is between –0.3 V and 0.3 V for more than
30 μs. See Figure 7-5 for receiver input levels.
Device Information
PART NUMBER
TRSF3221E
3 Description
The TRSF3221E consists of one line driver, one
line receiver, and a dual charge-pump circuit
with ±15-kV IEC ESD protection pin to pin
(serial-port connection pins, including GND). The
TRSF3221E provides the electrical interface between
an asynchronous communication controller and the
serial-port connector. The charge pump and four small
external capacitors allow operation from a single 3-V
to 5.5-V supply. The TRSF3221E operates at data
signaling rates up to 1 Mbit/s and a driver output slew
rate of 24 V/μs to 150 V/μs.
(1)
PACKAGE(1)
BODY SIZE (NOM)
DB (SSOP)
6.20 mm x 5.30 mm
PW (TSSOP)
5.00 mm x 4.40 mm
RGT (VQFN)
3.00 mm x 3.00 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
DIN
FORCEOFF
FORCEON
ROUT
13
11
DOUT
16
12
Auto-powerdown
9
10
8
1
INVALID
RIN
EN
Logic Diagram (Positive Logic)
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TRSF3221E
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SLLS822B – JULY 2007 – REVISED JULY 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 ESD Ratings, IEC Specifications................................ 4
6.4 Recommended Operating Conditions.........................5
6.5 Thermal Resistance Characteristics........................... 5
6.6 Electrical Characteristics.............................................5
6.7 Electrical Characteristics, Driver................................. 6
6.8 Switching Characteristics, Driver................................ 6
6.9 Electrical Characteristics, Receiver............................ 7
6.10 Switching Characteristics, Receiver..........................7
6.11 Electrical Characteristics, Auto-Powerdown............. 8
6.12 Switching Characteristics, Auto-Powerdown............ 8
6.13 Typical Characteristics.............................................. 8
7 Parameter Measurement Information............................ 9
8 Detailed Description......................................................12
8.1 Overview................................................................... 12
8.2 Functional Block Diagram......................................... 12
8.3 Feature Description...................................................12
8.4 Device Functional Modes..........................................13
9 Application and Implementation.................................. 14
9.1 Application Information............................................. 14
10 Power Supply Recommendations..............................15
11 Layout........................................................................... 16
11.1 Layout Guidelines................................................... 16
11.2 Layout Example...................................................... 16
12 Device and Documentation Support..........................17
12.1 Receiving Notification of Documentation Updates..17
12.2 Support Resources................................................. 17
12.3 Trademarks............................................................. 17
12.4 Electrostatic Discharge Caution..............................17
12.5 Glossary..................................................................17
13 Mechanical, Packaging, and Orderable
Information.................................................................... 17
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (May 2021) to Revision B (July 2021)
Page
• Changed the Applications list............................................................................................................................. 1
• Changed the table note for the ESD Ratings - IEC Specifications table to make it also applicable to PW
package.............................................................................................................................................................. 4
• Changed the thermal information for PW package.............................................................................................5
Changes from Revision * (August 2007) to Revision A (May 2021)
Page
• Added Device Information table, ESD Ratings table, Feature Description section, Device Functional Modes,
Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section............ 1
2
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2
15
3
14
4
13
5
12
6
11
7
10
8
9
FORCEOFF
VCC
GND
DOUT
FORCEON
DIN
INVALID
ROUT
C1-
1
C2+
2
FORCEOFF
16
EN
1
V+
EN
C1+
V+
C1−
C2+
C2−
V−
RIN
C1+
5 Pin Configuration and Functions
16
15
14
13
12
VCC
11 GND
Thermal Pad
C2-
3
10 DOUT
V-
4
9
FORCEON
6
7
ROUT
INVALID
8
DIN
5
RIN
DB or PW Package. 16 Pins (Top View)
RGT, VSON Package, 16 Pins (Top View)
Table 5-1. Pin Functions
PIN
NAME
I/O(1)
DESCRIPTION
DB or PW
RGT
EN
1
14
--
C1+
2
16
-
Positive lead of C1 capacitor
V+
3
15
O
Positive charge pump output for storage capacitor only
C1-
4
1
-
Negative lead of C1 capacitor
C2+
5
2
-
Positive lead of C2 capacitor
C2-
6
3
-
Negative lead of C2 capacitor
V-
7
4
O
Negative charge pump output for storage capacitor only
RIN
8
5
I
RS232 line data input (from remote RS232 system)
ROUT
9
6
O
Logic data output (to UART)
INVALID
10
7
DIN
11
8
I
Logic data input (from UART)
FORCEON
12
9
DOUT
13
10
O
RS232 line data output (to remote RS232 system)
GRD
14
11
-
Ground
VCC
15
12
-
Supply Voltage, Connect to external 3-V to 5.5-V power
supply
FORCEOFF
16
13
Thermal Pad
-
Yes
-
Exposed thermal pad. Can be connected to GND or left
floating.
(1)
Signal Types: I = Input, O = Output, I/O = Input or Output.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)See (1)
Supply voltage range(2)
VCC
range(2)
V+
Positive output supply voltage
V–
Negative output supply voltage range(2)
V+ – V– Supply voltage
Input voltage range
VO
Output voltage range
TJ
Operating virtual junction temperature
Tstg
Storage temperature range
(2)
MAX
6
V
–0.3
7
V
0.3
–7
V
13
V
difference(2)
VI
(1)
MIN
–0.3
Driver ( FORCEOFF, FORCEON, EN)
–0.3
6
Receiver
–25
25
–13.2
13.2
–0.3
VCC + 0.3
Driver
Receiver ( INVALID)
–65
UNIT
V
V
150
°C
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to network GND.
6.2 ESD Ratings
VALUE
V (ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC
JS-001(1)
UNIT
±3000
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V
±1500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 ESD Ratings, IEC Specifications
PIN NAME
TEST CONDITIONS
HBM
RIN, DOUT
(1)
4
TYP
UNIT
±15
IEC 61000-4-2 Contact Discharge(1)
±8
IEC 61000-4-2 Air-Gap Discharge(1)
±15
kV
For the RGT and PW package only, a minimum of 1-µF capacitor is required between VCC and GND to meet the specified IEC-ESD
level.
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6.4 Recommended Operating Conditions
See Figure 9-1 and (1)
VCC = 3.3 V
Supply voltage
VCC = 5 V
VIH
Driver and control
high-level input voltage
DIN, FORCEOFF, FORCEON, EN
VIL
Driver and control
low-level input voltage
DIN, FORCEOFF, FORCEON, EN
VI
Driver and control input voltage
DIN, FORCEOFF, FORCEON
VI
Receiver input voltage
TA
(1)
VCC = 3.3 V
VCC = 5 V
TRSF3221EI
Operating free-air temperature
TRSF3221EC
MIN
NOM
MAX
3
3.3
3.6
4.5
5
5.5
UNIT
2
V
V
2.4
0.8
V
0
5.5
V
–25
25
V
–40
85
0
70
°C
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
6.5 Thermal Resistance Characteristics
TRSF3221E
THERMAL
METRIC(1)
DB (SSOP)
PW (TSSOP)
RGT (VQFN)
16 Pins
16 Pins
16 Pins
UNIT
R θJA
Junction-to-ambient thermal resistance
82
110.9
58.8
°C/W
R θJC(top)
Junction-to-case (top) thermal
resistance
45.7
41.7
55.8
°C/W
R θJB
Junction-to-board thermal resistance
44.4
57.2
23.8
°C/W
ψ JT
Junction-to-top characterization
parameter
11.0
4.2
1.7
°C/W
ψ JB
Junction-to-board characterization
parameter
43.8
56.6
23.7
°C/W
R θJC(bot)
Junction-to-case (bottom) thermal
resistance
N/A
N/A
9
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application
report.
6.6 Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(see Figure 9-1)
TEST CONDITIONS(1)
PARAMETER
II
ICC
(1)
(2)
Input leakage current
Supply current
(TA = 25°C)
FORCEOFF, FORCEON, EN
MIN
TYP(2)
MAX
±0.01
±1
μA
0.3
1
mA
Auto-powerdown disabled
No load,
FORCEOFF and FORCEON at VCC
Powered off
No load, FORCEOFF at GND
1
10
Auto-powerdown enabled
No load, FORCEOFF at VCC,
FORCEON at GND,
All RIN are open or grounded
1
10
UNIT
μA
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
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6.7 Electrical Characteristics, Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(see Figure 9-1)
TEST CONDITIONS(1)
PARAMETER
MIN
VOH
High-level output voltage
DOUT at RL = 3 kΩ to GND,
DIN = GND
5
VOL
Low-level output voltage
DOUT at RL = 3 kΩ to GND,
DIN = VCC
–5
IIH
High-level input current
VI = VCC
IIL
Low-level input current
VI at GND
IOS
Short-circuit output
current(3)
VCC = 3.6 V,
VO = 0 V
VCC = 5.5 V,
VO = 0 V
ro
Output resistance
VCC, V+, and V– = 0 V,
VO = ±2 V
Ioff
Output leakage current
FORCEOFF = GND
(1)
(2)
(3)
TYP(2) MAX
5.4
V
–5.4
±0.01
UNIT
V
±1
μA
±0.01
±1
μA
±35
±60
±35
±90
300
10M
mA
Ω
VO = ±12 V,
VCC = 3 V to 3.6 V
±25
VO = ±10 V,
VCC = 4.5 V to 5.5 V
±25
μA
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Short-circuit durations must be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one
output can be shorted at a time.
6.8 Switching Characteristics, Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(see Figure 9-1)
TEST CONDITIONS(1)
PARAMETER
Maximum data rate
(see Figure 7-1 )
tsk(p)
Pulse skew(3)
SR(tr)
Slew rate,
transition region
(see Figure 7-1)
(1)
(2)
(3)
6
MIN
CL = 1000 pF
RL = 3 kΩ
TYP(2)
MAX
UNIT
250
CL = 250 pF,
VCC = 3 V to 4.5 V
1000
CL = 1000 pF,
VCC = 4.5 V to 5.5 V
1000
CL = 250 pF
RL = 3 kΩFigure 7-2 RGT Package
CL = 150 pF to 2500 pF,
RL = 3 kΩ to 7 kΩ,
See Figure 7-2
DB or PW package
VCC = 3.3 V,
RL = 3 kΩ to 7 kΩ,
CL = 150 pF to 1000 pF
kbit/s
25
ns
100
18
150
V/μs
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.
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6.9 Electrical Characteristics, Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(see Figure 9-1)
TEST CONDITIONS(1)
PARAMETER
VOH
High-level output voltage
IOH = –1 mA
VOL
Low-level output voltage
IOL = 1.6 mA
TYP(2)
VCC – 0.6 V
VCC – 0.1 V
MAX
0.4
1.6
2.4
VCC = 5 V
1.9
2.4
Positive-going input threshold voltage
VIT–
Negative-going input threshold voltage
Vhys
Input hysteresis (VIT+ – VIT–)
Ioff
Output leakage current
FORCEOFF = 0 V
ri
Input resistance
VI = ±3 V to ±25 V
VCC = 3.3 V
0.6
1.1
VCC = 5 V
0.8
1.4
UNIT
V
VCC = 3.3 V
VIT+
(1)
(2)
MIN
V
V
V
0.5
V
±0.05
±10
μA
5
7
kΩ
3
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
6.10 Switching Characteristics, Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(see Figure 9-1)
TEST CONDITIONS(1)
PARAMETER
TYP(2)
UNIT
tPLH
Propagation delay time, low- to high-level output
CL = 150 pF, See
Figure 7-3
RGT package
100
DB or PW package
150
tPHL
Propagation delay time, high- to low-level output
CL = 150 pF, See
Figure 7-3
RGT package
125
DB or PW package
150
ten
Output enable time
CL = 150 pF, RL = 3 kΩ, See Figure 7-4
200
ns
tdis
Output disable time
CL = 150 pF, RL = 3 kΩ, See Figure 7-4
200
ns
tsk(p)
Pulse skew(3)
See Figure 7-3
(1)
(2)
(3)
RGT package
25
DB or PW package
50
ns
ns
ns
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.
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6.11 Electrical Characteristics, Auto-Powerdown
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(see Figure 7-5)
PARAMETER
TEST CONDITIONS
MIN
VT+(valid)
Receiver input threshold
for INVALID high-level output voltage
FORCEON = GND,
FORCEOFF = VCC
VT–(valid)
Receiver input threshold
for INVALID high-level output voltage
FORCEON = GND,
FORCEOFF = VCC
–2.7
VT(invalid)
Receiver input threshold
for INVALID low-level output voltage
FORCEON = GND,
FORCEOFF = VCC
–0.3
VOH
INVALID high-level output voltage
IOH = –1 mA, FORCEON = GND,
FORCEOFF = VCC
VOL
INVALID low-level output voltage
IOL = 1.6 mA, FORCEON = GND,
FORCEOFF = VCC
MAX
UNIT
2.7
V
V
0.3
VCC – 0.6
V
V
0.4
V
6.12 Switching Characteristics, Auto-Powerdown
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(see Figure 7-5)
TYP(1)
PARAMETER
tvalid
Propagation delay time, low- to high-level output
tinvalid
Propagation delay time, high- to low-level output
ten
Supply enable time
(1)
UNIT
1
μs
30
μs
100
μs
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
120
CL = 150pF
CL = 250pF
CL = 1000pF
110
Driver Pulse Skew (ns)
100
90
80
70
60
50
40
30
20
Receiver Low-to-High Propagation Delay (ns)
6.13 Typical Characteristics
120
-40 qC
25 qC
85 qC
115
110
105
100
95
90
85
80
75
3
10
3.25
3.5
3.75
4
4.25 4.5
VCC (V)
4.75
5
5.25
5.5
D002
0
3
3.25
3.5
3.75
4
4.25 4.5
VCC (V)
4.75
5
5.25
5.5
Figure 6-2. Receiver Path Low-to-High Propagation Delay vs TA
and Supply Voltage (RGT Package)
150
-40 qC
25 qC
85 qC
145
140
Receiver Path Skew (| tpLH -tpHL |) (ns)
Receiver High-to-Low Propagation Delay (ns)
Figure 6-1. Driver Pulse Skew vs Load Capacitance and Supply
Voltage at TA = 25 °C (RGT Package)
D002_rx_tpLH.grf
135
130
125
120
115
110
105
100
95
3
3.25
3.5
3.75
4
4.25 4.5
VCC (V)
4.75
5
5.25
5.5
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
-40 qC
25 qC
85 qC
3
D003
D003_rx_tpHL.grf
Figure 6-3. . Receiver Path High-to-Low Propagation Delay vs
TA and Supply Voltage (RGT Package)
8
3.25
3.5
3.75
4
4.25 4.5
VCC (V)
4.75
5
5.25
5.5
D004
D004_rx_skew.grf
Figure 6-4. Receiver Pulse Skew (|tpLH - tpHL|) vs TA and Supply
Voltage (RGT Package)
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7 Parameter Measurement Information
FORCEON
3V
Generator
(see Note B)
3V
Input
RS-232
Output
50 Ω
RL
tTHL
CL
(see Note A)
3V
FORCEOFF
TEST CIRCUIT
0V
3V
3V
Output
SR(tr) +
tTLH
−3 V
−3 V
6V
t THL or tTLH
VOH
VOL
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 7-1. Driver Slew Rate
FORCEON
3V
Generator
(see Note B)
3V
RS-232
Output
50 Ω
RL
Input
1.5 V
1.5 V
0V
CL
(see Note A)
tPLH
tPHL
VOH
3V
FORCEOFF
50%
50%
Output
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 7-2. Driver Pulse Skew
EN = VCC
3V
Input
1.5 V
1.5 V
−3 V
Output
Generator
(see Note B)
50 Ω
tPHL
CL
(see Note A)
tPLH
VOH
50%
Output
50%
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 7-3. Receiver Propagation Delay Times
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3V
Input
VCC
1.5 V
GND
S1
0V
tPZH
(S1 at GND)
tPHZ
(S1 at GND)
RL
3 V or 0 V
1.5 V
VOH
Output
50%
Output
CL
(see Note A)
EN
Generator
(see Note B)
0.3 V
tPZL
(S1 at VCC)
tPLZ
(S1 at VCC)
50 Ω
0.3 V
Output
50%
VOL
TEST CIRCUIT
NOTES: A.
B.
C.
D.
VOLTAGE WAVEFORMS
CL includes probe and jig capacitance.
The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
tPLZ and tPHZ are the same as tdis.
tPZL and tPZH are the same as ten.
Figure 7-4. Receiver Enable and Disable Times
10
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2.7 V
EN = GND
3V
0V
Receiver
Input
0V
ROUT
Generator
(see Note B)
2.7 V
−2.7 V
−2.7 V
−3 V
50 Ω
tvalid
tinvalid
VCC
Autopowerdown
INVALID
INVALID
Output
CL = 30 pF
(see Note A)
FORCEOFF
FORCEON
DIN
DOUT
50% VCC
50% VCC
0V
ten
V+
≈V+
Supply
Voltages
0.3 V
VCC
0V
0.3 V
V−
≈V−
TEST CIRCUIT
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
VOLTAGE WAVEFORMS
Valid RS-232 Level, INVALID High
2.7 V
Indeterminate
0.3 V
0V
If Signal Remains Within This Region
For More Than 30 µs, INVALID Is Low†
−0.3 V
Indeterminate
−2.7 V
Valid RS-232 Level, INVALID High
†
Auto-powerdown disables drivers and reduces supply
current to 1 µA.
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 5 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 7-5. INVALID Propagation Delay Times and Driver Enabling Time
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TRSF3221E
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8 Detailed Description
8.1 Overview
The TRSF3221E consists of one line driver, one line receiver, and a dual charge-pump circuit with ±15-kV IEC
ESD protection pin to pin (serial-port connection pins, including GND). The TRSF3221E provides the electrical
interface between an asynchronous communication controller and the serial-port connector. The charge pump
and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The TRSF3221E operates
at data signaling rates up to 1 Mbit/s and a driver output slew rate of 24 V/μs to 150 V/μs.
Flexible control options for power management are available when the serial port is inactive. The autopowerdown feature functions when FORCEON is low and FORCEOFF is high. During this mode of operation,
if the TRSF3221E does not sense a valid RS-232 signal on the receiver input, the driver output is disabled.
If FORCEOFF is set low and the enable (EN) input is high, both the driver and receiver are shut off, and the
supply current is reduced to 1 μA. Disconnecting the serial port or turning off the peripheral drivers causes the
auto-powerdown condition to occur. Auto-powerdown can be disabled when FORCEON and FORCEOFF are
high. With auto-powerdown enabled, the device is activated automatically when a valid signal is applied to the
receiver input. The INVALID output notifies the user if an RS-232 signal is present at the receiver input. INVALID
is high (valid data) if the receiver input voltage is greater than 2.7 V or less than –2.7 V, or has been between
–0.3 V and 0.3 V for less than 30 μs. INVALID is low (invalid data) if the receiver input voltage is between –0.3 V
and 0.3 V for more than 30 μs.
Outputs are protected against shorts to ground.
8.2 Functional Block Diagram
DIN
FORCEOFF
FORCEON
ROUT
13
11
DOUT
16
12
Auto-powerdown
10
8
9
1
INVALID
RIN
EN
Figure 8-1. Logic Diagram (Positive Logic)
8.3 Feature Description
The power block increases, inverts, and regulates voltage at V+ and V– pins using a charge pump that requires
four external capacitors. Auto-power-down feature for driver is controlled by FORCEON and FORCEOFF inputs.
Receiver is controlled by EN input. When MAX3221E is unpowered, it can be safely connected to an active
remote RS-232 device.
The driver interfaces the standard logic level to RS232 voltage levels. The DIN input must be valid high or low.
The receiver interfaces RS-232 levels to standard logic levels. An open input results in a high output on ROUT.
RIN input includes an internal standard RS-232 load. A logic high input on the EN pin shuts down the receiver
output.
12
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8.4 Device Functional Modes
Functional Tables, Each Driver
INPUTS(1)
DIN
(1)
FORCEON
FORCEOFF
VALID RIN
RS-232 LEVEL
OUTPUT
DOUT
DRIVER STATUS
X
X
L
X
Z
Powered off
L
H
H
X
H
H
H
H
X
L
Normal operation with
auto-powerdown disabled
L
L
H
Yes
H
H
L
H
Yes
L
L
L
H
No
Z
H
L
H
No
Z
Normal operation with
auto-powerdown enabled
Powered off by
auto-powerdown feature
H = high level, L = low level, X = irrelevant, Z = high impedance
Each Receiver
INPUTS(1)
RIN
(1)
EN
VALID RIN
RS-232 LEVEL
OUTPUT
ROUT
L
L
X
H
H
L
X
L
X
H
X
Z
Open
L
No
H
H = high level, L = low level, X = irrelevant, Z = high impedance
(off), Open = disconnected input or connected driver off
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
The TRSF3221E line driver and receiver is a specialized device for 3-V to 5.5-V RS-232 communication
applications. This application is a generic implementation of this device with all required external components.
For proper operation, add capacitors as shown in Table 9-1.
9.1.1 Typical Application
ROUT and DIN connect to UART or general purpose logic lines. FORCEON and FORCEOFFmay be connected
general purpose logic lines or tied to ground or VCC. INVALID may be connected to a general purpose logic
line or left unconnected. RIN and DOUT lines connect to a RS-232 connector or cable. DIN, FORCEON, and
FORCEOFF inputs must not be left unconnected.
EN
1
16
2
VCC
C1+
FORCEOFF
15
+
3
C1
+
+
−
−
V+
Autopowerdown
C3(A)
4
GND
C1−
5
13
6
C2−
7
11
V−
10
C4
+
RIN
12
C2
−
DOUT
C2+
+
−
CBYPASS = 0.1 mF
−
14
8
9
FORCEON
DIN
INVALID
ROUT
5 kW
A.
B.
C.
C3 can be connected to VCC or GND.
Resistor values shown are nominal.
Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they must be connected as
shown.
Figure 9-1. Typical Operating Circuit and Capacitor Values
Table 9-1. VCC vs Capacitor Values
14
VCC
C1
C2, C3, C4
3.3 V ± 0.3 V
0.1 µF
0.1 µF
5 V ± 0.5 V
0.047 µF
0.33 µF
3 V to 5.5 V
0.1 µF
0.47 µF
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9.1.1.1 Design Requirements
•
•
•
Recommended VCC is 3.3 V or 5 V – 3 V to 5.5 V is also possible
Maximum recommended bit rate is 1 Mbps
Use capacitors as shown in Figure 9-1 and Table 9-1
9.1.1.2 Detailed Design Procedure
For proper operation:
•
•
DIN, FORCEOFF and FORCEON inputs must be connected to valid low or high logic levels
Select capacitor values based on VCC level for best performance
ROUT and DIN connect to UART or general purpose logic lines. FORCEON and FORCEOFF may be connected
general purpose logic lines or tied to ground or VCC. INVALID may be connected to a general purpose logic
line or left unconnected. RIN and DOUT lines connect to a RS232 connector or cable. DIN, FORCEON, and
FORCEOFF inputs must not be left unconnected.
9.1.2 Application Performance Plot
Figure 9-2. 1 Mbps Driver to Receiver Loopback Timing Waveform, VCC = 3.3 V
10 Power Supply Recommendations
VCC must be between 3 V and 5.5 V. Charge pump capacitors must be chosen using VCC vs Capacitor Values.
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11 Layout
11.1 Layout Guidelines
Keep the external capacitor traces short. This is more important on C1 and C2 nodes, which have the fastest
rise and fall times.
11.2 Layout Example
Ground
C3
1 EN
2 C1+
FORCEOFF 16
VCC 15
VCC
0.1 µF
C1
3 V+
GND 14
4 C1-
DOUT 13
5 C2+
FORCEON 12
6 C2-
DIN 11
Ground
C2
Ground
7 V-
INVALID 10
C4
8 RIN
ROUT 9
Figure 11-1. Layout Diagram
16
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12 Device and Documentation Support
12.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.5 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TRSF3221ECDB
ACTIVE
SSOP
DB
16
80
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
RT21EC
Samples
TRSF3221ECDBR
ACTIVE
SSOP
DB
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
RT21EC
Samples
TRSF3221ECPWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
RT21EC
Samples
TRSF3221EIDBR
ACTIVE
SSOP
DB
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
RT21EI
Samples
TRSF3221EIPWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
RT21EI
Samples
TRSF3221EIRGTR
ACTIVE
VQFN
RGT
16
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
F3221
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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