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TRSF3223EIDBR

TRSF3223EIDBR

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SSOP20

  • 描述:

    IC TRANSCEIVER FULL 2/2 20SSOP

  • 数据手册
  • 价格&库存
TRSF3223EIDBR 数据手册
TRSF3223E SLLS824A – AUGUST 2007 – REVISED SEPTEMBER 2011 www.ti.com 3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV ESD PROTECTION Check for Samples: TRSF3223E FEATURES 1 • • • • • • • • ESD Protection for RS-232 Bus Pins – ±15-kV Human-Body Model (HBM) – ±8-kV IEC 61000-4-2, Contact Discharge – ±15-kV IEC 61000-4-2, Air-Gap Discharge Meets or Exceeds the Requirements of TIA/EIA-232-F and ITU v.28 Standards Operates With 3-V to 5.5-V VCC Supply Operates up to 1000 kbit/s Two Drivers and Two Receivers Low Standby Current . . . 1 μA Typ External Capacitors . . . 4 × 0.1 μF Accepts 5-V Logic Input With 3.3-V Supply DB, DW, OR PW PACKAGE (TOP VIEW) EN C1+ V+ C1− C2+ C2− V− DOUT2 RIN2 ROUT2 APPLICATIONS The TRSF3223E consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). This device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The TRSF3223E operates at typical data signaling rates up to 1000 kbit/s. 19 3 18 4 17 5 16 6 7 15 14 8 13 9 12 10 11 FORCEOFF VCC GND DOUT1 RIN1 ROUT1 FORCEON DIN1 DIN2 INVALID RGW PACKAGE (TOP VIEW) V+ EN FORCEOFF VCC GND Battery-Powered Systems PDAs Notebooks Laptops Palmtop PCs Hand-Held Equipment DESCRIPTION/ ORDERING INFORMATION 20 2 20 19 18 17 16 C1+ C1− C2+ C2− V− 15 1 DOUT1 1 2 14 RIN1 3 4 13 ROUT1 12 FORCEON 5 11 DIN1 6 7 8 9 10 DOUT2 RIN2 ROUT2 INVALID DIN2 • • • • • • 1 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007–2011, Texas Instruments Incorporated TRSF3223E SLLS824A – AUGUST 2007 – REVISED SEPTEMBER 2011 www.ti.com Flexible control options for power management are available when the serial port is inactive. The auto-powerdown feature functions when FORCEON is low and FORCEOFF is high. During this mode of operation, if the device does not sense a valid RS-232 signal, the driver outputs are disabled. If FORCEOFF is set low and EN is high, both drivers and receivers are shut off, and the supply current is reduced to 1 mA. Disconnecting the serial port or turning off the peripheral drivers causes auto-powerdown to occur. Auto-powerdown can be disabled when FORCEON and FORCEOFF are high. With auto-powerdown enabled, the device is automatically activated when a valid signal is applied to any receiver input. The INVALID output is used to notify the user if an RS-232 signal is present at any receiver input. INVALID is high (valid data) if any receiver input voltage is greater than 2.7 V or less than –2.7 V, or has been between –0.3 V and 0.3 V for less than 30 μs. INVALID is low (invalid data) if the receiver input voltage is between –0.3 V and 0.3 V for more than 30 μs. Refer to Figure 4 for receiver input levels. Table 1. ORDERING INFORMATION PACKAGE (1) TA SOIC – DW SSOP – DB 0°C to 70°C TSSOP – PW SOIC – DW SSOP – DB –40°C to 85°C TSSOP – PW QFN – RGW (1) (2) (2) ORDERABLE PART NUMBER Tube of 25 TRSF3223ECDW Reel of 2000 TRSF3223ECDWR Tube of 70 TRSF3223ECDB Reel of 2000 TRSF3223ECDBR Tube of 70 TRSF3223ECPW Reel of 2000 TRSF3223ECPWR Tube of 25 TRSF3223EIDW Reel of 2000 TRSF3223EIDWR Tube of 70 TRSF3223EIDB Reel of 2000 TRSF3223EIDBR Tube of 70 TRSF3223EIPW Reel of 2000 TRSF3223EIPWR Reel of 3000 TRSF3223EIRGWR TOP-SIDE MARKING TRSF3223EC RT23EC RT23EC TRSF3223EI RT23EI RT23EI RT23EI Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. FUNCTION TABLES ABC Each Driver (1) INPUTS (1) 2 OUTPUT DOUT DRIVER STATUS X Z Powered off Normal operation with auto-powerdown disabled DIN FORCEON FORCEOFF VALID RIN RS-232 LEVEL X X L L H H X H H H H X L L L H Yes H H L H Yes L L L H No Z H L H No Z Normal operation with auto-powerdown enabled Powered off by auto-powerdown feature H = high level, L = low level, X = irrelevant, Z = high impedance Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRSF3223E TRSF3223E SLLS824A – AUGUST 2007 – REVISED SEPTEMBER 2011 www.ti.com Each Receiver (1) INPUTS (1) RIN EN VALID RIN RS-232 LEVEL OUTPUT ROUT L L X H H L X L X H X Z Open L No H H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off LOGIC DIAGRAM (POSITIVE LOGIC) DIN1 DIN2 FORCEOFF FORCEON EN ROUT1 ROUT2 13 17 12 8 20 DOUT1 DOUT2 11 Powerdown 14 INVALID 1 15 16 10 9 RIN1 RIN2 Pin numbers are for the DB, DW, and PW packages. Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRSF3223E 3 TRSF3223E SLLS824A – AUGUST 2007 – REVISED SEPTEMBER 2011 www.ti.com Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.3 6 V V+ Positive-output supply voltage range (2) –0.3 7 V V– Negative-output supply voltage range (2) 0.3 –7 V V+ – V– Supply voltage difference (2) 13 V VI Input voltage range VO Output voltage range θJA Package thermal impedance (3) TJ Operating virtual junction temperature Tstg Storage temperature range Driver (FORCEOFF, FORCEON, EN) –0.3 6 Receiver –25 25 –13.2 13.2 –0.3 VCC + 0.3 Driver Receiver (INVALID) (4) DB package 70 DW package 58 PW package (1) (2) (3) (4) V V °C/W 83 –65 150 °C 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to network GND. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions (1) See Figure 6 VCC = 3.3 V Supply voltage VCC = 5 V VIH Driver and control high-level input voltage DIN, EN, FORCEOFF, FORCEON VIL Driver and control low-level input voltage DIN, EN, FORCEOFF, FORCEON Driver and control input voltage DIN, EN, FORCEOFF, FORCEON VI TA (1) VCC = 3.3 V VCC = 5 V NOM MAX 3 3.3 3.6 4.5 5 5.5 UNIT V 2 V 2.4 0.8 Receiver input voltage TRSF3223EC Operating free-air temperature MIN TRSF3223EI 0 5.5 –25 25 0 70 –40 85 V V °C Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5) PARAMETER II ICC (1) (2) 4 Input leakage current Supply current TEST CONDITIONS MIN EN, FORCEOFF, FORCEON TYP (2) MAX UNIT ±0.01 ±1 μA 0.3 1 mA Auto-powerdown disabled VCC = 3.3 V or 5 V, TA = 25°C, No load, FORCEOFF and FORCEON at VCC Powered off No load, FORCEOFF at GND 1 10 Auto-powerdown enabled No load, FORCEOFF at VCC, FORCEON at GND, All RIN are open or grounded 1 10 μA Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRSF3223E TRSF3223E SLLS824A – AUGUST 2007 – REVISED SEPTEMBER 2011 www.ti.com DRIVER SECTION Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5) PARAMETER TEST CONDITIONS MIN TYP (2) 5.4 MAX UNIT VOH High-level output voltage DOUT at RL = 3 kΩ to GND 5 VOL Low-level output voltage DOUT at RL = 3 kΩ to GND –5 IIH High-level input current VI = VCC ±0.01 ±1 μA IIL Low-level input current VI at GND ±0.01 ±1 μA ±35 ±60 mA IOS Short-circuit output current (3) ro Output resistance IOZ (1) (2) (3) Output leakage current –5.4 VCC = 3.6 V, VO = 0 V VCC = 5.5 V, VO = 0 V VCC, V+, and V– = 0 V, VO = ±2 V V 300 V Ω 10M FORCEOFF = GND, VCC = 3 V to 3.6 V, VO = ±12 V ±25 FORCEOFF = GND, VCC = 4.5 V to 5.5 V, VO = ±12 V ±25 μA Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one output should be shorted at a time. Switching Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5) PARAMETER CL = 1000 pF Maximum data rate (see Figure 1) RL = 3 kΩ, One DOUT switching tsk(p) Pulse skew (3) SR(tr) Slew rate, transition region (see Figure 1) (1) (2) (3) MIN TYP (2) MAX TEST CONDITIONS 250 CL = 250 pF, VCC = 3 V to 4.5 V 1000 CL = 1000 pF, VCC = 4.5 V to 5.5 V 1000 CL = 150 pF to 2500 pF, RL = 3 kΩ to 7 kΩ, See Figure 2 RL = 7 kΩ, CL = 150 pF to 1000 pF RL = 3 kΩ UNIT kbit/s 300 8 ns 90 CL = 1000 pF 12 60 CL = 150 pF to 250 pF 24 150 V/μs Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Pulse skew is defined as |tPLH – tPHL| of each channel of the same device. Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRSF3223E 5 TRSF3223E SLLS824A – AUGUST 2007 – REVISED SEPTEMBER 2011 www.ti.com RECEIVER SECTION Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 6) PARAMETER VOH High-level output voltage IOH = –1 mA VOL Low-level output voltage IOL = 1.6 mA TYP (2) VCC – 0.6 VCC – 0.1 MAX 0.4 1.6 2.4 VCC = 5 V 1.9 2.4 Positive-going input threshold voltage VIT– Negative-going input threshold voltage Vhys Input hysteresis (VIT+ – VIT–) IOZ Output leakage current EN = VCC ri Input resistance VI = ±3 V to ±25 V VCC = 3.3 V 0.6 1.1 VCC = 5 V 0.6 1.4 UNIT V VCC = 3.3 V VIT+ (1) (2) MIN TEST CONDITIONS V V V 0.5 V ±0.05 μA 5 kΩ 3 Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Switching Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS TYP (2) UNIT tPLH Propagation delay time, low- to high-level output CL = 150 pF, See Figure 3 150 ns tPHL Propagation delay time, high- to low-level output CL = 150 pF, See Figure 3 150 ns ten Output enable time CL = 150 pF, RL = 3 kΩ, See Figure 4 200 ns tdis Output disable time CL = 150 pF, RL = 3 kΩ, See Figure 4 200 ns tsk(p) Pulse skew (3) See Figure 3 50 ns (1) (2) (3) 6 Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Pulse skew is defined as |tPLH – tPHL| of each channel of the same device. Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRSF3223E TRSF3223E SLLS824A – AUGUST 2007 – REVISED SEPTEMBER 2011 www.ti.com AUTO-POWERDOWN SECTION Electrical Characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5) PARAMETER TEST CONDITIONS MIN VT+(valid) Receiver input threshold for INVALID high-level output voltage FORCEON = GND, FORCEOFF = VCC VT–(valid) Receiver input threshold for INVALID high-level output voltage FORCEON = GND, FORCEOFF = VCC –2.7 VT(invalid) Receiver input threshold for INVALID low-level output voltage FORCEON = GND, FORCEOFF = VCC –0.3 VOH INVALID high-level output voltage IOH = 1 mA, FORCEOFF = VCC FORCEON = GND, VOL INVALID low-level output voltage IOL = 1.6 mA, FORCEOFF = VCC FORCEON = GND, MAX UNIT 2.7 V V 0.3 V VCC – 0.6 V 0.4 V Switching Characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5) PARAMETER TYP (1) UNIT tvalid Propagation delay time, low- to high-level output 1 μs tinvalid Propagation delay time, high- to low-level output 30 μs ten Supply enable time 100 μs (1) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRSF3223E 7 TRSF3223E SLLS824A – AUGUST 2007 – REVISED SEPTEMBER 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. 3V Input Generator (see Note B) 1.5 V RS-232 Output 50 Ω RL 1.5 V 0V CL (see Note A) tTHL 3V FORCEOFF tTLH VOH 3V 3V Output −3 V −3 V VOL TEST CIRCUIT VOLTAGE WAVEFORMS SR(tr) + t THL 6V or t TLH Figure 1. Driver Slew Rate A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. 3V Generator (see Note B) RS-232 Output 50 Ω RL Input 1.5 V 1.5 V 0V CL (see Note A) tPLH tPHL VOH 3V FORCEOFF 50% 50% Output VOL TEST CIRCUIT VOLTAGE WAVEFORMS Figure 2. Driver Pulse Skew A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. EN 0V 3V Input 1.5 V 1.5 V −3 V Output Generator (see Note B) 50 Ω tPHL CL (see Note A) tPLH VOH 50% Output 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS Figure 3. Receiver Propagation Delay Times 8 A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRSF3223E TRSF3223E SLLS824A – AUGUST 2007 – REVISED SEPTEMBER 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) VCC GND S1 RL 3 V or 0 V Output CL (see Note A) EN 3V Input 1.5 V 0V tPZH (S1 at GND) tPHZ (S1 at GND) VOH Output 50% 0.3 V Generator (see Note B) 1.5 V 50 Ω tPLZ (S1 at VCC) 0.3 V Output 50% VOL tPZL (S1 at VCC) TEST CIRCUIT VOLTAGE WAVEFORMS Figure 4. Receiver Enable and Disable Times A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRSF3223E 9 TRSF3223E SLLS824A – AUGUST 2007 – REVISED SEPTEMBER 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) 2.7 V 2.7 V EN 0V Receiver Input 0V 50 Ω VCC INVALID Output 50% V CC 0V ten ≈V+ V+ 0.3 V VCC 0V 0.3 V Supply Voltages FORCEOFF FORCEON 50% V CC INVALID CL = 30 pF (see Note A) DIN DOUT ≈V− V− TEST CIRCUIT −3 V tvalid tinvalid AutoPowerdown 2.7 V −2.7 V ROUT Generator (see Note B) 3V ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ VOLTAGE WAVEFORMS Valid RS-232 Level, INVALID High 2.7 V Indeterminate 0.3 V If Signal Remains Within This Region for More Than 30 ms, INVALID Is Low † 0V 0.3 V Indeterminate 2.7 V Valid RS-232 Level, INVALID High † Auto-powerdown disables drivers reduces supply current to 1 µA and Figure 5. INVALID Propagation Delay Times and Supply Enabling Time 10 Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRSF3223E TRSF3223E SLLS824A – AUGUST 2007 – REVISED SEPTEMBER 2011 www.ti.com APPLICATION INFORMATION 1 EN 2 20 AutoPowerdown VCC C1+ FORCEOFF 19 CBYPASS + 3 C1 V+ GND 18 = 0.1mF C3 † 4 5 17 C1 16 C2+ DOUT1 RIN1 + C2 6 15 C2 ROUT1 5 kΩ 7 C4 FORCEON + 8 13 9 12 10 11 DOUT2 RIN2 ROUT2 14 V DIN1 DIN2 INVALID 5 kΩ † C3 can be connected to V CC or GND. NOTES: A. Resistor values shown are nominal. B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be connected as shown. VCC vs CAPACITOR VALUES VCC 3.3 V " 0.3 V C1 0.1 µF C2, C3, and C4 0.1 µF 5 V " 0.5 V 0.047 µF 0.33 µF 3 V to 5.5 V 0.1 µF 0.47 µF Figure 6. Typical Operating Circuit and Capacitor Values Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRSF3223E 11 TRSF3223E SLLS824A – AUGUST 2007 – REVISED SEPTEMBER 2011 www.ti.com REVISION HISTORY Changes from Original (August 2007) to Revision A Page • Added RGW package to datasheet. ..................................................................................................................................... 1 • Deleted RHL package from datasheet. ................................................................................................................................. 1 12 Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TRSF3223E PACKAGE OPTION ADDENDUM www.ti.com 23-Apr-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TRSF3223ECPWR ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 RT23EC TRSF3223EIDBR ACTIVE SSOP DB 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 RT23EI TRSF3223EIDWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TRSF3223EI TRSF3223EIPW ACTIVE TSSOP PW 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 RT23EI TRSF3223EIPWR ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 RT23EI TRSF3223EIRGWR ACTIVE VQFN RGW 20 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 RT23EI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
TRSF3223EIDBR 价格&库存

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