TS5V522CDBQR

TS5V522C SCDS317 – MARCH 2011 www.ti.com 5V, 5-BITS VIDEO EXCHANGE SWITCH FOR DUAL VGA SOURCE TO SINK -2V UNDERSHOOT PROTECTION WITH LOW ON-STATE RESISTANCE Check for Samples: TS5V522C FEATURES APPLICATIONS • • • • • • 1 • • • • • • • • • • • Bidirectional Data Flow, With Near-Zero Propagation Delay High Bandwidth, 380MHZ (typ) RGB Switching Low ON-State Resistance (ron) Characteristics (ron =3 Ω Typical) Low Input/Output Capacitance Minimizes Loading and Signal Distortion (CIO(OFF) = 8pF Typical) Undershoot Clamp Diodes on Data and Control Inputs. Low Power Consumption (Icc = 3uA Max.) Vcc Operation Range from 4V to 5.5V Data I/Os Support 0 to 5-V Signaling Levels (0.8V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, 4V) Allow to pull up resistor up to 5V on the I/O Ioff Supports Live Insertion, Partial Power Down Mode, and Back Drive Protection Latch-Up Performance Exceeds 100Ma Per JESD 78, Class II. ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B, Class II) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) Digital and Analog Signal Interface Audio and Video Signal Interface High Speed Signal Bus Exchange Bus Isolation, Interleaving Notebook Computer Graphics Control OE AR 1R 2R BR AG 1G 2G BG AB 1B GND 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC BSCL 2SCL 1SCL ASCL BSCA 2SCA 1SCA ASCA BB 2B SEL DESCRIPTION The TS5V522C is high bandwidth analog switches offering a 2:2 dual-graphics crossover solution for VGA signal switching. The device is designed for switching between 2 VGA sources to either of the two destinations within a laptop computer. The TS5V522C integrates 5 very high-frequency 380Mhz (typ) SPDT switches for RGB signals, 2 pairs of level-translating buffer for the HSYNC and VSYNC lines, and integrated ESD protection. The 5 crossover switches can be controlled by either 5V or 3.3V TTL control signals. The TS5V522C would bypass the VGA analog signal to destination with less distortions. DDC Channel (SCA, SCL) may require to +5Vopen drain level at the VGA connector and it may require a pull up resistor on the destination side. Active undershoot-protection circuitry on the data ports of the TS5V522C provide protection for undershoots up to -2V by sensing an undershoot event and ensuring that the switch remains in the proper off state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2011, Texas Instruments Incorporated TS5V522C SCDS317 – MARCH 2011 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION (1) PACKAGE (2) TA –40°C to 85°C (1) (2) ORDERABLE PART NUMBER TOP-SIDE MARKING SSOP (QSOP) – DBQ Tape and Reel TS5V522CDBQR TS5V522C TSSOP – PW Tape and Reel TS5V522CPWR TE522C For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. Table 1. FUNCTION TABLE CONTROL INPUT/OUTPUTS FUNCTIONS OE SEL 1X 2X L L AX BX 1X port = AX port 2x port = BX port L H BX AX 1X port = BX port 2x port = AX port H X Z Z Disconnect Table 2. PIN DESCRIPTION 2 PIN NAME DESCRIPTION xR, xG, xB Analog Video I/Os xSCL, xSCA Analog sync I/Os OE Enable pin EN Input select Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TS5V522C TS5V522C SCDS317 – MARCH 2011 www.ti.com PARAMETER DEFINITIONS PARAMETER DESCRIPTION rON Resistance between the input and output ports with the switch in the ON-state IOZ Output leakage current measured at the D and S ports with the switch in the OFF-state IOS Short circuit current measured at the I/O pins. VIN Voltage at the IN pin VEN Voltage at the EN pin CIN Capacitance at the control inputs (EN, IN) COFF Capacitance at the analog I/O port when the switch is OFF CON Capacitance at the analog I/O port when the switch is ON VIH Minimum input voltage for logic high for the control inputs (EN, IN) VIL Minimum input voltage for logic low for the control inputs (EN, IN) VH Hysteresis voltage at the control inputs (EN, IN) VIK I/O and control inputs diode clamp voltage (EN, IN) VI Voltage applied to the I/O pins when I/O is the switch input. VO Voltage applied to the I/O pins when I/O is the switch output. IIH Input high leakage current of the control inputs (EN, IN) IIL Input low leakage current of the control inputs (EN, IN) II Current into the I/O pins when I/O is the switch input. IO Current into the I/O pins when I/O is the switch output. Ioff Output leakage current measured at the I/O ports with VCC = 0 tON Propagation delay measured between 50% of the digital input to 90% of the analog output when switch is turned ON. tOFF Propagation delay measured between 50% of the digital input to 90% of the analog output when switch is turned OFF. BW Frequency response of the switch in the ON-state measured at –3 dB XTALK Unwanted signal coupled from channel to channel. Measured in –dB. XTALK = 20 LOG VOUT/VIN. This is a non-adjacent crosstalk. OIRR Off-isolation is the resistance (measured in –dB) between the input and output with the switch OFF. DG Magnitude variation between analog input and output pins when the switch is ON and the DC offset of composite video signal varies at the analog input pin. In NTSC standard the frequency of the video signal is 3.58 MHz and DC offset is from 0 to 0.714 V. DP Phase variation between analog input and output pins when the switch is ON and the DC offset of composite video signal varies at the analog input pin. In NTSC standard the frequency of the video signal is 3.58 MHz and DC offset is from 0 to 0.714 V. ICC Static power supply current ICCD Variation of ICC for a change in frequency in the control inputs (EN, IN) ΔICC This is the increase in supply current for each control input that is at the specified voltage level, rather than VCC or GND. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TS5V522C 3 TS5V522C SCDS317 – MARCH 2011 www.ti.com LOGIC DIAGRAM (XX GATE) 1R AR SW SW SW 2R SW BR 1SCL SW ASCL SW SW 2SCL SW BSCL OE SEL 4 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TS5V522C TS5V522C SCDS317 – MARCH 2011 www.ti.com R G B H.Sync V.Sync VGA Graphics (3.3V) SDA SCL VGA Connector Logic Control TS5V522C R G B H.Sync V.Sync VGA Graphics (3.3V) SDA SCL Docking Station Connector CBT3257C Figure 1. Typical Design Examples for Dual VGA Source Signal Exchange VCC = + 3.3V VCC = + 5V VCC = + 5V SW SW SW SW Design Notes: 1. DDC (SCL,SDA) is open drain I2C Bus type and need pull up resistors. N-Channel FET Switch allow to pull up desired Vcc Level not exceeding the Vcc of FET Switch 2. VGA (H.Sync, V.Sync) are TTL/CMOS Type from the source of V ideo and it may required pull up to achieve as high as 5V Signal level to meet VGA Specifications too. Figure 2. Typical Design Example for Level Shifting with N-Channel FET Switch Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TS5V522C 5 TS5V522C SCDS317 – MARCH 2011 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 7 V VIN Control input voltage range (2) (3) –0.5 7 V VI/O Output voltage range (2) (3) (4) –0.5 7 IIK Control input clamp current VIN < 0 II/OK I/O port clamp current VI/O < 0 II/O ON-state switch current (5) Continuous current through VCC or GND ±100 mA 150 °C Tstg (1) (2) (3) (4) (5) –65 Storage temperature range V –50 mA –50 mA ±128 mA Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "Recommended Operating Conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All input and output negative voltages are with respect to ground unless otherwise specified. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. VI and VO are used to denote specific conditions for VI/O. II and IO are used to denote specific conditions of II/O. THERMAL IMPEDANCE RATINGS over operating free-air temperature range (unless otherwise noted) UNIT θJA (1) Package thermal impedance DBQ package (1) 90 PW package (1) 108 °C/W The package thermal impedance is calculated in accordance with JESD 51-7. RECOMMENDED OPERATING CONDITIONS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage 4 5.5 V VIH High-level control input voltage (EN, IN) 2 5.5 V VIL Low-level control input voltage (EN, IN) 0 0.8 V VANALOG Analog input/output voltage 0 VCC V TA Operating free-air temperature –40 85 V (1) 6 All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implication of slow or Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TS5V522C TS5V522C SCDS317 – MARCH 2011 www.ti.com ELECTRICAL CHARACTERISTICS (1) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS TYP (2) MIN IIN = –18 mA V 400 mV VIN and VEN = VCC ±1 µA VIN and VEN = GND ±1 µA EN, IN VH EN, IN IIH EN, IN VCC = 5.5 V, IIL EN, IN VCC = 5.5 V, VCC = 5.5 V, VO = 0 to 5.5 V, VI = 0, Switch OFF ±10 IOS VCC = 5.5 V, VO = 0 to 5.5 V, VI = 0, Switch ON ±110 Ioff VCC = 0 V, VO = 0 to 5.5 V, VI = 0 ICC VCC = 5.5 V, II/O = 0, Switch ON or OFF VCC = 5.5 V, One input at 3.4 V, Other Inputs at VCC or GND 2.5 VCC = 5.5 V, VEN = GND, I/O ports are open, VIN switching 50% duty cycle 0.25 IOZ ΔICC EN, IN ICCD Cin EN, IN VIN or VEN = 0 V, f = 1 MHz COFF D port VI/O = 3 V or 0 V, Switch OFF, S port CON rON (1) (2) (3) (4) (4) UNIT –1.8 VIK (3) VCC = 4.5 V, MAX µA mA ±1 µA 3 µA mA mA/MHz 3..5 VIN = VCC or GND pF 8.5 Switch ON, pF 5.5 VI = 0 V, f = 1MHz, output open, Switch ON 16.5 pF VCC = 4.5 V, VI = 1 V, IO = 13 mA, RL = 75Ω 3 7 VI = 2 V, IO = 26 mA, RL = 75Ω 3 10 Ω VI, VO, II, and IO refer to the I.O pins. All typical values are at VCC = 5 V (unless otherwise noted). TA = 25°C For I/O ports, the parameter IOZ includes the input leakage current. Measured by the voltage drop between the D and S terminals at the indicated current through the switch. ON-state resistance is determined by the lower of the voltages of the two (S or D) terminals. SWITCHING CHARACTERISTICS over operating free-air temperature range (unless otherwise noted), see Figure 9 PARAMETER FROM (INPUT) TO (OUTPUT) tON S D 1 6.6 ns tOFF S D 1 6.0 ns MAX UNIT MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS over recommended operating free-air temperature range, VCC = 5 V ±10%(unless otherwise noted) PARAMETER (1) TEST CONDITIONS MIN TYP (1) DG RL = 150 Ω, f = 3.58 MHz, see Figure 10 0.37 DP RL = 150 Ω, f = 3.58 MHz, see Figure 10 0.0330 Deg BW RL = 150 Ω, see Figure 11 380 MHz XTALK RIN = 10 Ω, RL = 150 Ω, f = 10 MHz, see Figure 11 –83 OIRR RL = 150 Ω, f = 10 MHz, see Figure 11 –44 % dB dB All typical values are at VCC = 5V (unless otherwise noted). TA = 25°C. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TS5V522C 7 TS5V522C SCDS317 – MARCH 2011 www.ti.com over recommended operating free-air temperature range, VCC = 5 V ±10%(unless otherwise noted) (1) TEST CONDITIONS TYP (1) MAX UNIT DG RL = 75 Ω, f = 3.58 MHz, see Figure 10 0.37 DP RL = 75 Ω, f = 3.58 MHz, see Figure 10 0.0330 Deg BW RL = 75 Ω, see Figure 11 330 MHz XTALK RIN = 10 Ω, RL = 150Ω, f = 10 MHz, see Figure 11 –83 OIRR RL = 75 Ω, f = 10 MHz, see Figure 11 –44 % dB dB All typical values are at VCC = 5V (unless otherwise noted). TA = 25°C. 20 0 0 Gain at -3dB, 368MHz -1 250 10 -10 200 0 Phase at -3dB, -32° 160 -10 -3 -30 -4 -40 -5 Off Isolation - dB -20 Phase - Deg -2 Gain - dB MIN -50 -6 100 -20 -30 50 -40 0 -50 -50 Phase at 10 MHz, -86° -60 -100 -70 -150 -80 -60 -200 -90 -7 1.00E+06 -100 1.00E+06 -70 1.00E+09 1.00E+08 1.00E+07 f- Frequency - MHz Phase - Deg PARAMETER Figure 3. Frequency Response Crosstalk at 10 MHz, -81 dB 1.00E+07 1.00E+08 f - Frequency - MHz -250 1.00E+09 Figure 4. Non-adjacent Crosstalk vs Frequency 20 180 10 160 0.0 -0.495 Differential Gain at 0.714V, 38% -0.1 -0.5 -0.2 -0.505 -0.3 -0.51 -0.4 -0.52 -0.5 -0.525 -0.6 -0.53 0 Phase at 10MHz, 88° -30 100 -40 80 -50 60 -60 Off isolation at 10MHz, -44dB 40 -70 20 -80 -90 1.00E+06 1.00E+07 1.00E+08 f - Frequency - MHz 0 1.00E+09 Figure 5. Off Isolation vs Frequency 8 Differential Phase - Deg -20 Phase - Deg Off Isolation - dB 120 Differential Gain - % 140 -10 Differential Phase at 0.714V, -0.52 -0.7 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 Vbias - V 0.8 0.9 -0.535 1.0 Figure 6. Differential Phase/Gain vs Vbias Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TS5V522C TS5V522C SCDS317 – MARCH 2011 www.ti.com Table 3. UNDERSHOOT CHARACTERISTICS (see Figure 7 and Figure 8) PARAMETER VOUTU TEST CONDITIONS VCC = 5.5 V, Switch OFF, VCC Input Generator 11 V Input (Open Socket) 100 kΩ 50 Ω Ax DUT MIN TYP 2 VOH – 0.3 VIN = VCC or GND 90 % 2 ns UNIT V 90 % 5.5 V 2 ns 10 % 10 % Bx −2 V 20 ns 100 kΩ VS MAX 10 pF Output (VOUTU) VOH VOH − 0.3 Figure 8. Transient Input Voltage (VI) and Output Voltage (VOUTU) Waveforms (Switch OFF) Figure 7. Device Test Setup PARAMETER MEASUREMENT INFORMATION VCC Input Generator VIN IN 50 Ω 50 Ω VG1 S1 DUT TEST CIRCUIT VS1 S2 D VO EN VS2 CL (see Note A) RL TEST VCC RL CL VS1 V S2 tON 5 V ± 0.5 V 5 V ± 0.5 V 75 Ω 75 Ω 20 pF 20 pF GND 3V 3V GND tOFF 5 V ± 0.5 V 5 V ± 0.5 V 75 Ω 75 Ω 20 pF 20 pF GND 3V 3V GND 3V Output Control (VIN) 50% 50% 0V tON tOFF 3V Analog Output Waveform (VO) 90% 90% 0V VOLTAGE WAVEFORMS tON and tOFF TIMES Figure 9. Test Circuit and Voltage Waveforms Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TS5V522C 9 TS5V522C SCDS317 – MARCH 2011 www.ti.com Ω For additional information, refer to the TI application report, Measuring Differential Gain and Phase, literature number SLOA040. Figure 10. Test Circuit for Differential Gain/Phase Measurement The differential gain and phase is measured at the output of the ON channel. For example, when VIN = 0, VEN = 0, and DA is the input, the output is measured at S1A. HP8753ES Setup Average = 20 RBW = 300 Hz Smoothing = 2% VBIAS = 0 to 1 V ST = 1.381 s. P1 = –7 dBM CW frequency = 3.58 MHz 10 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TS5V522C TS5V522C SCDS317 – MARCH 2011 www.ti.com Ω Figure 11. Test Circuit for Frequency Response, Crosstalk, and OFF-Isolation The frequency response is measured at the output of the ON channel. For example, when VIN = 0, VEN = 0, and DA is the input, the output is measured at S1A. All unused analog I/O ports are held at VCC or GND. The crosstalk is measured at the output of the non-adjacent ON channel. For example, when VIN = 0, VEN = 0, and DA is the input, the output is measured at S1B. All unused analog I/O ports are held at VCC or GND. The off-isolation is measured at the output of the OFF channel. For example, when VIN = 0, VEN = VCC, and DA is the input, the output is measured at S1A. All unused analog I/O ports are held at VCC or GND. HP8753ES Setup Average = 4 RBW = 3 kHz Smoothing = 0% VBIAS = 0.35 V ST = 2 s P1 = 0 dBM Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TS5V522C 11 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TS5V522CDBQR ACTIVE SSOP DBQ 24 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 TS5V522C TS5V522CPWR ACTIVE TSSOP PW 24 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TE522C (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of