Product
Folder
Order
Now
Technical
Documents
Support &
Community
Tools &
Software
TUSB542
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
TUSB542 USB Type-C 5 Gbps Redriver 2:1 MUX
1 Features
3 Description
•
The TUSB542 is a dual channel USB 3.1 Gen1
(5 Gbps), also known as USB-C, re-driver supporting
systems with USB Type-C™ connectors. The device
offers signal conditioning plus the ability to switch the
USB SS signals for the USB Type-C™ flippable
connector. The TUSB542 can be controlled through
the SEL pin by an external Configuration Channel
Logic Controller to properly mux the signals.
1
•
•
•
•
•
•
•
•
•
Provides USB 3.1 Gen-1 5 Gbps Super Speed
(SS) 2:1 Mux for a USB Type-C™ Port
Supports USB Type-C Cable and Connector
Specifications
Ultra Low-Power Architecture
– Active 100 mA
– U2/U3 1.3 mA
– No Connection 300 μA
Selectable Equalization up to 9 dB, De-Emphasis,
and Output Swing up to 6 dB
Integrated Termination
RX-detect Function
Signal Monitoring for Power Management
No Host/Device Side Requirement – Supports
USB-C DFP, UFP or DRP Port
Single Supply Voltage 1.8 V ±10%
Industrial Temperature Range of –40 – 85°C
2 Applications
•
The TUSB542 incorporates receiver equalization and
transmitter de-emphasis to maintain signal integrity
on both transmit and receive data paths. The receiver
equalization offers multiple gain settings to overcome
channel degradation from insertion loss and intersymbol interference. To compensate for downstream
transmission line losses, the output driver supports
de-emphasis configuration. Additionally, automatic
LFPS de-emphasis control allows for full compliance.
The TUSB542 offers low power consumption on a
1.8-V supply with its ultra-low power architecture. The
re-driver supports low power modes, which further
reduce the idle power consumption.
The USB Type-C™ redriver is available in a small
ultra-thin package, which is suitable for many portable
applications.
USB 3.1 Gen 1 SS Application
– Phones
– Tablets, Phablets and Notebooks
– Docking Stations
Device Information(1)
PART NUMBER
TUSB542
PACKAGE
X2QFN (18)
BODY SIZE (NOM)
2.00 mm x 2.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
Type-C
Connector
RX_AP
Sample Application
RX_CON_1
TX_CON_1
TUSB542
RX_CON_2
TX_AP
TX_CON_2
SEL
Host
Processor
(USB Device)
CC/PD
Controller
CC1
CC2
Copy right © 2016, Tex as Ins truments Inc orporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TUSB542
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
4
5
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
5
5
5
5
6
6
7
7
8
8
9
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics, Power Supply Currents....
Electrical Characteristics, DC ...................................
Electrical Characteristics, Dynamic...........................
Electrical Characteristics, AC....................................
Timing Requirements ................................................
Switching Characteristics ........................................
Typical Characteristics ............................................
Detailed Description ............................................ 12
7.1 Overview ................................................................. 12
7.2 Functional Block Diagram ....................................... 13
7.3 Feature Description................................................. 14
7.4 Device Functional Modes........................................ 15
8
Application and Implementation ........................ 16
8.1 Application Information............................................ 16
8.2 Typical Applications, USB Type-C Port SS MUX ... 16
9 Power Supply Recommendations...................... 22
10 Layout................................................................... 22
10.1 Layout Guidelines ................................................. 22
10.2 Layout Example .................................................... 22
11 Device and Documentation Support ................. 23
11.1
11.2
11.3
11.4
11.5
11.6
Documentation Support .......................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
23
23
23
23
23
23
12 Mechanical, Packaging, and Orderable
Information ........................................................... 23
4 Revision History
Changes from Revision D (March 2017) to Revision E
Page
•
Changed Feature From: Selectable Equalization, De-Emphasis, and Output Swing To: Selectable Equalization up to
9 dB, De-Emphasis, and Output Swing up to 6 dB ............................................................................................................... 1
•
Deleted Feature: Automatic LFPS De-Emphasis Control for USB 3.1 Compliance............................................................... 1
•
Changed Feature From: Can Support USB DFP, UFP or DRP Port To: Supports USB-C DFP, UFP or DRP Port ............. 1
•
Changed Application From: USB Type-C SS Application To: USB 3.1 Gen 1 SS Application.............................................. 1
•
Changed the Simplified Schematic......................................................................................................................................... 1
•
Changed the first five paragraghs of the Overview section.................................................................................................. 12
•
Changed Figure 15 .............................................................................................................................................................. 16
•
Changed the Design Requirements and the Detailed Design Procedure section of Typical Applications, USB Type-C
Port SS MUX section............................................................................................................................................................ 17
•
Changed the Design Requirements and the Detailed Design Procedure section of Typical Application: Switching
USB SS Host or Device Ports .............................................................................................................................................. 20
Changes from Revision C (August 2016) to Revision D
•
Added a MIN value of –65 to the Storage temperature in the Absolute Maximum Ratings table.......................................... 5
Changes from Revision B (January 2016) to Revision C
•
Page
Page
Changed Pin 15 To: TX_AP+ and Pin 14 To: TX_AP- in the RWQ Package image............................................................. 4
Changes from Revision A (January 2016) to Revision B
Page
•
Changed the RX_AP+ (pin 18) and RX_AP- (pin 17) I/O Type and Description to Diff output ............................................. 4
•
Changed the TX_AP+ (pin 15) and RX_AP- (pin 14) I/O Type and Description to Diff input ............................................... 4
2
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
TUSB542
www.ti.com
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
Changes from Original (December 2015) to Revision A
Page
•
Changed the TX_AP and RX_AP pins in the Simplified Schematic....................................................................................... 1
•
Changed the RX_AP+, RX_AP- and TX_AP+, TX_PA- pins in the RWQ Package image ................................................... 4
•
Changed pin RX_AP+ number From: 15 To: 18 .................................................................................................................... 4
•
Changed pin RX_AP- number From: 14 To: 17 ..................................................................................................................... 4
•
Changed pin TX_AP+ number From: 18 To: 15..................................................................................................................... 4
•
Changed pin TX_AP- number From: 17 To: 14 ..................................................................................................................... 4
•
Changed Table 1 ................................................................................................................................................................. 12
•
Changed Figure 13 .............................................................................................................................................................. 12
•
Changed the Functional Block Diagram .............................................................................................................................. 13
•
Changed location of pins SSTXP, SSTXN and SSRXP, SSRXN in Figure 16 ................................................................... 18
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
3
TUSB542
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
www.ti.com
5 Pin Configuration and Functions
RX_AP+
RX_AP–
SEL
TX_AP+
TX_AP–
RWQ Package
18 Pins (X2QFN)
Top View
18
17
16
15
14
CNFG_A1
1
RX_CON_1+
2
13
CNFG_A2
12
TX_CON_2+
GND
CNFG_B1
4
10
CNFG_B2
VDD18
5
6
7
8
9
RX_CON_2+
TX_CON_2–
RX_CON_2–
11
TX_CON_1–
3
TX_CON_1+
RX_CON_1–
Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
VDD18
5
P
1.8 V Power Supply
GND
PAD
G
Reference Ground Thermal Pad. Must connect to GND on the board.
SEL
16
Input
CNFG_A1
1
Tri-level configuration input pin A1 (for Ch 1): sets channel 1 (AP to redriver) EQ, DE and OS
Tri-level Input configurations. Pin has integrated pull-up and pull-down resistors of 105 kΩ. Refer to Table 2
for configuration settings.
CNFG_B1
4
Tri-level configuration input pin B1 (for Ch 1): sets channel 1 (AP to redriver) EQ, DE and OS
Tri-level Input configurations. Pin has integrated pull-up and pull-down resistors of 105 kΩ. Refer to Table 2
for configuration settings.
CNFG_A2
13
Tri-level configuration input pin A2 (for Ch 2): sets channel 2 (redriver to device) EQ, DE and
Tri-level Input OS configurations. Pin has integrated pull-up and pull-down resistors of 10 5 kΩ. Refer to
Table 2 for configuration settings.
CNFG_B2
10
Tri-level configuration input pin B2 (for Ch 2): sets channel 2 (redriver to device) EQ, DE and
Tri-level Input OS configurations. Pin has integrated pull-up and pull-down resistors of 105 kΩ. Refer to
Table 2 for configuration settings.
RX_AP+
18
Diff output
Differential output to Application Processor (AP), 5 Gbps SS positive signal
RX_AP-
17
Diff output
Differential output to AP, 5 Gbps SS negative signal
TX_AP+
15
Diff input
Differential input from AP, 5 Gbps SS positive signal
TX_AP-
14
Diff input
Differential input from AP, 5 Gbps SS negative signal
Rx_Con_1+
2
Diff input
Differential input from Type-C Connector, Position 1, SS positive signal
Rx_Con_1-
3
Diff input
Differential input from Type-C Connector, Position 1, SS negative signal
Tx_Con_1+
6
Diff output
Differential output to Type-C Connector, Position 1, SS positive signal
Tx_Con_1-
7
Diff output
Differential output to Type-C Connector, Position 1, SS negative signal
Rx_Con_2-
8
Diff input
Differential input from Type-C Connector, Position 2, SS negative signal
4
2:1 SS MUX control. See Table 1 for signal path settings.210KΩ internal pullup resistor.
H: AP SS signals are connected to Type-C position 1 signals.
L: AP SS signals are connected to Type-C position 2 signals
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
TUSB542
www.ti.com
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
Pin Functions (continued)
PIN
NAME
I/O
NO.
DESCRIPTION
Rx_Con_2+
9
Diff input
Differential input from Type-C Connector, Position 2, SS positive signal
Tx_Con_2+
12
Diff output
Differential output to Type-C Connector, Position 2, SS positive signal
Tx_Con_2-
11
Diff output
Differential output to Type-C Connector, Position 2, SS negative signal
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
–0.3
2.3
V
Differential I/O
–0.3
1.5
V
CMOS Inputs
–0.3
2.3
V
Junction temperature, TJ
65
150
°C
Storage temperature, Tstg
–65
105
°C
Supply voltage range, VCC
Voltage range at any input or output terminal
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
VCC
Main power supply
1.62
1.8
1.98
V
TA
Operating free-air temperature
–40
85
°C
C(AC)
AC coupling capacitor required for TX pins
75
200
nF
V(PSN)
AC coupling capacitor required for TX pins
100
mV
t(VCC_RAMP)
VCC supply ramp requirement
40
ms
R(pullup-down)
Pull-up/down resistor to control CNF pins
2.2
kΩ
0.2
UNIT
6.4 Thermal Information
TUSB542
THERMAL METRIC (1)
X2QFN (RWQ)
UNIT
18 PINS
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
Junction-to-case (top) thermal resistance
83.4
°C/W
52
RθJB
°C/W
Junction-to-board thermal resistance
49.1
°C/W
ψJT
Junction-to-top characterization parameter
0.6
°C/W
ψJB
Junction-to-board characterization parameter
49.1
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
5
TUSB542
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
www.ti.com
6.5 Electrical Characteristics, Power Supply Currents
over operating free-air temperature range (unless otherwise noted)
TYP
MAX
UNIT
ICC(ACTIVE Average active current; link in U0 with SuperSpeed data transmission; OS = 0.9 V; DE
)
= 0 dB
PARAMETER
MIN
100
130
mA
ICC(U2/U3)
Average current in U2/U3
1.3
mA
ICC(NC)
Average current with no connection
No SuperSpeed device is connected to TXP/TXN
0.3
mA
6.6 Electrical Characteristics, DC
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TRI-STATE CMOS INPUTS (CNFG_A1, CNFG_B1, CNFG_A2 and CNFG_B2)
VIH
High-level input voltage
VCC x 0.75
VIM
Mid-level input voltage
VIL
Mid-level input voltage
VF
Floating voltage
R(PU)
Internal pull-up resistance
R(PD)
Internal pull-down resistance
IIH
High-level input current
VIN = 1.98 V
IIL
Low-level input current
VIN = GND
Ilkg
External leakage current (from
application board + Application
Processor pin high impedance)
tolerance
VIN = GND or VIN = 1.98 V
V
VCC / 2
V
VCC x 0.25
VIN = High impedance
V
105
kΩ
105
kΩ
26
–26
–1
V
VCC / 2
µA
µA
1
µA
CMOS INPUT – SEL
VIH
High-level input voltage
VIL
Mid-level input voltage
IIH
High-level input current
VIN = 1.98 V
IIL
Low-level input current
VIN = GND
6
VCC x 0.7
Submit Documentation Feedback
–16
V
VCC x 0.3
V
5
µA
µA
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
TUSB542
www.ti.com
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
6.7 Electrical Characteristics, Dynamic
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Differential Receiver
V(RX-DC-CM)
RX DC common mode voltage
0
2
V
18
30
Ω
120
Ω
R(RX-CM-DC)
Receiver DC common mode
impedance
Measured at connector. Present when
SuperSpeed USB device detected on TX
pins.
R(RX-DIFF-DC)
Receiver DC differential impedance
Measured at connector. Present when
SuperSpeed USB device detected on TX
pins.
72
Z(RX-HIGH-IMP-DC-POS)
DC input CM input impedance when
termination is disabled.
Measured at connector. Present when no
SuperSpeed USB device detected on TX
pins or while VCC is ramping.
25
V(RX-LFPS-DET-DIFF-P-P)
LFPS Detect threshold. Below min is Measured at connector. Below min is
noise.
squelched.
V(RX-CM-AC-P)
Peak RX AC common mode voltage
C(RX-PARASITIC)
Rx Input capacitance for return loss
V(TX-DIFF-PP)
Differential peak-to-peak TX voltage
swing
OS Low, 0 dB DE
V(TX-DIFF- PP-LFPS)
LFPS differential voltage swing
OS Low, High
KΩ
0.1
0.3
V
Measured at package pin.
150
mV
At package pin to AC GND.
1.1
pF
Differential Transmitter
V(TX-DE-
Transmitter de-emphasis
RATIO)
0.9
OS High, 0 dB DE
V
1.1
0.8
V
1.2
V
Low
0
dB
Mid
3.5
dB
6
dB
High
V(TX-RCV-DETECT)
The amount of voltage change
allowed during Receiver Detection.
V(TX-DC-CM)
TX DC common mode voltage
The instantaneous allowed DC commonmode voltage at connector side of AC
coupling capacitor.
V(TX-IDLE-DIFF-AC-PP)
AC Electrical Idle differential peakto-peak output voltage
V(TX-IDLE-DIFF_DC)
0.6
V
0
2
V
At package pin.
0
10
mV
DC Electrical Idle differential output
voltage
At package pin. After low pass filter to
remove AC component.
0
10
nV
Absolute DC common mode voltage
between U1 and U0.
At package pin.
0.2
V
DELTA)
I(TX-SHORT)
TX short-circuit current limit
R(TX-DC)
TX DC common mode impedance
R(TX-DIFF-DC)
TX DC differential impedance
C(TX-PARASTIC)
TX input capacitance for return loss
T(jitter)
Total Residual Jitter (peak to peak)
V(TX-CM-DC-ACTIVE-IDLE-
At package pins
60
mA
18
30
Ω
72
120
Ω
1.25
pF
At package pins to AC GND
12
ps
6.8 Electrical Characteristics, AC
over operating free-air temperature range (unless otherwise noted)
PARAMETER
Xtalk
Differential Cross talk between TX and
RX Signal Pairs
TEST CONDITIONS
at 2.5 Ghz, TX to RX
MIN
TYP
MAX
UNIT
–45
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
dB
7
TUSB542
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
www.ti.com
6.9 Timing Requirements
MIN
NOM
MAX
UNIT
tIDLEEntry
Delay from U0 to electrical idle.
See Figure 2
6
ns
tIDLEExit_U1
U1 exit time: break in electrical idle to the
transmission of LFPS
See Figure 2
6
ns
tIDLEExit_U2U3
U2/U3 exit time: break in electrical idle to
transmission of LFPS
From the time when the far end
terminations detected for both ports
1
µs
tIDLEExit_DISC
U2/U3 exit time: break in electrical idle to
transmission of LFPS
From the time when the far end
terminations detected for both ports
2
µs
tDIFF-DLY
Differential propagation delay.
See Figure 1
tPWRUPACTIVE
Time when VCC reach 80% to device active
225
ps
30
ms
6.10 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
tTX-RISE-FALL
Transmitter rise/fall time (see Figure 3)
20% to 80% of differential output. At
device pins.
tRF-MISMATCH
Transmitter rise/fall mismatch
20% to 80% of differential output. At
device pins
TYP
MAX
80
UNIT
ps
2.3
ps
IN
tDIFF_DLY
tDIFF_DLY
OUT
Figure 1. Propagation Delay Timing
VEID_TH
IN+
Vcm
IN±
tidleExit
tidleEntry
OUT+
Vcm
OUT±
Figure 2. Electrical Idle Mode Exit and Entry Delay Timing
80%
20%
tr
tf
Figure 3. Output Rise and Fall Times
8
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
TUSB542
www.ti.com
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
6.11 Typical Characteristics
6.11.1 1-Inch Pre Channel
880 mV
5 Gbps
Figure 4. Input Signal: 1-Inch Input Trace
Figure 5. Output Signal: 12-Inches Output Trace
Figure 6. Output Signal: 16-Inches Output Trace
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
9
TUSB542
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
www.ti.com
6.11.2 24-Inch Pre Channel
880 mV
5 Gbps
Figure 7. Input Signal: 24-Inch Input Trace
Figure 8. Output Signal: 12-Inches Output Trace
10
Figure 9. Output Signal: 24-Inches Output Trace
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
TUSB542
www.ti.com
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
6.11.3 32-Inch Pre Channel
880 mV
5 Gbps
Figure 10. Input Signal: 32-Inch Input Trace
Figure 11. Output Signal: 12-Inches Output Trace
Figure 12. Output Signal: 24-Inches Output Trace
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
11
TUSB542
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
www.ti.com
7 Detailed Description
7.1 Overview
TUSB542 is an active re-driver for USB 3.1 Gen1 applications; it supports Type-C applications, as well as
switching between two Hosts and one device (or vice versa). The device is a dual channel USB 3.1 Gen1 (5
Gbps) re-driver supporting systems with USB Type-C connectors. The TUSB542 can be controlled through the
SEL, ideal to be controlled using an external Configuration Channel Logic or Power Delivery Controller to
properly mux the signals in Type-C applications.
When 5 Gbps Super Speed USB signals travel across a PCB or cable, signal integrity degrades due to loss and
inter-symbol interference. The TUSB542 recovers incoming data by applying equalization that compensates for
channel loss, and drives out signals with a high differential voltage. This extends the possible channel length,
and enables systems to pass USB 3.1 compliance.
The TUSB542 advanced state machine makes it transparent to hosts and devices. After power up, the TUSB542
periodically performs receiver detection on the TX pair. If it detects a SS USB receiver, the RX termination is
enabled, and the TUSB542 is ready to re-drive.
The TUSB542 operates over the industrial temperature range of –40ºC to 85ºC in the 2 mm x 2.4 mm X2QFN
package. The device ultra-low power architecture operates at a 1.8-V power supply. The automatic LFPS
DeEmphasis control further enables the system to be USB 3.0 compliant. An advanced state machine inside the
device monitors the USB SS traffic to perform enhanced power management to operate in no-connect, U2, U3
and active modes.
The USB Type-C connector is designed to allow insertion either upside-up or downside-up. The TUSB542
supports this feature by routing the AP signals to one of two output channels. The SEL input control defines the
way that the AP side signals is routed on the re-driver device side. Table 1 lists the active MUX configurations
based on the SEL input.
Table 1. USB SS MUX Control
SEL
Tx_Con_1
Rx_Con_1
Tx_Con_2
H
TX_AP
RX_AP
GND
L
(1)
GND
GND
(1)
TX_AP
Rx_Con_2
GND
(1)
RX_AP
Terminated through 50 K (minimum) resistors
Flexible Cable + Sub-Board
EQ_AP
Connector
AP
Main Board
Ch. 1
DE_CON
OS_CON
TUSB542
DE_AP
OS_AP
Ch. 2
EQ_CON
Type C Connector
The TUSB542 has flexible configurations to optimize the device using GPIO control pins. Figure 13 shows a
typical signal chain for mobile applications. Channel 1 is between Application Processor (AP) and TUSB542,
Channel 2 is between the TUSB542 redriver and the downstream device. The CNFG_A1 and CNFG_B1 pins
provide signal integrity configuration settings for channel 1, while CNFG_A2 and CNFG_B2 pins control the
operation of Channel 2. as depicted in Table 2.
Figure 13. Typical Channels
The receiver (RX) of the device provides the flexibility of 0, 3, 6 and 9 dB of equalization, while the transmitter
(TX) provides the options of 0, 3.5 or 6 dB De-Emphasis. The transmitter also supports output swing settings of
900 mV and 1.1 V.
12
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
TUSB542
www.ti.com
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
Table 2. Device Signal Conditioning Configuration Settings for TUSB542
Ch1 (AP-Redriver)
Ch2 (Redriver-Conn)
DE_AP (dB)
OS_AP (V)
EQ_AP (dB)
DE_Conn (dB)
OS_Conn (V)
EQ_Conn (dB)
Low
6
1.1
0
Float
3.5
1.1
0
High
3.5
0.9
0
Low
6
0.9
0
Float
3.5
1.1
6
0
High
3.5
0.9
6
1.1
0
Low
6
1.1
6
0
0.9
0
Float
6
0.9
6
6
1.1
6
High
6
1.1
9
CNFG_A1
CNFG_B1
Low
3.5
1.1
3
Low
Float
3.5
0.9
3
High
0
1.1
Low
0
Float
Float
High
CNFG_A2
CNFG_B2
Low
3
0.9
3
3.5
1.1
0
High
.35
0.9
Low
0
Float
High
Float
High
7.2 Functional Block Diagram
VDD18
TUSB542
RX Det
TX
TX_AP
TX_CON_2
DE_CON
OS_CON
EQ
LOS
LOS
EQ_AP
EQ
SEL_TX
RX_CON_2
EQ_CON
RX Det
TX_CON_1
TX
RX_AP
TX
DE_CON
OS_CON
LOS
RX Det
DE_AP
OS_AP
EQ
SEL_RX
CNFG_[Ax and Bx]
Configuration
Controller
SEL
EQ_AP
EQ_CON
DE_AP
DE_CON
OS_AP
OS_CON
SEL_TX
SEL_RX
RX_CON_1
EQ_CON
Advanced
State Machine
GND
LFPS
Controller
Copyright © 2016, Texas Instruments Incorporated
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
13
TUSB542
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
www.ti.com
7.3 Feature Description
7.3.1 Receiver Equalization
The purpose of receiver equalization is to compensate for channel insertion loss and inter-symbol interference in
the system before the input of the TUSB542 receiver. The receiver overcomes these losses by providing gain to
the high frequency components of the signals with respect to the low frequency components. The proper gain
setting should be selected to match the channel insertion loss before the receiver input of the TUSB542.
7.3.2 De-Emphasis Control and Output Swing
The output differential drivers of the TUSB542 provide selectable De-Emphasis and output swing in order to
achieve USB3.1 compliance, these options are configurable by means of 3-state control pins, and its available
settings are listed on the Table 2. The level of de-emphasis required in the system depends on the channel
length after the output of the re-driver. Figure 14 shows transmit bits with De-Emphasis.
Transition Bit
Consecutive Bits
Transition Bit
Consecutive Bits
DE = 0 dB
0.5 V
DE = ± 3.5 dB
DE = ± 6 dB
VTX-DIFF-PP
0V
DE = ± 6 dB
DE = ± 3.5 dB
DE = 0 dB
± 0.5 V
0ps
200ps
400ps
600ps
800ps
1000ps
1200ps
Figure 14. Transmitter Differential Voltage in Presence of De-Emphasis
7.3.3 Automatic LFPS Detection
The TUSB542 features an intelligent low frequency periodic signaling (LFPS) controller. The controller senses
the low frequency signals and automatically disables the driver de-emphasis, for full USB3.1 compliance.
7.3.4 Automatic Power Management
The TUSB542 deploys RX detect, LFPS signal detection and signal monitoring to implement an automatic power
management scheme to provide active, U2/U3 and disconnect modes. The automatic power management is
driven by an advanced state machine, which is implemented to manage the device such that the re-driver
operates smoothly in the links.
14
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
TUSB542
www.ti.com
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
7.4 Device Functional Modes
7.4.1 Disconnect Mode
The Disconnect mode is the lowest power state of the TUSB542. In this state, the TUSB542 periodically checks
for far-end receiver termination on both TX. Upon detection of the far-end receiver’s termination on both ports,
the TUSB542 will transition to U0 mode.
7.4.2 U Modes
7.4.2.1 U0 Mode
The U0 mode is the highest power state of the TUSB542. Anytime super-speed traffic is being received, the
TUSB542 remains in this mode.
7.4.2.2 U2/U3 Mode
Next to the disconnect mode, the U2/U3 mode is next lowest power state. While in this mode, the TUSB542
periodically performs far-end receiver detection.
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
15
TUSB542
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
www.ti.com
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
TUSB542 is a USB 3.1 G1 5 Gbps super speed 1:2 or 2:1 redriver de-multiplexer/multiplexer for RX and TX
differential pairs. The device is host/device side agnostic and can be used for host or device switching.
8.2 Typical Applications, USB Type-C Port SS MUX
TUSB542 is optimized for USB Type-C port. The device provide multiplexing to select appropriate super speed
RX and TX signal pairs resulting from Type-C plug orientation flipping. A companion USB PD or CC controller
provides the MUX selection. The device can be used part of UFP, DFP or DRP Type-C port. Figure 15 illustrates
typical Type-C applications.
Type-C
Connector
RX_AP
RX_CON_1
TX_CON_1
TUSB542
RX_CON_2
TX_AP
TX_CON_2
SEL
Host
Processor
(USB Device)
CC/PD
Controller
CC1
CC2
Copy right © 2016, Tex as Ins truments Inc orporated
Figure 15. USB Type-C Host (Device) Application
16
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
TUSB542
www.ti.com
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
Typical Applications, USB Type-C Port SS MUX (continued)
8.2.1 Design Requirements
For this design example, use the parameters shown in Table 3.
The configured value depends on the physical channel (PCB layout) Equalization 0, 3, 6, 9 dB (5 Gbps) The
configured value depends on the physical channel (PCB layout) De-Emphasis 0, –3.5, –6 dB The configured
value depends on the physical channel (PCB layout) Differential impedance 72 - 120 Ω.
Table 3. Design Parameters
PARAMETER
VDD18
AC Coupling Capacitors for SS signals
Pull-up/down resistor to control CNF pins
VALUE
COMMENT
1.8 V
100 nF
75-200nF range allowed.
TUSB542 biases both input and output common mode
voltage, hence ac-coupling caps as required on both
sides.
Note: TX pairs need to be biased at the connector.
4.7 kΩ
Input voltage range
100 mV to 1200 mV
Output voltage range
900 mV to 1100 mV
8.2.2 Detailed Design Procedure
Figure 16 shows an example implementation of a USB Type-C DRP port using TUSB542. Texas Instruments
TUSB322 is shown here as channel configuration (CC) controller. Note connections for CNFG pins of TUSB542
is example only. The connection of the CNFG pins is application dependent; refer to theTable 2, where the user
can find the available settings.
It is recommended to run an overall system signal integrity analysis, in order to estimate the channel loss and
configure the re-driver. It is also recommended to have pull-up and pull-down option on the configuration pins for
debug and testing purposes.
The signal integrity analysis must determine the following:
• Equalization (EQ) setting
• De-Emphasis (DE) setting
• Output Swing Amplitude (OS) setting
The equalization must be set based on the insertion loss in the pre-channel (channel before the TUSB542
device). The input voltage to the device is able to have a large range because of the receiver sensitivity and the
available EQ settings.
The De-emphasis setting must be set based on the length and characteristics of the post channel (channel after
the TUSB542 device).
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
17
TUSB542
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
www.ti.com
SCL
SDA
USB VBUS Switch
(Optional BC 1.2 Support for Legacy)
DM_OUT DM _IN
DP_OUT DP_IN
DM
DP
System VBUS
VOUT
VIN
EN
FAULT#
PS_EN
PS_FAULT#
VBUS
I2C I/O
1.8V or 3.3V
VDD_5V
900kO
INT_N / OUT3
TUSB322
ID
ID
SDA / OUT1
SDA
CC 2
CC1
ADDR
SCL / OUT2
SCL
RXP2
RXN2
VBUS _DET
DIR
USB3
and
PMIC
PORT
VBUS
GND
INT#
150µF
100nF
100µF
VDD
4.7kO 4.7kO 200kO 200kO
DM
DP
CC1
CC2
TXN1
TXP1
A12
B1
A11
B2
A10
B3
A9
B4
A8
B5
A7
B6
A6
B7
A5
B8
A4
B9
A3
B10
A2
B11
A1
B12
TXP 2
TXN 2
Type C
Receptacle
VCONN
Bulk Cap
RXN1
RXP1
VDD18
VDD18
SEL
100nF
100nF
SSTXP
SSTXN
100nF
VDD18
4.7kO
4.7kO
RX_CON_2+
RX_CON_2–
RX_AP+
RX_AP–
TX_AP+
TX_AP–
CNFG_A1
CNFG_B1
CNFG_A2
CNFG_B2
TUSB542
100nF
100 nF
TX_CON_2+
TX_CON_2–
RXP2
RXN2
TXP2
TXN2
100nF
100nF
TX_CON_1+
TX_CON_1–
RX_CON_1+
RX_CON_1–
TXN1
TXP1
RXN1 100nF
RXP1
GND
SSRXP
SSRXN
VCC
47kO
Note
Connection Flip
for CC1 and CC2
Copyright © 2016, Texas Instruments Incorporated
Figure 16. USB-C DRP Implementation Using TUSB542 and TUSB322/TUSB321
18
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
TUSB542
www.ti.com
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
8.2.3 Application Curves
1-ft SMA-SMP Cable
1-ft SMP-SMA Cable
TUSB542
MP1800 BERT 5Gbps
880mVpp PRBS7
Intput PCB Trace
Output PCB Trace
1-ft SMP-SMP Cable
DCAX35GHz BWPTB
1-ft SMP-SMP Cable
Figure 17. Measurement Setup
Figure 18. Input Signal: 12 Inch Input Trace
(Eye Diagram at the Re-driver input)
Figure 20. Input Signal: 24 Inch Input Trace
(Eye Diagram at the Re-driver input)
Figure 19. Output Signal: 12 Inch Output Trace
(Eye Diagram at the DCAX)
Figure 21. Output Signal: 24 Inch Output Trace
(Eye Diagram at the DCAX)
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
19
TUSB542
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
www.ti.com
8.2.4 Typical Application: Switching USB SS Host or Device Ports
TUSB542, being USB SS mux/demux, can be used for host or device switching. Figure 22 illustrates how the
device can be used:
RX_CON_1
TX_CON_1
RX_AP
USB
Device
(Host)
USB Host 1
(Device 1)
TUSB542
TX_AP
RX_CON_2
TX_CON_2
USB Host 2
(Device 2)
SEL
Copyright © 2016, Texas Instruments Incorporated
Figure 22. Muxing Two Host (Device) Port
8.2.4.1 Design Requirements
For this design example, use the design parameters shown in Table 4.
The configured value depends on the physical channel (PCB layout) Equalization 0, 3, 6, 9 dB (5 Gbps) The
configured value depends on the physical channel (PCB layout) De-Emphasis 0, –3.5, –6 dB The configured
value depends on the physical channel (PCB layout) Differential impedance 72 - 120 Ω
Table 4. Design Parameters
PARAMETER
VDD18
VALUE
COMMENT
1.8 V
AC Coupling Capacitors for SS signals
100 nF
Pull-up/down resistor to control CNF pins
4.7 kΩ
Input voltage range
100 mV to 1200 mV
Output voltage range
900 mV to 1100 mV
75-200nF range allowed.
TUSB542 biases both input and output common mode
voltage, hence ac-coupling caps as required on both
sides.
Note: TX pairs need to be biased at the connector.
8.2.4.2 Detailed Design Procedure
Figure 16 shows an example implementation of a USB Type-C DRP port using TUSB542. Texas Instruments
TUSB322 is shown here as channel configuration (CC) controller. Note connections for CNFG pins of TUSB542
is example only. The connection of the CNFG pins is application dependent; refer to the Table 2, where the user
can find the available settings.
It is recommended to run an overall system signal integrity analysis, in order to estimate the channel loss and
configure the re-driver. It is also recommended to have pull-up and pull-down option on the configuration pins for
debug and testing purposes.
The signal integrity analysis must determine the following:
• Equalization (EQ) setting
• De-Emphasis (DE) setting
• Output Swing Amplitude (OS) setting
20
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
TUSB542
www.ti.com
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
The equalization must be set based on the insertion loss in the pre-channel (channel before the TUSB542
device). The input voltage to the device is able to have a large range because of the receiver sensitivity and the
available EQ settings.
The De-emphasis setting must be set based on the length and characteristics of the post channel (channel after
the TUSB542 device).
The output swing setting can also be configured based on the amplitude needed to pass the compliance test.
This setting is also based on the length of interconnect or cable the TUSB542 is driving.
Refer to the Table 2 for a detailed description on how to configure the CONFIG_A1/A2 and CONFIG_B1/A2
terminals, in order to achieve the desired EQ, OS and DE settings.
8.2.4.3 Application Curves
For this design example, use the application curves shown in Application Curves.
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
21
TUSB542
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
www.ti.com
9 Power Supply Recommendations
TUSB542 has internal power on reset circuit to provide clean reset for state machine provided supply ramp and
level recommendations are met.
10 Layout
10.1 Layout Guidelines
•
•
•
•
•
•
•
•
•
•
•
RXP/N and TXP/N pairs should be routed with controlled 90-Ohm differential impedance (±15%).
Keep away from other high speed signals.
Intra-pair routing should be kept to within 2 mils.
Length matching should be near the location of mismatch.
Each pair should be separated at least by 3 times the signal trace width.
The use of bends in differential traces should be kept to a minimum. When bends are used, the number of left
and right bends should be as equal as possible and the angle of the bend should be ≥ 135 degrees. This will
minimize any length mismatch causes by the bends and therefore minimize the impact bends have on EMI.
Route all differential pairs on the same of layer.
The number of VIAS should be kept to a minimum. It is recommended to keep the VIAS count to 2 or less.
Keep traces on layers adjacent to ground plane.
Do NOT route differential pairs over any plane split.
Adding Test points will cause impedance discontinuity, and therefore; negatively impacts signal performance.
If test points are used, they should be placed in series and symmetrically. They must not be placed in a
manner that causes a stub on the differential pair.
10.2 Layout Example
Figure 23. Example Layout
22
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
TUSB542
www.ti.com
SLLSER3E – DECEMBER 2015 – REVISED JUNE 2017
11 Device and Documentation Support
11.1 Documentation Support
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: TUSB542
23
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TUSB542RWQR
ACTIVE
X2QFN
RWQ
18
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
54
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
