UCC2808AQDR-2Q1

UCC2808A-1Q1 UCC2808A-2Q1 www.ti.com SGLS183B – AUGUST 2003 – REVISED JULY 2012 Low Power Current Mode Push-Pull PWM Check for Samples: UCC2808A-1Q1 , UCC2808A-2Q1 FEATURES 1 • • • • • • • • • • • Qualified for Automotive Applications ESD Protection Exceeds 1500 V Per MIL-STD883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Dual Output Drive Stages in Push-Pull Configuration Current Sense Discharge Transistor to Improve Dynamic Response 130-μA Typical Starting Current 1-mA Typical Run Current Operation to 1 MHz Internal Soft Start On-Chip Error Amplifier With 2-MHz Gain Bandwidth Product On Chip VDD Clamping Output Drive Stages Capable of 500-mA PeakSource Current, 1-A Peak-Sink Current D PACKAGE (TOP VIEW) COMP FB CS RC 1 8 2 7 3 6 4 5 VDD OUTA OUTB GND PW PACKAGE (TOP VIEW) OUTA VDD COMP FB 1 2 3 4 8 7 6 5 OUTB GND RC CS DESCRIPTION The UCC2808A-xQ1 is a family of BiCMOS push-pull, high-speed, low-power, pulse-width modulators. The UCC2808A-xQ1 contains all of the control and drive circuitry required for off-line or DC-to-DC fixed frequency current-mode switching power supplies with minimal external parts count. The UCC2808A-xQ1 dual output drive stages are arranged in a push-pull configuration. Both outputs switch at half the oscillator frequency using a toggle flip-flop. The dead time between the two outputs is typically 60 ns to 200 ns depending on the values of the timing capacitor and resistors, thus limiting each output stage duty cycle to less than 50%. The UCC2808A-xQ1 family offers a variety of package options and choice of undervoltage lockout levels. The family has UVLO thresholds and hysteresis options for off-line and battery powered systems. Thresholds are shown in the ordering information table. The UCC2808A-xQ1 is an enhanced version of the UCC2808 family. The significant difference is that the A versions feature an internal discharge transistor from the CS pin to ground, which is activated each clock cycle during the oscillator dead time. The feature discharges any filter capacitance on the CS pin during each cycle and helps minimize filter capacitor values and current sense delay. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2012, Texas Instruments Incorporated UCC2808A-1Q1 UCC2808A-2Q1 SGLS183B – AUGUST 2003 – REVISED JULY 2012 www.ti.com ORDERING INFORMATION (1) TA UVLO OPTION –40°C to 125°C 12.5 V/8.3 V –40°C to 125°C 4.3 V/4.1 V (1) (2) (3) PACKAGE (2) ORDERABLE PART NUMBER TOP-SIDE MARKING SOIC (D) Tape and reel UCC2808AQDR-1Q1 2D08-1 TSSOP (PW) Tape and reel UCC2808AQPWR−1Q1 (3) 2808A1 SOIC (D) Tape and reel UCC2808AQDR-2Q1 2D08-2 TSSOP (PW) Tape and reel UCC2808AQPWR−2Q1 (3) 2808A2 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. Product Preview. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. Block Diagram OVERCURRENT COMPARATOR FB COMP CS 2 1 3 22 k Ω PEAK CURRENT COMPARATOR 8 VDD 7 OUTA 6 OUTB 5 GND 14 V 0.75 V 2.0 V 0.5 V 2.2 V VDD OK OSCILLATOR S Q PWM LATCH R 1.2R VDD−1 V Q S S Q Q R R T Q PWM COMPARATOR VDD 0.5 V R SOFT START VOLTAGE REFERENCE SLOPE = 1 V/ms 4 RC UDG-00097 A. 2 Pinout shown is for SOIC package. TSSOP pinout is different. Copyright © 2003–2012, Texas Instruments Incorporated UCC2808A-1Q1 UCC2808A-2Q1 www.ti.com SGLS183B – AUGUST 2003 – REVISED JULY 2012 ABSOLUTE MAXIMUM RATINGS (1) (2) over operating free-air temperature range (unless otherwise noted) VALUE UNIT Supply voltage (IDD ≤ 10 mA) 15 V Supply current 20 mA –0.5 A 1 A OUTA/OUTB source current (peak) OUTA/OUTB sink current (peak) Analog inputs (FB, CS) –0.3 to VDD 0.3, not to exceed 6 V Power dissipation at TA = 25°C (D package) 650 mW Power dissipation at TA = 25°C (PW package) 400 mW Tstg Storage temperature –65 to 150 °C TJ Junction temperature –55 to 150 °C 300 °C Lead temperature (soldering, 10 sec.) (1) (2) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Currents are positive into, negative out of the specified terminal. Consult the Packaging Section of the Power Supply Control Data Book (TI Literature Number SLUD003) for thermal limitations and considerations of packages. ELECTRICAL CHARACTERISTICS TA = –40°C to 125°C for the UCC2808A-xQ1, VDD = 10 V (1), 1-μF capacitor from VDD to GND, R = 22 kΩ, C = 330 pF TA = TJ, (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 175 194 213 kHz 0.44 0.5 0.56 V/V 1.95 2 2.05 V 1 µA Oscillator Section Oscillator frequency (2) Oscillator amplitude/VDD Error Amplifier Section Input voltage COMP = 2 V Input bias current –1 Open loop voltage gain 60 80 dB 0.3 2.5 mA –0.2 –0.5 mA 48 49 COMP sink current FB = 2.2 V, COMP = 1 V COMP source current FB = 1.3 V, COMP = 3.5 V PWM Section Maximum duty cycle Measured at OUTA or OUTB Minimum duty cycle COMP = 0 V 50 % 0 % Current Sense Section (3) Gain Maximum input signal COMP = 5 V (4) CS to output delay COMP = 3.5 V, CS from 0 mV to 600 mV CS source current 1.9 2.2 2.5 V/V 0.45 0.5 0.55 V 100 200 ns –200 CS = 0.5 V, RC = 5.5 V (5) CS sink current Over current threshold COMP to CS offset CS = 0 V nA 4 10 mA 0.65 0.75 0.85 V 0.35 0.8 1.2 V 0.5 1.1 V Output Section OUT low level (1) (2) I = 100 mA For UCC2808A−1Q1, set VDD above the start threshold before setting at 10 V. Measured at RC. Signal amplitude tracks VDD. DVCOMP A= (3) (4) (5) DVCS , 0 ≤ VCS ≤ 0.4 V. Gain is defined by: Parameter measured at trip point of latch with FB at 0 V. The internal current sink on the CS pin is designed to discharge an external filter capacitor. It is not intended to be a DC sink path. Copyright © 2003–2012, Texas Instruments Incorporated 3 UCC2808A-1Q1 UCC2808A-2Q1 SGLS183B – AUGUST 2003 – REVISED JULY 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) TA = –40°C to 125°C for the UCC2808A-xQ1, VDD = 10 V(1), 1-μF capacitor from VDD to GND, R = 22 kΩ, C = 330 pF TA = TJ, (unless otherwise noted) TYP MAX OUT high level PARAMETER I = −50 mA, VDD – OUT TEST CONDITIONS MIN 0.5 1 UNIT V Rise time CL = 1 nF 25 60 ns Fall time CL = 1 nF 25 60 ns 11.5 12.5 13.5 V UCCx808A−2 4.1 4.3 4.5 V UCCx808A−1 7.6 8.3 9 V UCCx808A−2 3.9 4.1 4.3 V UCCx808A−1 3.5 4.2 5.1 V UCCx808A−2 0.1 0.2 0.3 V FB = 1.8 V, rise from 0.5 V to 4 V 3.5 20 ms Startup current VDD < start threshold 130 260 µA Operating supply current FB = 0 V, CS = 0 V (6) (1) 1 2 mA VDD zener shunt voltage IDD = 10 mA (7) 14 15 V Undervoltage Lockout Section Start threshold Minimum operating voltage after start Hysteresis UCCx808A−1 (1) Soft Start Section COMP rise time Overall Section (6) (7) 13 Does not include current in the external oscillator network. Start threshold and zener shunt threshold track one another. PIN ASSIGNMENTS COMP: COMP is the output of the error amplifier and the input of the PWM comparator. The error amplifier in the UCC2808A-xQ1 is a true low-output impedance, 2-MHz operational amplifier. As such, the COMP pin can both source and sink current. However, the error amplifier is internally current limited, so that zero duty cycle can be externally forced by pulling COMP to GND. The UCC2808A-xQ1 family features built-in full-cycle soft start. Soft start is implemented as a clamp on the maximum COMP voltage. CS: The input to the PWM, peak current, and overcurrent comparators. The overcurrent comparator is only intended for fault sensing. Exceeding the overcurrent threshold will cause a soft start cycle. An internal MOSFET discharges the current sense filter capacitor to improve dynamic performance of the power converter. FB: The inverting input to the error amplifier. For best stability, keep FB lead length as short as possible and FB stray capacitance as small as possible. GND: Reference ground and power ground for all functions. Due to high currents, and high frequency operation of the UCC2808A-xQ1, a low impedance circuit board ground plane is highly recommended. OUTA and OUTB: Alternating high current output stages. Both stages are capable of driving the gate of a power MOSFET. Each stage is capable of 500-mA peak-source current, and 1-A peak-sink current. The output stages switch at half the oscillator frequency, in a push-pull configuration. When the voltage on the RC pin is rising, one of the two outputs is high, but during fall time, both outputs are off. This dead time between the two outputs, along with a slower output rise time than fall time, insures that the two outputs can not be on at the same time. This dead time is typically 60 ns to 200 ns and depends upon the values of the timing capacitor and resistor. The high-current output drivers consist of MOSFET output devices, which switch from VDD to GND. Each output stage also provides a very low impedance to overshoot and undershoot. This means that in many cases, external schottky-clamp diodes are not required. RC: The oscillator programming pin. The oscillator of the UCC2808Ax-Q1 tracks VDD and GND internally, so that variations in power supply rails minimally affect frequency stability. shows the oscillator block diagram. 4 Copyright © 2003–2012, Texas Instruments Incorporated UCC2808A-1Q1 UCC2808A-2Q1 www.ti.com SGLS183B – AUGUST 2003 – REVISED JULY 2012 Only two components are required to program the oscillator: a resistor (tied to the VDD and RC), and a capacitor (tied to the RC and GND). The approximate oscillator frequency is determined by the simple formula: 1.41 fOSCILLATOR = RC , where frequency is in Hz, resistance in Ohms, and capacitance in Farads. The recommended range of timing resistors is between 10 kΩ and 200 kΩ and range of timing capacitors is between 100 pF and 1000 pF. Timing resistors less than 10 kΩ should be avoided. For best performance, keep the timing capacitor lead to GND as short as possible, the timing resistor lead from VDD as short as possible, and the leads between timing components and RC as short as possible. Separate ground and VDD traces to the external timing network are encouraged. RC 4 FREQUENCY = VDD 2 S R 1.41 RC (APPROXIMATE FREQUENCY) Q OSCILLATOR OUTPUT 0.2 V UDG-00095 A. The oscillator generates a sawtooth waveform on RC. During the RC rise time, the output stages alternate on time, but both stages are off during the RC fall time. The output stages switch a 1/2 the oscillator frequency, with ensured duty cycle of < 50% for both outputs. Figure 1. Block Diagram for Oscillator VDD: The power input connection for this device. Although quiescent VDD current is very low, total supply current will be higher, depending on OUTA and OUTB current, and the programmed oscillator frequency. Total VDD current is the sum of quiescent VDD current and the average OUT current. Knowing the operating frequency and the MOSFET gate charge (Qg), average OUT current can be calculated from: IOUT = Qg × F, where F is frequency. To prevent noise problems, bypass VDD to GND with a ceramic capacitor as close to the chip as possible along with an electrolytic capacitor. A 1-μF decoupling capacitor is recommended. Copyright © 2003–2012, Texas Instruments Incorporated 5 UCC2808A-1Q1 UCC2808A-2Q1 SGLS183B – AUGUST 2003 – REVISED JULY 2012 www.ti.com APPLICATION INFORMATION A 200-kHz push-pull application circuit with a full-wave rectifier is shown in Figure 2. The output, VO, provides 5 V at 50-W maximum and is electrically isolated from the input. Since the UCC2808A-xQ1 is a peak-current-mode controller the 2N2907 emitter following amplifier (buffers the CT waveform) provides slope compensation which is necessary for duty ratios greater than 50%. Capacitor decoupling is very important with a single ground IC controller, and 1 μF is suggested as close to the IC as possible. The controller supply is a series RC for start-up, paralleled with a bias winding on the output inductor used in steady state operation. Isolation is provided by an optocoupler with regulation done on the secondary side using the TL431 adjustable precision shunt regulator. Small signal compensation with tight voltage regulation is achieved using this part on the secondary side. Many choices exist for the output inductor depending on cost, volume, and mechanical strength. Several design options are iron powder, molypermalloy (MPP), or a ferrite core with an air gap as shown here. The main power transformer has a Magnetics Inc. ER28 size core made of P material for efficient operation at this frequency and temperature. The input voltage may range from 36-V DC to 72-V DC. 6 Copyright © 2003–2012, Texas Instruments Incorporated − VIN 36 V TO 72 V + 10 µF 4700 µF Copyright © 2003–2012, Texas Instruments Incorporated 2.80 kΩ 0.1 µF 0.47 µF 86.6 kΩ 330 pF 2 kΩ 2.2 Ω 51 kΩ 1/4 W CURRENT SENSE 0.2 Ω 2K12907 IRF640 BYV 28−200 1000 pF 6 2 CS 3 UCC2808AD−1 7 2.2 Ω 432 Ω 1 mH 10 Ω 12 0.1 µF 2 1 6 H11A1 U3 3 240 Ω 0.01 µF 1 kV EF25 7µH 5 4 DF02SGICT NS2 NS1 32CTQ030 0.1 µF 680 µF 3 2 1 TL431 470 pF 4700 pF 20 kΩ COMP LOOP A LOOP B 0.01 µF 19.1 kΩ 19.1 kΩ 200 Ω − VO 5 V 50 W + www.ti.com 330 pF 20 kΩ 4.99 kΩ RC PRIMARY GROUND 4.99 kΩ RC 4 5 OUTA OUTB GND 62 Ω COMP FB 1 8 VDD 62 Ω 20 kΩ BYV 28−200 IRF640 1000 pF NP1 NP2 ER28 8:2 UCC2808A-1Q1 UCC2808A-2Q1 SGLS183B – AUGUST 2003 – REVISED JULY 2012 UDG-00096 Figure 2. Typical Application Diagram: 48-V In, 5-V, 50-W Output 7 UCC2808A-1Q1 UCC2808A-2Q1 SGLS183B – AUGUST 2003 – REVISED JULY 2012 www.ti.com TYPICAL CHARACTERISTICS OSCILLATOR FREQUENCY vs EXTERNAL RC VALUES IDD vs OSCILLATOR FREQUENCY 14 1000 C = 100 pF 12 VDD = 10 V, t = 25 C C = 1000 pF 10 IDD with 1 nF load 10 C = 330 pF 100 8 IDD -mA Frequency - kHz C = 220 pF 6 C = 820 pF 4 C = 560 pF IDD without load 2 1 0 50 100 150 0 200 0 200 400 600 800 1000 1200 RT − Timing Resistor − k Ω Oscillator Frequency − kHz Figure 3. Figure 4. COMP TO CS OFFSET vs TEMPERATURE ERROR AMPLIFIER GAIN AND PHASE RESPONSE vs FREQUENCY 1.2 90 180 80 160 70 140 0.8 Gain dB COMP - CS Offset - V 1.0 0.6 120 60 Phase 50 100 40 80 30 60 0.4 40 20 0.2 10 20 Gain 0 −55 −35 −15 5 25 45 65 85 105 0 0 125 1 100 Temperature - °C 10000 1000000 Frequency − Hz Figure 5. Figure 6. OUTPUT DEAD TIME vs EXTERNAL RC VALUES DEAD TIME vs TEMPERATURE 400 300 C = 1000 pF VDD = 5 V C = 560 pF C = 820 pF 200 Dead Time - ns 300 Dead Time - ns Phase Margin - Degrees 350 250 C = 330 pF C = 220 pF 150 VDD = 7.5 V 250 200 VDD = 10 V 150 100 100 50 0 C = 100 pF 50 −100 50 100 150 200 250 −50 0 50 100 150 Temperature - °C RT − Timing Resistor − k Ω Figure 7. 8 Figure 8. Copyright © 2003–2012, Texas Instruments Incorporated UCC2808A-1Q1 UCC2808A-2Q1 www.ti.com SGLS183B – AUGUST 2003 – REVISED JULY 2012 TYPICAL CHARACTERISTICS (continued) RC RDS(on) vs TEMPERATURE CS RDS(on) vs TEMPERATURE 300 120 250 100 VDD = 5 V VDD = 5 V 80 VDD = 7.5 V Ohms Ohms 200 150 60 VDD = 7.5 V 100 40 VDD = 10 V VDD = 10 V 50 20 0 −100 0 −50 0 50 100 Temperature - °C Figure 9. Copyright © 2003–2012, Texas Instruments Incorporated 150 −100 −50 0 50 100 150 Temperature - °C Figure 10. 9 UCC2808A-1Q1 UCC2808A-2Q1 SGLS183B – AUGUST 2003 – REVISED JULY 2012 www.ti.com REVISION HISTORY Changes from Revision A (April, 2008) to Revision B • 10 Page Changed top-side marking for SOIC (D) package from UCC2808AD-1Q1 to 2D08-1 and UCC2808AD-2Q1 to 2D082. ........................................................................................................................................................................................... 2 Copyright © 2003–2012, Texas Instruments Incorporated PACKAGE OPTION ADDENDUM www.ti.com 23-Apr-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) UCC2808AQDR-1G4Q1 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2D08-1 A-1Q1 UCC2808AQDR-1Q1 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2D08-1 UCC2808AQDR-2Q1 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2D08-2 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of