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UCC2808DTR-1

UCC2808DTR-1

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC8_150MIL

  • 描述:

    IC REG CTRLR ISO PWM CM 8-SOIC

  • 数据手册
  • 价格&库存
UCC2808DTR-1 数据手册
Sample & Buy Product Folder Support & Community Tools & Software Technical Documents UCC2808-1, UCC2808-2, UCC3808-1, UCC3808-2 SLUS168E – APR 1999 – REVISED AUGUST 2015 UCCx808-x Low Power Current Mode Push-Pull PWM 1 Features 3 Description • The UCCx808-x is a family of BiCMOS push-pull, high-speed, low-power, pulse-width modulators. The UCCx808 contains all of the control and drive circuitry required for offline or DC-to-DC fixed frequency current-mode switching power supplies with minimal external parts count. 1 • • • • • • • Dual Output Drive Stages in Push-Pull Configuration 130-μA Typical Starting Current 1-mA Typical Run Current Operation to 1-MHz Internal Soft-Start On-Chip Error Amplifier With 2-MHz Gain Bandwidth Product On-Chip VDD Clamping Output Drive Stages Capable Of 500-mA Peak Source Current, 1-A Peak Sink Current The UCCx808-x dual output drive stages are arranged in a push-pull configuration. Both outputs switch at half the oscillator frequency using a toggle flip-flop. The dead time between the two outputs is typically 60 ns to 200 ns depending on the values of the timing capacitor and resistors, thus limiting each output stage duty cycle to less than 50%. Device Information(1) 2 Applications • • • • PART NUMBER Server and Desktop Power Supplies Telecom Power Supplies DC-DC Converters Switched-Mode Power Supplies PACKAGE UCC2808-1 UCC2808-2 UCC3808-1 UCC3808-2 BODY SIZE (NOM) SOIC (8) 4.90 mm × 3.91 mm PDIP (8) 9.81 mm × 6.35 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic ER28 8:2 32CTQ030 NP2 NS1 NP1 NS2 VO 5 V 50 W + EF25 7µH 680 µF 0.01 µF + – LOOP B VIN 36 V TO 72 V 4700 µF 0.47 µF 1000 pF – BYV 28–200 62 Ω 62 Ω BYV 28–200 1000 pF LOOP A COMP 51 kΩ 1/4 W 19.1 kΩ IRF640 IRF640 4700 pF 20 kΩ 12 10 Ω 2.2 Ω 470 pF DF02SGICT 2.2 Ω 1 mH 3 0.1 µF 10 µF 200 Ω 0.1 µF 1 TL431 2 19.1 kΩ 2 kΩ 0.2 Ω 330 pF 20 kΩ VDD 8 OUTA OUTB GND 7 6 PRIMARY GROUND 5 UCC3808D-1 1 2 COMP FB 3 CS 4 240 Ω RC RC 4.99 kΩ 2.80 kΩ CURRENT 86.6 kΩ SENSE 4.99 kΩ 2N2907 4 H11A1 U3 3 5 2 6 1 20 kΩ 330 pF 432 Ω 0.1 µF 0.01 µF 1 kV 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. UCC2808-1, UCC2808-2, UCC3808-1, UCC3808-2 SLUS168E – APR 1999 – REVISED AUGUST 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 4 4 4 4 6 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description .............................................. 7 7.1 7.2 7.3 7.4 Overview ................................................................... Functional Block Diagram ......................................... Feature Description................................................... Device Functional Modes.......................................... 7 7 8 9 8 Application and Implementation ........................ 10 8.1 Application Information............................................ 10 8.2 Typical Application ................................................. 10 9 Power Supply Recommendations...................... 11 10 Layout................................................................... 12 10.1 Layout Guidelines ................................................. 12 10.2 Layout Example .................................................... 12 11 Device and Documentation Support ................. 13 11.1 11.2 11.3 11.4 11.5 11.6 Related Links ........................................................ Documentation Support ....................................... Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 13 13 13 13 13 13 12 Mechanical, Packaging, and Orderable Information ........................................................... 13 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision D (August 2002) to Revision E Page • Removed references to the TSSOP packaging .................................................................................................................... 1 • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ................................................................................................ 1 2 Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: UCC2808-1 UCC2808-2 UCC3808-1 UCC3808-2 UCC2808-1, UCC2808-2, UCC3808-1, UCC3808-2 www.ti.com SLUS168E – APR 1999 – REVISED AUGUST 2015 5 Pin Configuration and Functions D Package 8-Pin SOIC Top View COMP FB CS RC 1 8 2 7 3 6 4 5 VDD OUTA OUTB GND P Package 8-Pin PDIP Top View OUTA VDD COMP FB 1 2 3 4 8 7 6 5 OUTB GND RC CS Pin Functions PIN I/O DESCRIPTION NAME NO. COMP 1 I/O CS 3 I Input to the PWM, peak current, and overcurrent comparators. FB 2 I Inverting input to the error amplifier. GND 5 — Reference ground and power ground for all functions. OUTA 7 O Alternating high current output stage. OUTB 6 O Alternating high current output stage. RC 4 I Oscillator programming pin. VDD 8 — Output of the error amplifier and the input of the PWM comparator. Power input connection for this device. Copyright © 1999–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: UCC2808-1 UCC2808-2 UCC3808-1 UCC3808-2 3 UCC2808-1, UCC2808-2, UCC3808-1, UCC3808-2 SLUS168E – APR 1999 – REVISED AUGUST 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN Supply voltage (IDD ≤ 10 mA) Supply current OUTA/OUTB source current (peak) (2) (2) 20 mA A A Analog inputs (FB, CS) – 0.3 V to VDD+0.3 V 6 V Power dissipation at TA = 25 ° C (N Package) 1 W Power dissipation at T A = 25 ° C (D Package) 650 mW 400 mW 150 °C 300 °C 150 °C Junction temperature –55 Lead temperature (soldering, 10 sec.) (1) V 1.0 Power dissipation at T A = 25 ° C (PW Package) Tstg UNIT 15 –0.5 OUTA/OUTB sink current (peak) (2) TJ MAX Storage temperature –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the Power Supply Control Data Book (SLUD003) for thermal limitations and considerations of packages. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2500 Charged-device model (CDM), per JEDEC specification JESD22C101 (2) ±1500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) VDD Supply Voltage TJ Junction Temperature MIN MAX UCCx808-1 13 14 UCCx808-2 5 14 UCC2808-x –40 85 UCC3808-x 0 70 UNIT V °C 6.4 Electrical Characteristics TA = 0°C to 70°C for the UCC3808-x, –40°C to 85°C for the UCC2808-x and –55°C to 125°C for the UCC1808-x, VDD = 10 V (1), 1-μF capacitor from VDD to GND, R = 22 kΩ , C = 330 pF, TA = TJ , (unless otherwise specified) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Oscillator frequency 175 Oscillator amplitude/VDD (2) 0.44 194 213 kHz 0.5 0.56 V/V 1.95 2 2.05 OSCILLATOR SECTION ERROR AMPLIFIER SECTION Input voltage COMP = 2 V (1) (2) 4 V –1 Open-loop voltage gain 60 80 dB 0.3 2.5 mA COMP sink current FB = 2.2 V, COMP = 1 V 1 μA Input bias current Does not include current in the external oscillator network. Measured at RC. Signal amplitude tracks VDD. Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: UCC2808-1 UCC2808-2 UCC3808-1 UCC3808-2 UCC2808-1, UCC2808-2, UCC3808-1, UCC3808-2 www.ti.com SLUS168E – APR 1999 – REVISED AUGUST 2015 Electrical Characteristics (continued) TA = 0°C to 70°C for the UCC3808-x, –40°C to 85°C for the UCC2808-x and –55°C to 125°C for the UCC1808-x, VDD = 10 V(1), 1-μF capacitor from VDD to GND, R = 22 kΩ , C = 330 pF, TA = TJ , (unless otherwise specified) PARAMETER TEST CONDITIONS COMP source current FB = 1.3 V, COMP = 3.5 V MIN TYP –0.25 –0.5 48% 49% MAX UNIT mA PWM SECTION Maximum duty cycle Measured at OUTA or OUTB Minimum duty cycle COMP = 0 V 50% 0% CURRENT SENSE SECTION Gain (3) (4) Maximum input signal COMP = 5 V CS to output delay COMP = 3.5 V, CS from 0 to 600 mV CS source current 1.9 2.2 2.5 V/V 0.45 0.5 0.55 V 100 200 ns 0.7 0.75 0.8 V 0.35 0.8 1.2 V 1 V –200 Over current threshold COMP to CS offset CS = 0 V nA OUTPUT SECTION OUT low level I = 100 mA 0.5 OUT high level I = – 50 mA, VDD – OUT 0.5 1 V Rise time CL = 1 nF 25 60 ns Fall time CL = 1 nF 25 60 ns UNDERVOLTAGE LOCKOUT SECTION UCCx808-1 Start threshold Minimum operating voltage after start Hysteresis (1) 11.5 12.5 13.5 UCCx808-2 4.1 4.3 4.5 UCCx808-1 7.6 8.3 9 UCCx808-2 3.9 4.1 4.3 UCCx808-1 3.5 4.2 5.1 UCCx808-2 0.1 0.2 0.3 FB = 1.8 V, rise from 0.5 V to 4 V 3.5 20 ms VDD < start threshold 130 260 µA 1 2 mA 14 15 V V V V SOFT-START SECTION COMP rise time OVERALL SECTION Start-up current Operating supply current FB = 0 V, CS = 0 V VDD zener shunt voltage IDD = 10 mA A= (3) (4) (5) (6) (5) (1) (6) 13 DVCOMP ,0 £ VCS £ 0.4V DVCS 0 v VCS v 0.4 V Gain is defined by: Parameter measured at trip point of latch with FB at 0 V. For UCCx808 – 1, set VDD above the start threshold before setting at 10 V Start threshold and Zener shunt threshold track one another. Copyright © 1999–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: UCC2808-1 UCC2808-2 UCC3808-1 UCC3808-2 5 UCC2808-1, UCC2808-2, UCC3808-1, UCC3808-2 SLUS168E – APR 1999 – REVISED AUGUST 2015 www.ti.com 6.5 Typical Characteristics 14 1000 VDD = 10 V, T = 25°C 12 CT=100pF 10 IDD With 1 nF Load 100 IDD – mA Frequency – kHz CT=330pF CT=220pF 10 CT=1000pF 8 6 4 CT=820pF IDD Without Load CT=560pF 2 0 0 0 50 100 150 200 250 0 200 400 600 800 1000 1200 Oscillator Frequency – kHz RT – Timing Resistor – kΩ Figure 2. IDD vs Oscillator Frequency Figure 1. Frequency vs Timing Resistor 1.2 COMP – CS Offset – V 1.0 0.8 0.6 0.4 0.2 0 –55 –35 –15 5 25 45 65 85 105 125 Temperature – °C Figure 3. CS Offset vs Temperature 6 Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: UCC2808-1 UCC2808-2 UCC3808-1 UCC3808-2 UCC2808-1, UCC2808-2, UCC3808-1, UCC3808-2 www.ti.com SLUS168E – APR 1999 – REVISED AUGUST 2015 7 Detailed Description 7.1 Overview The UCCx808-x device is a highly-integrated, low power current mode push-pull PWM controller. The controller employs low starting current, and employs an internal control algorithm that offers accurate static output voltage regulation against line and load. The UCCx808-x family offers a variety of package temperature range options, and choice of undervoltage lockout levels. The family has UVLO thresholds and hysteresis options for offline and battery-powered system. Table 1. Undervoltage Lockout Levels PART NUMBER TURN ON THRESHOLD TURN OFF THRESHOLD UCCx808-1 12.5 V 8.3 V UCCx808-2 4.3 V 4.1 V Table 2. Undervoltage Lockout Options PACKAGED DEVICES TA = TJ UVLO OPTION SOIC (D) PDIP (N) 12.5 V/8.3 V UCC2808D-1 UCC2808N-1 4.3 V/4.1 V UCC2808D-2 UCC2808N-2 12.5 V/8.3 V UCC3808D-1 UCC3808N-1 4.3 V/4.1 V UCC3808D-2 UCC3808N-2 –40°C to 85°C 0°C to 70°C 7.2 Functional Block Diagram OVERCURRENT COMPARATOR FB COMP CS 2 1 3 22 k Ω PEAK CURRENT COMPARATOR 8 VDD 7 OUTA 6 OUTB 5 GND 14 V 0.75 V 0.5 V 2.0 V 2.2 V VDD OK OSCILLATOR S Q PWM LATCH R 1.2R VDD–1 V Q S S T Q Q Q R R PWM COMPARATOR VDD 0.5 V R SOFT START VOLTAGE REFERENCE SLOPE = 1 V/ms 4 RC Pinout shown is for SOIC and PDIP packages. Figure 4. Functional Block Diagram Copyright © 1999–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: UCC2808-1 UCC2808-2 UCC3808-1 UCC3808-2 7 UCC2808-1, UCC2808-2, UCC3808-1, UCC3808-2 SLUS168E – APR 1999 – REVISED AUGUST 2015 www.ti.com Functional Block Diagram (continued) The oscillator generates a sawtooth waveform on RC. During the RC rise time, the output stages alternate on time, but both stages are off during the RC fall time. The output stages switch at ½ the oscillator frequency, with guaranteed duty cycle of
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