UCC2839
UCC3839
Secondary Side Average Current Mode Controller
FEATURES
DESCRIPTION
• Practical Secondary Side Control of
Isolated Power Supplies
The UCC3839 provides the control functions for secondary side average
current mode control in isolated power supplies. Start up, pulse width modulation and MOSFET drive must be accomplished independently on the
primary side. Communication from secondary to primary side is anticipated through an opto-isolator.
• Provides a Self Regulating Bias
Supply From a High Input Voltage
Using an External N-Channel
Depletion Mode FET
• Onboard Precision, Fixed Gain,
Differential Current Sense Amplifier
• Wide Bandwidth Current Error
Amplifier
• 5V Reference
• High Current, Programmable Gm
Amplifier Optimized to Drive
Opto-couplers
Accordingly, the UCC3839 contains a fixed gain current sense amplifier,
voltage and current error amplifiers, and a Gm type buffer/driver amplifier
for the opto-isolator. Additional housekeeping functions include a precision
5V reference and a bias supply regulator.
Power for the UCC3839 can be generated by peak rectifying the voltage of
the secondary winding of the isolation transformer. From this unregulated
voltage, the UCC3839’s bias supply regulator will generate its own 7.5V
bias supply using an external, N-channel, depletion mode FET.
The UCC3839 can be configured for traditional average current mode control where the output of the voltage error amplifier commands the current
error amplifier. It can also be configured for output voltage regulation with
average current mode short circuit current limiting, employing two parallel
control loops regulating the output voltage and output current independently.
BLOCK DIAGRAM
UDG-97011
SLUS179A - APRIL 1999 - REVISED NOVEMBER 2001
UCC2839
UCC3839
CONNECTION DIAGRAMS
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V
Supply Current
(LED not connected) . . . . . . . . . . . . . . . . . . . . . . . . . . . 2mA
(LED connected) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14mA
Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 15V
Power Dissipation at TA = 60°C
(LED not connected). . . . . . . . . . . . . . . . . . . . . . . . . . 20mW
(LED connected). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55mW
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . –55°C to +150°C
Lead Temperature (Soldering, 10sec.) . . . . . . . . . . . . . +300°C
DIL-14, SOIC-14 (Top View)
D or N Package
Currents are positive into, negative out of the specified terminal.
Consult Packaging Section of Databook for thermal limitations
and considerations of package.
ELECTRICAL CHARACTERISTICS: Unless otherwise specified, 0°C to 70°C for the UCC3839, –40°C to 85° for the
UCC2839. VLINE = 10V, RG = 400Ω. TA = TJ.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
Current Error Amplifier
VIO
10
AVOL
CMRR
VCM = 0.5V to 5.5V
mV
60
dB
60
dB
PSRR
VLINE = 10V to 20V
60
CAO High
CA– = 1V, CA+ = 1.1V, ICAO = –100 A
4.8
7
dB
V
ICAO
CA– = 1V, CA+ = 1.1V, CAO = 0.5V
–500
–250
µA
CAO Low
CA– = 1V, CA+ = 0.9V, ICAO = 500µA
GBW
F = 100kHz, TA = 25°C
0.2
3
5
1.46
1.5
0.4
V
MHz
Voltage Error Amplifier
VA–
AVOL
PSRR
VLINE = 10V to 20V
VAO High
IVAO = –100µA to 100µA
IVAO
VA– = 1.45V, VAO = 0.5V
VAO Low
VA– = 1.55V, VAO = 0.5V, IVAO = 500µA
GBW
(Note 1)
1.525
V
60
dB
60
dB
4.8
5
–500
0.2
3
5
5.2
V
–250
µA
0.4
V
MHz
Current Sense Amplifier
CSO Zero
CS+ = CS– = –0.3V to 5.5V, ICSO = –100µA to 100µA
0.85
1
1.15
V
AV
CS+ = 0, CS– = 0mV to –200mV
7.75
8
8.2
V/V
2
4
4.75
5
5.2
V
0
10
µA
Current Sense Amplifier (cont.)
Slew Rate
CS+ = 0, CS– = 0mV to –0.5V
CSO
CS+ = –200mV, CS– = –700mV
V/µs
LED Driver
ILED
LED = 5.5V, CA– = 1V, CA+ = 1.1V, RG = 400
LED = 5.5V, CA– = 1V, CA+ = 0.9V, RG = 400
Gm
LED = 5.5V, CAO = 1V to 3V, RG = 400
Slew Rate
CAO = 2V to 2.5V, LED = 400Ω to 5.5V, RG = 400
2
9
10
11
mA
2.25
2.5
2.75
mS
1
4
V/µs
UCC2839
UCC3839
ELECTRICAL CHARACTERISTICS: Unless otherwise specified, 0°C to 70°C for the UCC3839, –40°C to 85° for the
UCC2839. VLINE = 10V, RG = 400Ω. TA = TJ.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
4.94
5
5.06
5.1
V
0.298
0.3
0.302
V/V
7
7.5
8
V
1.3
2
mA
Precision Reference
REF
TJ = 25°C
IREF = 0mA to 1mA, VLINE = 10V to 20V
VA+/REF
4.9
V
VDD Regulator
VDD
IDD = 0mA to –15mA, VLINE = 10V to 40V
IVDD
VLINE = 10V to 40V, CA– = 0V, CA+ = 1V, VA– = 2.9V, CS+
= CS– = 0, IREF = 0
Note 1: Ensured by design. Not 100% tested in production.
PIN DESCRIPTIONS
CA–: Current Error Amplifier Negative Input.
REF: 5V Precision Reference Buffer Output. Minimum
Decoupling Capacitance = 0.01µF
CAO: Current Error Amplifier Output. Output source current is limited, and output sink current is guaranteed to
be greater than the VAO output source current. Current
loop compensation components are generally connected
to CAO and CA–.
VA–: Voltage Error Amplifier Negative Input. Voltage Error Amplifier is internally referenced to 1.5V
VAO: Voltage Error Amplifier Output. In a two loop average current mode control configuration, VAO is connected to CA+ and is the current command signal. VAO
is internally clamped not to exceed 5V for short circuit
control. In a single loop voltage mode control configuration with a parallel average short circuit current control
loop, VAO is connected directly to CAO. Output source
current is limited, and output sink current is guaranteed
to be greater than the CAO output source current.
CA+: Current Error Amplifier Positive Input.
CS–: Current Sense Amplifier Negative Input.
CSO: Current Sense Amplifier Output. Internally set gain
VOUT/VIN = 8 VIN = 0V results in CSO = 1V.
CS+: Current Sense Amplifier Positive Input.
GM: Gm (transconductance) Programming Pin. Resistor
RGM = 400Ω to GND.
VDD: 7.5V Regulator output. Supply for most of the chip.
Minimum Decoupling Capacitance = 0.01µF
GND: Chip Ground.
VGATE: External FET Gate Control Voltage.
LED: Output of LED Driver. Connect LED from VDD pin
to LED.
APPLICATION INFORMATION
Fig. 1 shows a typical secondary side average current
mode controller configuration using the UCC3839. In this
configuration, output voltage is sensed and regulated by
the voltage error amplifier. Its output, VAO provides the
reference for the current error amplifier at the CA+ pin.
VAO can be connected to CA+ directly or through a resistive divider depending on the particular application requirements.
precision current sense amplifier of the chip. The
onboard current sense amplifier has a gain of 8 and is intended for differential sensing of the shunt voltage with a
common mode voltage range from 0V up to 5V. The output of the current sense amplifier, CSO is 1V for zero input which guarantees that the circuit can control currents
down to 0A.
The CSO signal is fed to the CA– input of the current error amplifier through a resistor. The current error amplifier
takes the VAO and CSO signals and generates the error
signal for the pulse width modulator.
Average current mode control needs accurate output current information which is provided by a low value current
sense resistor. The voltage proportional to the converter’s output current is sensed and amplified by the
3
UCC2839
UCC3839
APPLICATION INFORMATION (cont.)
Since the PWM function is located on the primary side of
the power converter the CAO signal must be sent across
the safety isolation boundary. The UCC3839 anticipates
an opto-coupler to provide isolation between primary and
secondary. Therefore, CAO drives a transconductance
amplifier that controls LED current in an opto-isolator.
During start up and when CAO exceeds 4V, the current
in the LED drops to zero. Maximum LED current is obtained during normal operation as CAO reaches its lowest potential. Its value is determined by the programming
resistor value from the GM pin to circuit GND.
controls the current in the opto-coupler providing the
feedback signal for the PWM section on the primary side.
Voltage regulation is still maintained by the voltage error
amplifier until a user programmable output current is
reached. At this time CAO will take control over the Gm
amplifier and the output current of the converter will be
regulated while the output voltage falls below its nominal
value. This current level is set at the CA+ input by a resistive divider from the 5V reference of the chip.
Since the chip is powered from a peak rectifier which
maintains the bias supply for the UCC3839 even under
short circuit conditions, both of these techniques can be
used to eliminate the short circuit runaway problem in
isolated power supplies using peak current mode control
on the primary side.
An alternative secondary side controller configuration is
introduced in Fig. 2. In this circuit, the voltage and current
control loops of the UCC3839 are connected parallel. It
can be achieved by connecting the VAO and CAO pins
together. The error amplifier with the lower output voltage
UDG-97012
Figure 1. Secondary side average current mode controller.
4
UCC2839
UCC3839
APPLICATION INFORMATION (cont.)
UDG-97014
Figure 2. Voltage mode with average current short circuit limit.
UDG-97014
Figure 3. Typical primary side circuit for use with secondary side average current mode controller.
5
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
UCC2839D
OBSOLETE
SOIC
D
14
TBD
Call TI
Call TI
-40 to 85
UCC2839DG4
OBSOLETE
SOIC
D
14
TBD
Call TI
Call TI
-40 to 85
UCC3839D
OBSOLETE
SOIC
D
14
TBD
Call TI
Call TI
0 to 70
UCC3839DG4
OBSOLETE
SOIC
D
14
TBD
Call TI
Call TI
0 to 70
UCC2839D
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
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Addendum-Page 1
Samples
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