UCC5614DPTR

Obsolete Device
 SLUS349B − DECEMBER 1994 − REVISED APRIL 2005               FEATURES D Complies with SCSI, SCSI−2 and SPI−2 Single D D D D D D D D D D Ended Standards 2.7-V to 5.25-V Operation 1.8-pF Channel Capacitance during Disconnect 0.5-µA Supply Current in Disconnect Mode 110-Ω/2.5-kΩ Programmable Termination Completely Meets SCSI Hot Plugging −400-mA Sourcing Current for Termination +400-mA Sinking Current for Active Negation Drivers Trimmed Termination Current to 4% Trimmed Impedance to 7% Current Limit and Thermal Shutdown Protection DESCRIPTION The UCC5614 provides 9 lines of active termination for a small computer system’s interface (SCSI) parallel bus. The SCSI standard recommends active termination at both ends of the cable segment. The UCC5614 is ideal for high performance 3.3-V SCSI systems. The key features contributing to such low operating voltage are the 0.1-V drop-out regulator and the 2.7-V reference. During disconnect the supply current is typically only 0.5 µA, which makes the device attractive for battery powered systems. The UCC5614 is designed with an ultra low channel capacitance of 1.8 pF, which eliminates effects on signal i cted terminators at interim points on the bus. BLOCK DIAGRAM 
    ! "#$ !  %#&'" ($) (#"! "  !%$""! %$ *$ $!  $+! !#$! !(( ,-) (#" %"$!!. ($!  $"$!!'- "'#($ $!.  '' %$$!) Copyright  2005, Texas Instruments Incorporated www.ti.com 1 Obsolete Device
 SLUS349B − DECEMBER 1994 − REVISED APRIL 2005 DESCRIPTION (CONTINUED) The UCC5614 can be programmed for either a 110-Ω or 2.5-kΩ termination. The 110-Ω termination is used for standard SCSI bus lengths and the 2.5-kΩ termination is typically used in short bus applications. When driving the TTL compatible DISCNCT pin directly, the 110-Ω termination is connected when the DISCNCT pin is driven low, and disconnected when driven high. When the DISCNCT pin is driven through an impedance between 80 kΩ and 150 kΩ, the terminator is in short bus mode. The 2.5-kΩ termination is connected when the DISCNCT pin is driven low and disconnected when driven high. The power amplifier output stage allows the UCC5614 to source full termination current and sink active negation current when all termination lines are actively negated. The UCC5614 is pin for pin compatible with Unitrode’s other 9-line SCSI terminators, allowing lower capacitance and lower voltage upgrades to existing systems. The UCC5614, as with all Unitrode terminators, is completely hot pluggable and appears as high impedance at the terminating channels with VTRMPWR = 0 V or open. Internal circuit trimming is utilized, first to trim the 110-Ω termination impedance to a 7% tolerance, and then most importantly, to trim the output current to a 4% tolerance, as close to the max SCSI specification as possible, which maximizes noise margin in fast SCSI operation. Other features include thermal shutdown and current limit. This device is offered in low thermal resistance versions of the industry standard 16-pin narrow body SOIC, 16-pin N and 24-pin TSSOP. ORDERING INFORMATION PACKAGED DEVICE TA SOIC-16 (DP){ DIL-16 (N) TSSOP-24 (PW)} 0°C to 70°C UCC5614DP UCC5614N UCC5614PW † † The DP package is available taped and reeled in quanities of 2,500. Add TR suffix to device type (e.g. UCC5614DPTR) to order quantities of 2,500 devices per reel. ‡ The PW package is available taped and reeled in quanities of 2,000. Add TR suffix to device type (e.g. UCC5614PWTR) to order quantities of 2,000 devices per reel. 2 www.ti.com Obsolete Device
 SLUS349B − DECEMBER 1994 − REVISED APRIL 2005 CONNECTION DIAGRAMS DIL−16 (Top View) N Package (1) SOIC−16 (Top View) DP Package (1) (2) LINE7 LINE8 LINE9 GND SGND DISCNCT LINE1 LINE2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 LINE6 LINE5 REG GND GND TRMPWR LINE4 LINE3 TSSOP−24 (Top View) PW Package (1) (3) 1 2 3 4 5 6 7 8 9 10 11 12 LINE7 LINE8 LINE9 N/C SGND GND GND GND GND DISCNCT LINE1 LINE2 24 23 22 21 20 19 18 17 16 15 14 13 LINE7 1 16 LINE6 LINE8 2 15 LINE5 LINE9 3 14 REG N/C 4 13 N/C SGND 5 12 N/C DISCNCT 6 11 TRMPWR LINE1 7 10 LINE4 LINE2 8 9 LINE3 LINE6 LINE5 REG REG GND GND GND GND TRMPWR TRMPWR LINE4 LINE3 NOTES: (1). Drawings are not to scale. (2). DP package pin 5 serves as ground and pins 4,12 and 13 serve as heatsink ground. (3). PW package pin 5 serves as ground and pins 6,7,8,9,17,18,19 and 20 serve as heatsink ground. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted{} UCC5629 TRMPWR voltage UNIT 6 Input voltage V 0 to 7 Regulator output current 2 W Storage temperature, Tstg −65 to 150 Operating junction temperature, TJ –55 to 150 °C C Lead temperature (soldering, 10 sec.) 300 † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to GND. Currents are positive into and negative out of, the specified terminal. ‡ Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages. All voltages are referenced to GND. RECOMMENDED OPERATING CONDITIONS MAX UNIT 2.7 MIN 5.25 V Temperature ranges 0 70 °C Signal line voltage 0 5 DISCNCT input voltage 0 TRMPWR voltage www.ti.com NOM TRMPWR V 3 Obsolete Device
 SLUS349B − DECEMBER 1994 − REVISED APRIL 2005 ELECTRICAL CHARACTERISTICS TA = 0°C to 70°C, TRMPWR = 3.3 V, DISCNCT = 0 V, RDISCNCT = 0 Ω, TA = TJ, (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Supply Current Section Termpwr supply current Power down mode All termination lines = Open 1 2 All termination lines = 0.2 V 210 218 DISCNCT = Trmpwr 0.5 5 110 117.7 mA µA Output Section (110 Ω − Terminator Lines) Terminator impedance Output high voltage 102.3 (Note 1) VLINE = 0.2 V TJ = 25°C VLINE = 0.2 V Max output current VLINE = 0.2 , TRMPWR = 3 V, TJ = 25°C (Note 1) VLINE = 0.2 V, TRMPWR = 3 V (Note 1) 2.5 2.7 3.0 −22.1 −23 −24 −21 −23 −24 −20.2 −23 −24 −19 −23 −24 VLINE = 0.5 V Ohms V mA −22.4 Output leakage DISCNCT = 2.4 V, TRMPWR = 0 V to 5.25 V 10 400 nA Output capacitance DISCNCT = 2.4 V (Note 2) (DP Package) 1.8 2.5 pF 2 2.5 3 kΩ Output Section (2.5 kΩ − Terminator Lines) (RDISCNCT = 80 kΩ) Terminator impedance Output high voltage TRMPWR = 3 V (Note 1) 2.5 2.7 3.0 Max output current VLINE = 0.2 V −0.7 −1 −1.4 VLINE = 0.2 V, TRMPWR = 3 V (Note 1) −0.6 −1 −1.5 V mA Output leakage DISCNCT = 2.4 V, TRMPWR = 0 to 5.25 V 10 400 nA Output capacitance DISCNCT = 2.4 V (Note 2) (DP Package) 1.8 2.5 pF 2.7 3.0 0.1 0.2 Regulator Section Regulator output voltage 5.25 V > TRMPWR > 3 V Drop out voltage All Termination Lines = 0.2 V 2.5 Short circuit current VREG = 0 V −200 −400 −800 Sinking current capability VREG = 3 V 200 400 800 Thermal shutdown (Note 2) 170 Thermal shutdown hysteresis (Note 2) 10 V mA °C Disconnect Section Disconnect threshold RDISCNCT = 0 & 80 kΩ Input current DISCNCT = 0 V NOTES: 1. Measuring each termination line while other eight are low (0.2 V). 2. Ensured by design. Not production tested. 4 www.ti.com 0.8 1.5 2.0 V 30 50 mA Obsolete Device
 SLUS349B − DECEMBER 1994 − REVISED APRIL 2005 Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. DISCNCT 7 GND 9 LINE1 TO LINE9 4 I 110-Ω termination channels REG 9 o Output of the internal 2.7-V regulator TRMPWR 4 I Power for the device I Taking this pin high causes the 9 channels to become high impedance and the chip to go into low power mode. In short laptop buses an 80-kΩ to 150-kΩ resister to ground terminates the bus at 2.5 kΩ. Less than 110 Ω to ground enables the terminator. Ground reference for the device APPLICATION INFORMATION Figure 1. Typical SCSI Bus Configuration Utilizing two UCC5614 Devices Figure 2. Typical Wide SCSI Bus Configuration Utilizing three UCC5614 Devices www.ti.com 5 PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) UCC5614DP OBSOLETE SOIC D 16 TBD Call TI Call TI 0 to 70 UCC5614DP UCC5614DPG4 OBSOLETE SOIC D 16 TBD Call TI Call TI 0 to 70 UCC5614DP UCC5614PWP OBSOLETE TSSOP PW 24 TBD Call TI Call TI 0 to 70 UCC5614PWP UCC5614Z OBSOLETE UTR 16 TBD Call TI Call TI 0 to 70 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. 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Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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