UCC5672MWPTR

UCC5672 Multimode (LVD/SE) SCSI 9 Line Terminator FEATURES DESCRIPTION • Auto Selection Multi-Mode Single Ended or Low Voltage Differential Termination The UCC5672 Multi-Mode Low Voltage Differential and Single Ended Terminator is both a single ended terminator and a low voltage differential terminator for the transition to the next generation SCSI Parallel Interface (SPI-3). The low voltage differential is a requirement for the higher speeds at a reasonable cost and is the only way to have adequate skew budgets. • 2.7V to 5.25V Operation • Differential Failsafe Bias The automatic mode select/change feature switches the terminator between Single Ended or LVD SCSI Termination, depending on the bus mode. If the bus is in High Voltage Differential Mode, the terminator lines transition into a High Impedance state. • Built-in SPI-3 Mode Change Filter/ Delay • Meets SCSI-1, SCSI-2, Ultra2 (SPI-2 LVD), Ultra3/Ultra160 (SPI-3) and Ultra320 (SPI-4) Standards The UCC5672 is SPI-4, SPI-3, SPI-2, and SCSI-2 compliant. This device is offered in a 28 pin TSSOP package to minimize the footprint. The UCC5672 is also available in a 36 pin MWP package. • Supports Active Negation • 3pF Channel Capacitance BLOCK DIAGRAM HPD 2.1V DIFFB FILTER/ DELAY 17 LVD 0.6V SE DIFSENS REF 1.3V TRMPWR 28 TRMPWR 27 DIFSENS 3 L1– 2 L1+ 26 L9– 25 L9+ ENABLE SOURCE/SINK REGULATORS SE REF 2.7V 10µA DISCNCT 16 SW1 LVD REF 1.25V 110 124 13 56mV – + 56mV + – 52 52 ENABLE SE GROUND SWITCH 110 HS/GND 6 HS/GND 22 GND 14 MODE SE LVD HPD DISCNCT SW1 UP DOWN DOWN OPEN OTHER SWITCHES 124 UP DOWN OPEN OPEN 56mV – + 56mV + – 52 52 SE GROUND SWITCH 1 Note: Indicated pinout is for 28 pin TSSOP package. SLUS414B - FEBRUARY 2000 - REVISED MARCH 2002 REG UDG-99125 UCC5672 ABSOLUTE MAXIMUM RATINGS AVAILABLE OPTIONS TRMPWR Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V Signal Line Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 5V Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . –55°C to +150°C Lead Temperature (Soldering, 10sec.) . . . . . . . . . . . . . +300°C TA 0 C to 70°C Packaged Devices UCC5672MWP UCC5672PWP All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the Databook for thermal limitations and considerations of packages. RECOMMENDED OPERATING CONDITIONS TRMPWR Voltage . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.25V QSOP-36 (TOP VIEW) MWP Package CONNECTION DIAGRAM TSSOP-28 (TOP VIEW) PWP Package 1 REG TRMPWR 36 2 N/C N/C 35 3 N/C N/C 34 REG 1 28 TRMPWR 4 L1+ N/C 33 L1+ 2 27 TRMPWR 5 L1– L9– 32 L1– 3 26 L9– 6 L2+ L9+ 31 L2+ 4 25 L9+ 7 L2– L8– 30 L2– 5 24 L8– 8 HS/GND L8+ 29 HS/GND 6 23 L8+ 9 HS/GND HS/GND 28 L3+ 7 22 HS/GND 10 HS/GND HS/GND 27 L3– 8 21 L7– 11 L3+ HS/GND 26 L4+ 9 20 L7+ 12 L3– L7– 25 L4– 10 19 L6– 13 L4+ L7+ 24 L5+ 11 18 L6+ 14 L4– L6– 23 L5– 12 17 DIFFB 15 L5+ L6+ 22 DISCNCT 13 16 DIFSENS 16 L5– DIFF B 21 GND 14 15 N/C 17 DISCNCT DIFSENS 20 18 GND N/C 19 2 UCC5672 ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = TJ = 0°C to 70°C, TRMPWR = 2.7V to 5.25V. PARAMETER TEST CONDITIONS MIN TYP MAX UNITS TRMPWR Supply Current Section TRMPWR Supply Current LVD SCSI Mode 23 35 mA SE Mode 14 25 mA DISCNCT Mode 250 500 µA Regulator Section 1.25V Regulator Output Voltage LVD SCSI Mode 1.15 1.25 1.35 V 1.25V Regulator Source Current VREG= 0V –225 –420 –800 mA 1.25V Regulator Sink Current VREG= 3.3V 100 180 420 mA 2.7V Regulator Output Voltage SE Mode 2.5 2.7 3.0 V 2.7V Regulator Source Current VREG= 0V –225 –420 –800 mA 2.7V Regulator Sink Current VREG= 3.3V 100 180 420 mA 1.3V DIFSENS Output Voltage DIFSENS 1.2 1.3 1.4 V 1.3V DIFSENS Source Current VDIFSENS = 0V –5 –15 mA 1.3V DIFSENS Sink Current VDIFSENS = 2.75V 50 200 µA Diff Sense Driver (DIFSENS) Section Differential Termination Section Differential Impedance Common Mode Impedance (Note 2) 100 105 110 Ω 110 150 165 Ω 125 mV 1.25 1.35 V 3 pF Differential Bias Voltage 100 Common Mode Bias 1.15 Output Capacitance Single Ended Measurement to Ground (Note 1) Single Ended Termination Section 100 108 116 Ω Signal Level 0.2V, All Lines Low –20 –23 –25.4 mA Signal Level 0.5V –17 –22.4 mA 400 nA Impedance Z = Termination Current (VLX − 0 . 2V ) ILX , (Note 3) Output Leakage Output Capacitance Single Ended Measurement to Ground (Note 1) Single Ended GND SE Impedance I= 10mA 20 3 pF 60 Ω 2.0 V Disconnect (DISCNCT) and Diff Buffer (DIFFB) Input Section DISCNCT Threshold 0.8 –30 µA DIFFB SE to LVD SCSI Threshold 0.5 0.7 V DIFFB LVD SCSI to HPD Threshold 1.9 2.4 V DIFFB Input Current –1 1 µA DISCNCT Input Current –10 3 UCC5672 ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = TJ = 0°C to 70°C, TRMPWR = 2.7V to 5.25V. PARAMETER TEST CONDITIONS MIN TYP 100 180 MAX UNITS Time Delay/Filter Section Mode Change Delay A new mode change can start any time after a previous mode change has been detected. (Note4 ) 300 ms Note 1: Guaranteed by design. Not 100% tested in production. Note 2: Z CM = 1. 2V ; Where VCM = Voltage measured with L+ tied to L– and zero current applied; I(V CM + 0. 6V ) − I(V CM − 0. 6V ) Note 3: VLX= Output voltage for each terminator minus output pin (L1– through L9–) with each pin unloaded. ILX = Output current for each terminator minus output pin (L1– through L9–) with the minus output pin forced to 0.2V. Note 4: Noise on DIFFB will not cause a false mode change. The time delay is that same for a change from any mode to any other mode. Within 300ms after power is applied the mode is defined by the voltage of DIFFB. PIN DESCRIPTIONS DIFFB: Input pin for the comparators that select SE, LVD SCSI, or HIPD modes of operation. This pin should be decoupled with a 0.1µF capacitor to ground and then coupled to the DIFSENS pin through a 20kΩ resistor. GND: Power Supply return. L1– thru L9–: Termination lines. These are the active lines in SE mode and are the negative lines for LVD SCSI mode. In HIPD mode, these lines are high impedance. DIFSENS: Connects to the Diff Sense line of the SCSI bus. The bus mode is controlled by the voltage level on this pin. L1+ thru L9+: Termination lines. These lines switch to ground in SE mode and are the positive lines for LVD SCSI mode. In HIPD mode, these lines are high impedance. DISCNCT: Input pin used to shut down the terminator if the terminator is not connected at the end of the bus. Connect this pin to ground to activate the terminator or open pin to disable the terminator. REG: Regulator bypass pin, must be connected to a 4.7µF capacitor to ground. HS/GND: Heat sink ground pins. These should be connected to large ground area PC board traces to increase the power dissipation capability. TRMPWR: 2.7V to 5.25V power input pin. Bypass near the terminators with a 4.7µF capacitor to ground. APPLICATION INFORMATION All SCSI buses require a termination network at each end to function properly. Specific termination requirements differ, depending on which types of SCSI devices are present on the bus. The UCC5672 is used in multi-mode active termination applications, where single ended (SE) and low voltage differential (LVD) SCSI devices might coexist. The UCC5672 has both SE and LVD SCSI termination networks integrated into a single monolithic component. The correct termination network is automatically determined by the SCSI bus "DIFSENS" signal. liver 1.3V to the DIFSENS line. If only LVD SCSI devices are present, the DIFSENS line will be successfully driven to 1.3V and the terminators will configure for LVD SCSI operation. If any single ended devices are present, they will present a short to ground on the DIFSENS line, signaling the UCC5672(s) to configure into the SE mode, accommodating the SE devices. Or, if any high voltage differential (HVD) SCSI devices are present, the DIFSENS line is pulled high and the terminator will enter a high impedance state, effectively disconnecting from the bus. The SCSI bus DIFSENS signal line is used to identify which types of SCSI devices are present on the bus. On power-up, the UCC5672 DIFSENS drivers will try to de- The DIFSENS line is monitored by each terminator through a 50Hz noise filter at the DIFFB input pin. A set of comparators detect and select the appropriate termi4 UCC5672 APPLICATION INFORMATION (cont.) nation for the bus as follows. If the DIFSENS signal is below 0.5V, the termination network is set for single ended. Between 0.7V and 1.9V, the termination network switches to LVD SCSI, and above 2.4V indicates HVD SCSI, causing the terminators to disconnect from the bus. These thresholds accommodate differences in ground potential that can occur with long lines. Three UCC5672 multi-mode parts are required at each end of the bus to terminate 27 (18 data, plus 9 control) lines. Each part includes a DIFSENS driver, but only one is necessary to drive the line. The DIFFB inputs on all three parts are connected together, allowing them to share the same 50Hz noise filter. This multi-mode terminator operates in full specification down to 2.7V TRMPWR voltage. This accommodates 3.3V systems, UCC5672 Termpower 28 27 13 TRMPWR UCC5672 L1+ 4 2 L1+ L1– 5 3 L1– 25 L9+ 26 L9– CONTROL LINES (9) TRMPWR DISCNCT L9+ 31 L9– 32 DIFFS DIFF SENSE 16 16 4.7 F 13 TRMPWR 27 DISCNCT 13 DIFFS DIFFB DIFFB REG 1 17 17 1 20 k 20 k 0.1 µF TRMPWR UCC5672 L1+ 4 2 L1+ L1– 5 3 L1– DATA LINES (9) TRMPWR DISCNCT 4.7 F 0.1 µF UCC5672 27 28 REG 4.7 F 28 Termpower TRMPWR L9+ 31 25 L9+ L9– 32 26 L9– NC 16 16 NC TRMPWR 28 TRMPWR 27 DISCNCT 13 REG DIFFB DIFFB REG 1 17 17 1 4.7 F 4.7 F UCC5672 28 27 13 TRMPWR UCC5672 L1+ 2 2 L1+ L1– 3 3 L1– L9+ 25 25 L9+ L9– 26 26 L9– NC 16 16 DATA LINES (9) TRMPWR DISCNCT 4.7 F TRMPWR 28 TRMPWR 27 DISCNCT 13 NC REG DIFFB DIFFB REG 1 17 17 1 4.7 F 4.7 F UDG-99126 Note: Indicated pinout is for 28 pin TSSOP package. Figure 1. Application diagram. 5 UCC5672 APPLICATION INFORMATION (cont.) with allowance for the 3.3V supply tolerance (+/- 10%), a unidirectional fusing device and cable drop. In 3.3V TRMPWR systems, the UCC3918 is recommended in place of the fuse and diode. The UCC3918's lower voltage drop allows additional margin over the fuse and diode, for the far end terminator. 1pF to each plane. Each feed-through will add about 2.5pF to 3.5pF. Enlarging the clearance holes on both power and ground planes will reduce the capacitance. Similarly, opening up the power and ground planes under the connector will reduce the capacitance for through-hole connector applications. Capacitance will also be affected by components, in close proximity, above and below the circuit board. Layout is critical for Ultra2, Ultra3/Ultra160 and Ultra320 systems. The SPI-2 standard for capacitance loading is 10pF maximum from each positive and negative signal line to ground, and a maximum of 5pF between the positive and negative signal lines of each pair is allowed. These maximum capacitances apply to differential bus termination circuitry that is not part of a SCSI device, (e.g. a cable terminator). If the termination circuitry is included as part of a SCSI device, (e.g., a host adaptor, disk or tape drive), then the corresponding requirements are 30pF maximum from each positive and negative signal line to ground and 15pF maximum between the positive and negative signal lines of each pair. Unitrode multi-mode terminators are designed with very tight balance, typically 0.1pF between pins in a pair and 0.3pF between pairs. At each L+ pin, a ground driver drives the pin to ground, while in single ended mode. The ground driver is specially designed to not effect the capacitive balance of the bus when the device is in LVD SCSI or disconnect mode. Multi-layer boards need to adhere to the 120Ω impedance standard, including the connectors and feedthroughs. This is normally done on the outer layers with 4 mil etch and 4 mil spacing between runs within a pair, and a minimum of 8 mil spacing to the adjacent pairs to reduce crosstalk. Microstrip technology is normally too low of impedance and should not be used. It is designed for 50Ω rather than 120Ω differential systems. Careful consideration must be given to the issue of heat management. A multi-mode terminator, operating in SE mode, will dissipate as much as 130mW of instantaneous power per active line with TRMPWR = 5.25V. The UCC5672 is offered in a 28 pin TSSOP. This package includes two heat sink ground pins. These heat sink/ground pins are directly connected to the die mount paddle under the die and conduct heat from the die to reduce the junction temperature. Both of the HS/GND pins need to be connected to etch area or four feed-through per pin connecting to the ground plane layer on a multi-layer board. The SPI-2 standard for capacitance balance of each pair and balance between pairs is more stringent. The standard is 0.75pF maximum difference from the positive and negative signal lines of each pair to ground. An additional requirement is a maximum difference of 2pF when comparing pair to pair. These requirements apply to differential bus termination circuitry that is not part of a SCSI device. If the termination circuitry is included as part of a device, then the corresponding balance requirements are 2.25pF maximum difference within a pair, and 3pF from pair to pair. Feed-throughs, through-hole connections, and etch lengths need to be carefully balanced. Standard multi-layer power and ground plane spacing add about 6 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) (3) Device Marking (4/5) (6) UCC5672PWP ACTIVE TSSOP PW 28 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 UCC5672PWP UCC5672PWPTR ACTIVE TSSOP PW 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 UCC5672PWP (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of