CLC1006ISO8X

Data Sheet A m p l i fy t h e H u m a n E x p e r i e n c e ® Comlinear CLC1006 FEATURES n 500MHz -3dB bandwidth at G=2 n 1,400V/μs slew rate n 0.02%/0.05˚ diff. gain/phase error n 300MHz large signal bandwidth n 5.5mA supply current n 5nV/√Hz input voltage noise n 100mA output current n Stable for gains ≥ 2 n Fully specified at 5V and ±5V supplies n CLC1006: Pb-free SOT23-5 and SOIC8 APPLICATIONS n Video line drivers n Imaging applications n Professional cameras n Differential line receivers n Photodiode preamps n Radar or communication receivers Single, 500MHz Voltage Feedback Amplifier Comlinear CLC1006 Single, 500MHz Voltage Feedback Amplifier General Description The COMLINEAR CLC1006 is a high-performance, voltage feedback amplifier that offers bandwidth and slew rate usually found in current feedback amplifiers. The CLC1006 provides 500MHz bandwidth and 1,400V/μs slew rate exceeding the requirements of standard-definition television and other multimedia applications. The COMLINEAR CLC1006 high-performance amplifier also provides ample output current to drive multiple video loads. The COMLINEAR CLC1006 is designed to operate from ±5V or +5V supplies. It consumes only 5.5mA of supply current. The combination of high-speed, excellent video performance, and 10ns settling time make the CLC1006 well suited for use in many general purpose, high-speed applications including standard definition video and imaging applications. Typical Application - Driving Dual Video Loads Rev 1B Ordering Information Part Number CLC1006IST5X CLC1006ISO8X CLC1006ISO8 Package SOT23-5 SOIC-8 SOIC-8 Pb-Free Yes Yes Yes RoHS Compliant Yes Yes Yes Operating Temperature Range -40°C to +85°C -40°C to +85°C -40°C to +85°C Packaging Method Reel Reel Rail Moisture sensitivity level for all parts is MSL-1. ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com Data Sheet SOT23-5 Pin Configuration OUT -V S +IN +VS SOT23-5 Pin Assignments Pin No. Pin Name OUT -VS +IN -IN +VS Description Output Negative supply Positive input Negative input Positive supply 1 2 3 4 5 1 2 3 + 5 4 Comlinear CLC1006 Single, 500MHz Voltage Feedback Amplifier -IN SOIC Pin Configuration SOIC Pin Assignments Pin No. 1 Pin Name NC -IN1 +IN1 -VS NC OUT +VS NC Description No connect Negative input, channel 1 Positive input, channel 1 Negative supply No connect Output Positive supply No connect NC -IN1 +IN1 -V S 1 2 3 4 8 7 6 5 NC +VS OUT NC 2 3 4 5 6 7 8 Rev 1B ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 2 Data Sheet Absolute Maximum Ratings The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the operating conditions noted on the tables and plots. Comlinear CLC1006 Single, 500MHz Voltage Feedback Amplifier Parameter Supply Voltage Input Voltage Range Continuous Output Current Min 0 -Vs -0.5V Max 14 +Vs +0.5V 100 Unit V V mA Reliability Information Parameter Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10s) Package Thermal Resistance 5-Lead SOT23 8-Lead SOIC Notes: Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air. Min -65 Typ Max 150 150 260 Unit °C °C °C °C/W °C/W 221 100 ESD Protection Product Human Body Model (HBM) Charged Device Model (CDM) SOT23-5 2kV 1kV Recommended Operating Conditions Parameter Operating Temperature Range Supply Voltage Range Min -40 4.5 Typ Max +85 12 Unit °C V Rev 1B ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 3 Data Sheet Electrical Characteristics at +5V TA = 25°C, Vs = +5V, Rf = 150Ω, RL = 150Ω to VS/2, G = 2; unless otherwise noted. Symbol BWSS BWLS BW0.1dBSS BW0.1dBLS tR, tF tS OS SR HD2 HD3 THD IP3 SFDR DG DP en in VIO dVIO Ibn dIb PSRR AOL IS RIN CIN CMIR CMRR RO VOUT IOUT Parameter -3dB Bandwidth Large Signal Bandwidth 0.1dB Gain Flatness 0.1dB Gain Flatness Rise and Fall Time Settling Time to 0.1% Overshoot Slew Rate 2nd Harmonic Distortion 3rd Harmonic Distortion Total Harmonic Distortion Third-Order Intercept Spurious-Free Dynamic Range Differential Gain Differential Phase Input Voltage Noise Input Current Noise Input Offset Voltage Average Drift Input Bias Current Average Drift Power Supply Rejection Ratio Open-Loop Gain Supply Current Input Resistance Input Capacitance Common Mode Input Range Common Mode Rejection Ratio Output Resistance Output Voltage Swing Output Current Conditions G = +2, VOUT = 0.2Vpp G = +2, VOUT = 1Vpp G = +2, VOUT = 0.2Vpp G = +2, VOUT = 1Vpp VOUT = 1V step; (10% to 90%) VOUT = 1V step VOUT = 0.2V step 1V step 1Vpp, 5MHz 1Vpp, 5MHz 1Vpp, 5MHz 1Vpp, 10MHz 1Vpp, 5MHz NTSC (3.58MHz), AC-coupled, RL = 150Ω NTSC (3.58MHz), AC-coupled, RL = 150Ω > 1MHz > 1MHz Min Typ 400 335 50 125 1.4 10 1 650 -60 -67 -59 32 60 0.01 0.01 5 3 0 1.2 ±3.2 7.5 Max Units MHz Frequency Domain Response Comlinear CLC1006 Single, 500MHz Voltage Feedback Amplifier MHz MHz MHz ns ns % V/µs dBc dBc dB dBm dBc % ° nV/√Hz pA/√Hz mV µV/°C µA nA/°C dB dB mA MΩ pF V dB Ω V mA Time Domain Response Distortion/Noise Response DC Performance DC 60 55 5.2 Input Characteristics Non-inverting 4.5 1.0 1 to 4 DC Closed Loop, DC RL = 150Ω 50 0.1 1 to 4 ±100 Rev 1B Output Characteristics ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 4 Data Sheet Electrical Characteristics at ±5V TA = 25°C, Vs = ±5V, Rf = 150Ω, RL = 150Ω to GND, G = 2; unless otherwise noted. Symbol BWSS BWLS BW0.1dBSS BW0.1dBLS tR, tF tS OS SR HD2 HD3 THD IP3 SFDR DG DP en ini VIO dVIO Ib dIb PSRR AOL IS RIN CIN CMIR CMRR RO VOUT IOUT Notes: 1. 100% tested at 25°C Parameter -3dB Bandwidth Large Signal Bandwidth 0.1dB Gain Flatness 0.1dB Gain Flatness Rise and Fall Time Settling Time to 0.1% Overshoot Slew Rate 2nd Harmonic Distortion 3rd Harmonic Distortion Total Harmonic Distortion Third-Order Intercept Spurious-Free Dynamic Range Differential Gain Differential Phase Input Voltage Noise Input Current Noise Input Offset Voltage(1) Average Drift Input Bias Current (1) Average Drift Power Supply Rejection Ratio (1) Open-Loop Gain Supply Current (1) Conditions G = +2, VOUT = 0.2Vpp G = +2, VOUT = 2Vpp G = +2, VOUT = 0.2Vpp G = +2, VOUT = 2Vpp VOUT = 2V step; (10% to 90%) VOUT = 2V step VOUT = 0.2V step 2V step 2Vpp, 5MHz 2Vpp, 5MHz 2Vpp, 5MHz 2Vpp, 10MHz 2Vpp, 5MHz NTSC (3.58MHz), AC-coupled, RL = 150Ω NTSC (3.58MHz), AC-coupled, RL = 150Ω > 1MHz > 1MHz Min Typ 500 300 50 100 2.4 10 1 1400 -68 -63 -62 32 63 0.02 0.05 5 3 Max Units MHz Frequency Domain Response Comlinear CLC1006 Single, 500MHz Voltage Feedback Amplifier MHz MHz MHz ns ns % V/µs dBc dBc dB dBm dBc % ° nV/√Hz pA/√Hz 10 20 mV µV/°C µA nA/°C dB dB 10 mA MΩ pF V dB Ω V mA Time Domain Response Distortion/Noise Response DC Performance -10 -20 DC 40 0 1.2 ±3.2 7.5 75 61 5.5 Non-inverting 4.5 1.0 ±3.8 DC Closed Loop, DC RL = 150Ω (1) ±3.0 40 65 0.1 ±3.6 ±200 Input Characteristics Input Resistance Input Capacitance Common Mode Input Range Common Mode Rejection Ratio (1) Output Resistance Output Voltage Swing Output Current Rev 1B Output Characteristics ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 5 Data Sheet Typical Performance Characteristics TA = 25°C, Vs = ±5V, Rf = 150Ω, RL = 150Ω to GND, G = 2; unless otherwise noted. Non-Inverting Frequency Response Inverting Frequency Response 1 6 0 -1 G = -1 G = -2 G = -5 G = -10 Comlinear CLC1006 Single, 500MHz Voltage Feedback Amplifier Normalized Gain (dB) Normalized Gain (dB) 3 -2 -3 -4 -5 -6 -7 VOUT = 0.2Vpp 0.1 1 0 G=2 -3 G=5 G = 10 VOUT = 0.2Vpp -9 0.1 1 10 100 1000 -6 10 100 1000 Frequency (MHz) Frequency (MHz) Frequency Response vs. CL 1 0 -1 -2 -3 -4 -5 -6 -7 0.1 1 10 100 1000 VOUT = 0.2Vpp CL = 1000pF Rs = 3.3Ω CL = 500pF Rs = 6Ω CL = 100pF Rs = 11Ω CL = 50pF Rs = 15Ω CL = 20pF Rs = 20Ω Frequency Response vs. RL 2 1 0 -1 -2 -3 -4 -5 -6 0.1 1 10 100 1000 VOUT = 0.2Vpp RL = 100Ω RL = 50Ω RL = 25Ω RL = 1kΩ Normalized Gain (dB) Normalized Gain (dB) RL = 500Ω Frequency (MHz) Frequency (MHz) Frequency Response vs. VOUT 3 Frequency Response vs. Temperature 2 1 Rev 1B Normalized Gain (dB) Normalized Gain (dB) 0 VOUT = 1Vpp -3 VOUT = 2Vpp VOUT = 4Vpp -6 0 -1 -2 -3 -4 -5 -6 VOUT = 0.2Vpp + 25degC - 40degC + 85degC -9 0.1 1 10 100 1000 -7 0.1 1 10 100 1000 Frequency (MHz) Frequency (MHz) ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 6 Data Sheet Typical Performance Characteristics TA = 25°C, Vs = ±5V, Rf = 150Ω, RL = 150Ω to GND, G = 2; unless otherwise noted. Non-Inverting Frequency Response at VS = 5V 6 0 3 -1 G = -1 G = -2 G = -5 G = -10 Inverting Frequency Response at VS = 5V 1 Comlinear CLC1006 Single, 500MHz Voltage Feedback Amplifier Normalized Gain (dB) Normalized Gain (dB) -2 -3 -4 -5 -6 -7 VOUT = 0.2Vpp 0.1 1 0 G=2 -3 G=5 G = 10 VOUT = 0.2Vpp -9 0.1 1 10 100 1000 -6 10 100 1000 Frequency (MHz) Frequency (MHz) Frequency Response vs. CL at VS = 5V 1 0 -1 -2 -3 -4 -5 -6 -7 0.1 1 10 100 1000 VOUT = 0.2Vpp CL = 1000pF Rs = 3.3Ω CL = 500pF Rs = 6Ω CL = 100pF Rs = 11Ω CL = 50pF Rs = 15Ω CL = 20pF Rs = 20Ω Frequency Response vs. RL at VS = 5V 2 1 0 -1 -2 -3 -4 -5 -6 0.1 1 10 100 1000 VOUT = 0.2Vpp RL = 100Ω RL = 50Ω RL = 25Ω RL = 1kΩ Normalized Gain (dB) Normalized Gain (dB) RL = 500Ω Frequency (MHz) Frequency (MHz) Frequency Response vs. VOUT at VS = 5V 3 Frequency Response vs. Temperature at VS = 5V 2 1 Rev 1B Normalized Gain (dB) Normalized Gain (dB) 0 VOUT = 1Vpp -3 VOUT = 2Vpp VOUT = 4Vpp -6 0 -1 -2 -3 -4 -5 -6 VOUT = 0.2Vpp + 25degC - 40degC + 85degC -9 0.1 1 10 100 1000 -7 0.1 1 10 100 1000 Frequency (MHz) Frequency (MHz) ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 7 Data Sheet Typical Performance Characteristics - Continued TA = 25°C, Vs = ±5V, Rf = 150Ω, RL = 150Ω to GND, G = 2; unless otherwise noted. Gain Flatness 1.5 1.3 1.1 0.9 0.7 0.5 0.3 0.1 -0.1 -0.3 -0.5 -0.7 -0.9 -1.1 -1.3 -1.5 0.1 Gain Flatness at VS = 5V 0.6 0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 1 10 100 1000 0.1 1 10 100 1000 VOUT = 2Vpp Comlinear CLC1006 Single, 500MHz Voltage Feedback Amplifier Normalized Gain (dB) VOUT = 2Vpp Frequency (MHz) Normalized Gain (dB) Frequency (MHz) -3dB Bandwidth vs. VOUT 650 -3dB Bandwidth vs. VOUT at VS = 5V 500 450 550 -3dB Bandwidth (MHz) -3dB Bandwidth (MHz) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 400 350 300 250 200 450 350 250 150 150 0.0 0.5 1.0 1.5 2.0 2.5 VOUT (VPP) VOUT (VPP) Closed Loop Output Impedance vs. Frequency 1000 VS = ±5.0V Input Voltage Noise 30 Rev 1B Input Voltage Noise (nV/√Hz) Output Resistance (Ω) 100 10 1 0.1 25 20 15 10 5 0 0.0001 0.01 10k 100k 1M 10M 100M 1G 0.001 0.01 0.1 1 10 Frequency (Hz) Frequency (MHz) ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 8 Data Sheet Typical Performance Characteristics - Continued TA = 25°C, Vs = ±5V, Rf = 150Ω, RL = 150Ω to GND, G = 2; unless otherwise noted. 2nd Harmonic Distortion vs. RL -40 -50 RL = 150Ω -60 -70 -80 -90 VOUT = 2Vpp -100 0 5 10 15 20 -100 0 5 10 15 20 RL = 500Ω 3rd Harmonic Distortion vs. RL -40 -50 -60 -70 RL = 500Ω -80 -90 VOUT = 2Vpp Comlinear CLC1006 Single, 500MHz Voltage Feedback Amplifier RL = 150Ω Distortion (dBc) Frequency (MHz) Distortion (dBc) Frequency (MHz) 2nd Harmonic Distortion vs. VOUT -50 10MHz -60 3rd Harmonic Distortion vs. VOUT -50 10MHz -60 Distortion (dBc) Distortion (dBc) -70 5MHz -80 1MHz -90 -70 5MHz -80 1MHz -90 -100 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 3 -100 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 3 Output Amplitude (Vpp) Output Amplitude (Vpp) CMRR vs. Frequency 0 VS = ±5.0V PSRR vs. Frequency 0 -10 -20 Rev 1B -10 CMRR (dB) PSRR (dB) 10k 100k 1M 10M -20 -30 -40 -50 -60 100M -30 -40 -50 -60 -70 10k 100k 1M 10M 100M Frequency (Hz) Frequency (Hz) ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 9 Data Sheet Typical Performance Characteristics - Continued TA = 25°C, Vs = ±5V, Rf = 150Ω, RL = 150Ω to GND, G = 2; unless otherwise noted. Small Signal Pulse Response 0.150 0.100 0.050 Small Signal Pulse Response at VS = 5V 2.65 2.60 2.55 Comlinear CLC1006 Single, 500MHz Voltage Feedback Amplifier Voltage (V) 0.000 -0.050 -0.100 -0.150 0 20 40 60 80 100 120 140 160 180 200 Voltage (V) 2.50 2.45 2.40 2.35 0 20 40 60 80 100 120 140 160 180 200 Time (ns) Time (ns) Large Signal Pulse Response 3 2 1 Large Signal Pulse Response at VS = 5V 4 3.5 3 Voltage (V) 0 -1 -2 -3 0 20 40 60 80 100 120 140 160 180 200 Voltage (V) 2.5 2 1.5 1 0 20 40 60 80 100 120 140 160 180 200 Time (ns) Time (ns) Differential Gain & Phase AC Coupled Output 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 -0.01 -0.02 -0.03 -0.04 -0.05 -0.7 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 RL = 150Ω AC coupled DG DP Differential Gain & Phase DC Coupled Output 0.15 0.13 Rev 1B Diff Gain (%) and Diff Phase (°) Diff Gain (%) and Diff Phase (°) 0.11 0.09 0.07 0.05 0.03 0.01 -0.01 -0.03 -0.05 -0.7 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 RL = 150Ω DC coupled DG DP Input Voltage (V) Input Voltage (V) ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 10 Data Sheet Typical Performance Characteristics - Continued TA = 25°C, Vs = ±5V, Rf = 150Ω, RL = 150Ω to GND, G = 2; unless otherwise noted. Differential Gain & Phase AC Coupled Output at VS = ±2.5V 0.15 0.1 DP 0.05 0 -0.05 -0.1 -0.15 -0.2 -0.35 -0.25 -0.15 -0.05 0.05 0.15 0.25 0.35 RL = 150Ω AC coupled DG Differential Gain & Phase DC Coupled at VS = ±2.5V 0.15 0.1 0.05 0 -0.05 -0.1 -0.15 -0.2 -0.35 -0.25 -0.15 -0.05 0.05 0.15 0.25 0.35 RL = 150Ω DC coupled DG Comlinear CLC1006 Single, 500MHz Voltage Feedback Amplifier Diff Gain (%) and Diff Phase (°) Input Voltage (V) Diff Gain (%) and Diff Phase (°) DP Input Voltage (V) Rev 1B ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 11 Data Sheet Application Information Basic Operation Figures 1 and 2 illustrate typical circuit configurations for non-inverting, inverting, and unity gain topologies for dual supply applications. They show the recommended bypass capacitor values and overall closed loop gain equations. +Vs 6.8μF perature, the package thermal resistance value ThetaJA (ӨJA) is used along with the total die power dissipation. TJunction = TAmbient + (ӨJA × PD) Where TAmbient is the temperature of the working environment. In order to determine PD, the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. PD = Psupply - Pload Supply power is calculated by the standard power equation. Output Comlinear CLC1006 Single, 500MHz Voltage Feedback Amplifier Input + - 0.1μF Psupply = Vsupply × IRMS supply Vsupply = VS+ - VSPower delivered to a purely resistive load is: Pload = ((VLOAD)RMS2)/Rloadeff The effective load resistor (Rloadeff) will need to include the effect of the feedback network. For instance, Rloadeff in figure 3 would be calculated as: 0.1μF Rg -Vs 6.8μF RL Rf G = 1 + (Rf/Rg) Figure 1. Typical Non-Inverting Gain Circuit +Vs 6.8μF RL || (Rf + Rg) These measurements are basic and are relatively easy to perform with standard lab equipment. For design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. Here, PD can be found from PD = PQuiescent + PDynamic - PLoad G = - (Rf/Rg) For optimum input offset voltage set R1 = Rf || Rg R1 Input Rg + - 0.1μF Output 0.1μF 6.8μF -Vs RL Rf Figure 2. Typical Inverting Gain Circuit Quiescent power can be derived from the specified IS values along with known supply voltage, VSupply. Load power can be calculated as above with the desired signal amplitudes using: (VLOAD)RMS = VPEAK / √2 ( ILOAD)RMS = ( VLOAD)RMS / Rloadeff The dynamic power is focused primarily within the output stage driving the load. This value can be calculated as: PDYNAMIC = (VS+ - VLOAD)RMS × ( ILOAD)RMS Assuming the load is referenced in the middle of the power rails or Vsupply/2. Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the packages available. Rev 1B Power Dissipation Power dissipation should not be a factor when operating under the stated 1000 ohm load condition. However, applications with low impedance, DC coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. Guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond it’s intended operating range. Maximum power levels are set by the absolute maximum junction rating of 150°C. To calculate the junction tem- ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 12 Data Sheet 2.5 reducing RS will increase bandwidth at the expense of additional overshoot and ringing. SOIC-8 Maximum Power Dissipation (W) 2 Overdrive Recovery An overdrive condition is defined as the point when either one of the inputs or the output exceed their specified voltage range. Overdrive recovery is the time needed for the amplifier to return to its normal or linear operating point. The recovery time varies, based on whether the input or output is overdriven and by how much the range is exceeded. The CLC1006 will typically recover in less than 25ns from an overdrive condition. Figure 5 shows the CLC1006 in an overdriven condition. 3 5 4 3 Input 2 1 0 -1 -2 Output 0 -1 -2 -3 -4 -3 0 20 40 60 80 100 120 140 160 180 200 -5 1.5 Comlinear CLC1006 Single, 500MHz Voltage Feedback Amplifier 1 0.5 SOT23-5 0 -40 -20 0 20 40 60 80 Ambient Temperature (°C) Figure 3. Maximum Power Derating Driving Capacitive Loads Increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response, and possible unstable behavior. Use a series resistance, RS, between the amplifier and the load to help improve stability and settling performance. Refer to Figure 4. Input + Rf Rg Rs CL RL VIN = 2.5Vpp G=5 2 1 Output Voltage (V) Output Input Voltage (V) Time (ns) Figure 5. Overdrive Recovery Figure 4. Addition of RS for Driving Capacitive Loads Layout Considerations General layout and supply bypassing play major roles in high frequency performance. CaDeKa has evaluation boards to use as a guide for high frequency layout and as aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: • Include 6.8µF and 0.1µF ceramic capacitors for power supply decoupling • Place the 6.8µF capacitor within 0.75 inches of the power pin • Place the 0.1µF capacitor within 0.1 inches of the power pin • Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance • Minimize all trace lengths to reduce series inductances Refer to the evaluation board layouts below for more information. www.cadeka.com Table 1 provides the recommended RS for various capacitive loads. The recommended RS values result in