CLC2550

Data Sheet A m p l i fy t h e H u m a n E x p e r i e n c e ® Comlinear CLC2550, CLC4550 FEATURES n 2mV input offset voltage n 25nA input bias current n ±5nA input offset current n 0.9mA supply current n CMIR includes ground n 200mV output saturation voltage at 4mA n 2V to 36V single supply voltage range n ±1V to ±18V dual supply voltage range n Open collector output n Differential input voltage range equals the power supply voltage n CLC2550: improved replacement for industry standard LM393 n CLC4550: Improved replacement for industry standard LM339 n CLC2550: Pb-free SOIC-8 n CLC4550: Pb-free SOIC-14 APPLICATIONS n Battery charger n Cordless telephone n Switching power supply n DC-DC module n PC motherboard n Communication equipment n Widerange VCO n Squarewave and time delay generators n MOS clock timers n High voltage digital logic gates n Multivibrators Low Power, Low Offset, 2V to 36V Comparators Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators General Description The COMLINEAR CLC2550 (dual) and CLC4550 (quad) are precision voltage comparators with a typical offset of 2mV and high gain (200V/mV). These comparators also offer an input common-mode voltage range that includes ground. The COMLINEAR CLC2550, and CLC4550 operate from a wide supply voltage range of ±1V to ±18V, or from a single supply range of 2V to 36V. These comparators are available in Pb-free, RoHS compliant SOIC-8 and SOIC-14 packages. They operate over the industrial temperature range of -40°C to +85°C. Typical Application - One Shot Multivibrator VCC 1MΩ 100pF +VIN 1MΩ 10kΩ – 1/4 CLCx550A VOUT + 0.001µF 1MΩ Rev 1A Ordering Information Part Number CLC2550ISO8X CLC4550ISO14X Package SOIC-8 SOIC-14 Pb-Free Yes Yes RoHS Compliant Yes Yes Operating Temperature Range -40°C to +85°C -40°C to +85°C Packaging Method Reel Reel Moisture sensitivity level for all parts is MSL-1. ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com Data Sheet CLC2550 Pin Configuration CLC2550 Pin Configuration Pin No. 1 Pin Name OUT1 -IN1 +IN1 -VS +IN2 -IN2 OUT2 +VS Description Output, channel 1 Negative input, channel 1 Positive input, channel 1 OUT1 -IN1 +IN1 -V S 1 2 3 4 8 7 6 5 +VS OUT2 -IN2 +IN2 2 3 4 5 6 7 8 Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators Negative supply Positive input, channel 2 Negative input, channel 2 Output, channel 2 Positive supply CLC4550 Pin Configuration CLC4550 Pin Configuration Pin No. 1 2 OUT1 -IN1 +IN1 +VS +IN2 -IN2 OUT2 1 2 3 4 5 6 7 14 13 12 11 10 9 8 Pin Name OUT1 -IN1 +IN1 +VS +IN2 -IN2 OUT2 OUT3 -IN3 +IN3 -VS +IN4 -IN4 OUT4 Description Output, channel 1 Negative input, channel 1 Positive input, channel 1 Positive supply Positive input, channel 2 Negative input, channel 2 Output, channel 2 Output, channel 3 Negative input, channel 3 Positive input, channel 3 Negative supply Positive input, channel 4 Negative input, channel 4 Output, channel 4 OUT4 -IN4 +IN4 -VS +IN3 -IN3 OUT3 3 4 5 6 7 8 9 10 11 12 13 14 Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 2 Data Sheet Absolute Maximum Ratings The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the operating conditions noted on the tables and plots. Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators Parameter Supply Voltage Differential Input Voltage Input Voltage Input Current (VIN < -0.3V) (1) Output Short Circuit Current to Ground Power Dissipation (TA = 25°C) - SOIC-8 Power Dissipation (TA = 25°C) - SOIC-14 Min 0 -0.3 Continuous Max 40 40 40 50 660 890 Unit V V V mA mW mW Notes: 1. This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than -0.3 VDC (at 25°C). Reliability Information Parameter Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10s) Package Thermal Resistance SOIC-8 SOIC-14 Notes: Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air. Min -65 Typ Max 150 150 260 Unit °C °C °C °C/W °C/W 100 88 Recommended Operating Conditions Parameter Operating Temperature Range Supply Voltage Range Min -40 2 (±1) Typ Max +85 36 (±18) Unit °C V Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 3 Data Sheet Electrical Characteristics TA = 25°C (if bold, TA = -40 to +85°C), Vs = +5V, -Vs = GND unless otherwise noted. Symbol Parameter Conditions Min Typ 2 25 5 Max 5 7 250 400 50 200 Units mV DC Performance VIO Ib IOS CMIR VG Input Offset Voltage Input Bias Current Input Offset Current Common Mode Input Range (3) Voltage Gain VOUT = 1.4V, RS = 0Ω, VS = 5V to 30V VCM = 0V VCM = 0V +VS = 30V +VS = 15V, RL = ≥15kΩ, VOUT = 1V to 11V RL = ∞, +VS = 30V Supply Current, CLC2550 RL = ∞, +VS = 5V IS RL = ∞, +VS = 30V Supply Current, CLC4550 RL = ∞, +VS = 5V 0 50 200 0.7 0.6 1.2 0.9 1.7 3.0 1.0 2.0 2.5 3.0 2.0 3.0 Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators mV nA nA nA nA V V/mV mA mA mA mA mA mA mA mA +VS - 1.5 Time Domain Response tRLS Large Signal Response Time VIN = TTL logic swing, VREF = 1.4V, VRL = 5V, RL = 5.1kΩ VRL = 5V, RL = 5.1kΩ, 5mV overdrive tR Response Time VRL = 5V, RL = 5.1kΩ, 10mV overdrive VRL = 5V, RL = 5.1kΩ, 15mV overdrive 200 1.3 0.9 0.8 6.0 16 0.1 1 200 400 500 ns μs μs μs mA nA μA mV mV Output Characteristics ISINK ILEAK VSAT Output Sink Current Output Leakage Current Saturation Voltage VIN+ = 0V, VIN- = 1V, VOUT = 1.5V VIN+ = 1V, VIN- = 0V, VOUT = 5V VIN+ = 1V, VIN- = 0V, VOUT = 30V VIN+ = 0V, VIN- = 1V, ISINK ≤ 4mA Notes: 1. 100% tested at 25°C 2. Limits over the full temperature range are guaranteed by design. 3. The input common mode voltage of either input signal voltage should be kept > 0.3V at 25°C. The upper end of the common-mode voltage range is +VS - 1.5V at 25°C, but either or both inputs can go to +18V without damages, independent of the magnitude of VS. Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 4 Data Sheet Typical Performance Characteristics TA = 25°C, Vs = +5V, -Vs = GND unless otherwise noted. Supply Current vs. Supply Voltage (CLC2550) 1 0.9 0.8 -40°C Supply Current vs. Supply Voltage (CLC4550) 1.6 1.5 1.4 -40°C Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators Supply Current (mA) Supply Current (mA) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 4 8 12 16 20 24 28 32 25°C 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 0 4 8 12 16 25°C 85°C 85°C Supply Voltage (V) 20 24 28 32 36 Supply Voltage (V) Supply Voltage vs. Input Bias Current (CLC2550) 80 70 Supply Voltage vs. Input Bias Current (CLC4550) 70 60 Input Bias Current (nA) Input Bias Current (nA) 60 -40°C 50 25°C 40 30 20 0 4 8 12 16 20 24 28 32 85°C 50 40 30 20 10 0 0 4 8 12 16 -40°C 25°C 85°C 20 24 28 32 36 Supply Voltage (V) Supply Voltage (V) Output Sink Current vs. Saturation Voltage (CLC2550) Output Sink Current vs. Saturation Voltage (CLC4550) Saturation Voltage (V) 0.1 25°C 85°C Saturation Voltage (V) 1 1 0.1 25°C 0.01 -40°C 0.001 85°C Rev 1A 0.01 -40°C 0.001 0.01 0.1 1 10 0.01 0.1 1 10 Output Sink Current (mA) Output Sink Current (mA) ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 5 Data Sheet Typical Performance Characteristics TA = 25°C, Vs = +5V, -Vs = GND unless otherwise noted. Response Time vs. Input Overdrive - Positive (CLC2550) 0.2 7 Response Time vs. Input Overdrive - Positive (CLC4550) 0.2 7 Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators 0.15 20mV Overdrive 50mV Overdrive Input 5.5 0.15 20mV Overdrive 50mV Overdrive 5.5 Output Voltage (V) Output Voltage (V) Input Voltage (V) 0.1 4 Input Voltage (V) 0.1 4 0.05 5mV Overdrive 10mV Overdrive 2.5 0.05 Input 0 5mV Overdrive 10mV Overdrive 2.5 0 1 1 -0.05 0 0.4 0.8 1.2 1.6 2 -0.5 -0.05 0 0.4 0.8 1.2 1.6 2 -0.5 Time (us) Time (us) Response Time vs. Input Overdrive - Negative (CLC2550) 0.05 Input 0 5.5 7 Response Time vs. Input Overdrive - Negative (CLC4550) 0.05 Input 0 5.5 7 Output Voltage (V) Output Voltage (V) Input Voltage (V) -0.05 10mV Overdrive 20mV Overdrive 50mV Overdrive 4 Input Voltage (V) 5mV Overdrive 5mV Overdrive -0.05 10mV Overdrive 20mV Overdrive 50mV Overdrive -0.15 1 4 -0.1 2.5 -0.1 2.5 -0.15 1 -0.2 0 0.4 0.8 1.2 1.6 2 -0.5 -0.2 0 0.4 0.8 1.2 1.6 2 -0.5 Time (us) Time (us) LS Response Time vs. Input Overdrive - Pos. (CLC2550) 5.5 4.5 3.5 2.5 1.5 0.5 -0.5 0 0.2 0.4 0.6 0.8 1 Input Output 5.5 4.5 LS Response Time vs. Input Overdrive - Pos. (CLC4550) 5.5 4.5 Input 5.5 4.5 Output Voltage (V) Output Voltage (V) Input Voltage (V) Input Voltage (V) 3.5 2.5 1.5 0.5 -0.5 3.5 Output 2.5 1.5 0.5 -0.5 0 0.2 0.4 0.6 0.8 1 3.5 2.5 1.5 0.5 -0.5 Rev 1A Time (us) Time (us) ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 6 Data Sheet Typical Performance Characteristics - Continued TA = 25°C, Vs = +5V, -Vs = GND unless otherwise noted. LS Response Time vs. Input Overdrive - Neg. (CLC2550) 5.5 4.5 3.5 2.5 Input 1.5 0.5 -0.5 0 0.2 0.4 0.6 0.8 1 1.5 0.5 -0.5 5.5 4.5 LS Response Time vs. Input Overdrive - Neg. (CLC4550) 5.5 4.5 5.5 4.5 Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators Output Voltage (V) Output Voltage (V) Input Voltage (V) Output Input Voltage (V) 3.5 2.5 3.5 2.5 Input 1.5 0.5 -0.5 0 0.2 Output 3.5 2.5 1.5 0.5 -0.5 0.4 0.6 0.8 1 Time (us) Time (us) Functional Block Diagram VCC +Input Q1 Q2 Q3 Q4 Output -Input Q7 Q5 Q6 Q8 Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 7 Data Sheet Application Information The CLCx550 series are high gain, wide bandwidth devices which, like most comparators, can easily oscillate if the output lead is inadvertently allowed to capacitively couple to the inputs via stray capacitance. This shows up only during the output voltage transition intervals as the comparator changes states. Power supply bypassing is not required to solve this problem. Standard PC board layout is helpful as it reduces stray input-output coupling. Reducing this input resistors to < 10kΩ reduces the feedback signal levels and finally, adding even a small amount (1 to 10mV) of positive feedback (hysteresis) causes such a rapid transition that oscillations due to stray feedback are not possible. Simply socketing the IC and attaching resistors to the pins will cause input-output oscillations during the small transition intervals unless hysteresis is used. If the input signal is a pulse waveform, with relatively fast rise and fall times, hysteresis is not required. All pins of any unused comparators should be tied to the negative supply. The bias network of the CLCx550 series establishes a drain current which is independent of the magnitude of the power supply voltage over the range of 2V DC to 30V DC. It is usually unnecessary to use a bypass capacitor across the power supply line. The differential input voltage may be larger than V+ without damaging the device. Protection should be provided to prevent the input voltages from going negative more than −0.3V DC (at 25°C). An input clamp diode can be used as shown in the applications section. The output of the CLCx550 series is the uncommitted collector of a grounded-emitter NPN output transistor. Many collectors can be tied together to provide an output OR’ing function. An output pull-up resistor can be connected to any available power supply voltage within the permitted supply voltage range and there is no restriction on this voltage due to the magnitude of the voltage which is applied to the V+ terminal of the CLCx550 package. The output can also be used as a simple SPST switch to ground (when a pull-up resistor is not used). The amount of current which the output device can sink is limited by the drive available (which is independent of V+) and the β of this device. When the maximum current limit is reached (approximately 16 mA), the output transistor will come out of saturation and the output voltage will rise very rapidly. The output saturation voltage is limited by the ap- proximately 60Ω RSAT of the output transistor. The low offset voltage of the output transistor (1 mV) allows the output to clamp essentially to ground level for small load currents. Layout Considerations Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators General layout and supply bypassing play major roles in high frequency performance. CaDeKa has evaluation boards to use as a guide for high frequency layout and as an aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: • Include 6.8µF and 0.1µF ceramic capacitors for power supply decoupling • Place the 6.8µF capacitor within 0.75 inches of the power pin • Place the 0.1µF capacitor within 0.1 inches of the power pin • Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance • Minimize all trace lengths to reduce series inductances Refer to the evaluation board layouts below for more information. Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of these devices: Evaluation Board # CEB006 CEB018 CLC2550 CLC4550 Products Evaluation Board Schematics Evaluation board schematics and layouts are shown in Figures 9-14. These evaluation boards are built for dualsupply operation. Follow these steps to use the board in a single-supply application: 1. Short -Vs to ground. 2. Use C3 and C4, if the -VS pin of the amplifier is not directly connected to the ground plane. Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 8 Data Sheet Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators Figure 11. CEB006 Bottom View Figure 9. CEB006 Schematic Figure 10. CEB006 Top View Rev 1A Figure 12. CEB018 Schematic ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 9 Data Sheet 5V +VIN + 3 100kΩ VOUT 1/4 CLCx550A +VREF Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators – 12 Figure 16. Driving CMOS Figure 13. CEB018 Top View VCC 1MΩ 100pF +VIN 1MΩ 10kΩ – 1/4 CLCx550A VOUT + 0.001µF 1MΩ Figure 17. One Shot Multivibrator Figure 14. CEB018 Bottom View VCC Typical Applications 100kΩ VCC 75pF 3kΩ +VIN 4.3kΩ – 1/4 CLCx550A VOUT 100kΩ VIN 100kΩ VOUT + 1/4 CLCx550 + 100kΩ +VREF – Rev 1A Figure 15. Basic Comparator Figure 18. Squarewave Oscillator ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 10 Data Sheet Mechanical Dimensions SOIC-8 Package Comlinear CLC2550, CLC4550 Low Power, Low Offset, 2V to 36V Comparators SOIC-14 Package Rev 1A For additional information regarding our products, please visit CADEKA at: cadeka.com CADEKA Headquarters Loveland, Colorado T: 970.663.5452 T: 877.663.5452 (toll free) CADEKA, the CADEKA logo design, COMLINEAR, the COMLINEAR logo design, and ARCTIC are trademarks or registered trademarks of CADEKA Microcircuits LLC. All other brand and product names may be trademarks of their respective companies. CADEKA reserves the right to make changes to any products and services herein at any time without notice. CADEKA does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by CADEKA; nor does the purchase, lease, or use of a product or service from CADEKA convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of CADEKA or of third parties. Copyright ©2007-2009 by CADEKA Microcircuits LLC. All rights reserved. A m p l i fy t h e H u m a n E x p e r i e n c e