CMPWR130

CALIFORNIA MICRO DEVICES CMPWR130 300mA SmartORTM Regulator with VAUX Drive Features • Automatic detection of V CC input supply • Glitch-free output during supply transitions • Built-in hysteresis during supply selection • 300mA output maximum load current • Overload current protection • Short circuit current protection • Operates from either VCC or VOUT • 8-pin SOIC package Applications • PCI adapter cards • Network Interface Cards (NIC’s) • Dual power systems • Systems with standby capabilities Product Description The SmartORTM CMPWR130 is a low dropout regulator that delivers up to 300mA of load current at a fixed 3.3V output. An internal threshold level (TYP 4.1V) is used to prevent the regulator from being operated below dropout voltage. The device continuously monitors the input supply and will automatically disable the regulator when VCC falls below the threshold level. When the regulator is disabled, the control signal “Drive” (Active Low) is enabled, which allows an external PMOS switch to power the load from an auxiliary 3.3V supply. When VCC is restored to a level above the select threshold, the control signal for the external PMOS switch is disabled and the regulator is once again enabled. All the necessary control circuitry needed to provide a smooth and automatic transition between the supplies has been incorporated. This allows VCC to be dynamically switched without loss of output voltage. PIN DIAG RAM AND APPLI C ATI O N C IR CU I T MGSF1PO2ELT1 Top View VCC NC NC GND 1 2 3 4 8 7 6 5 DRIVE VOUT VOUT NC VCC 5V + – VAUX 3.3V GND CIN 1µF CMPWR130 VCC + DRIVE VOUT GND + VOUT 3.3V 300mA COUT 4µF GND + – CMPWR130 8-Pin SOIC Pin Diagram Typical Application Circuit S TANDARD PART O RDERIN G I NF O RMATI ON Packa g e Pins 8 Style SOIC Orderin g Part Numbe r Tubes Tape & Reel CMPWR130S/T CMPWR130S/R Part Marking CMPWR130S C1670101 © 2001 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corp 215 Topaz Street, Milpitas, California 95035  3/5/2001 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com 1 CALIFORNIA MICRO DEVICES AB SO L U TE MAXIM U M RATIN GS Parameter ESD Protection (HBM) VCC, VOUT Voltages Drive Logic Voltage Temperature: Storage Operating Ambient Operating Junction Power Dissipation (Note 1) Rating 2000 6.0, GND – 0.5 V CC + 0 .5, GND – 0.5 – 40 to 150 0 to 70 0 to 125 0 .6 Unit V V V ˚C ˚C ˚C W CMPWR130 O PERATIN G C O NDITI O N S Parameter VCC Temperature (Ambient) Load Current CEXT Range 5 ± 0.5 0 to 70 0 to 300 4.7 ± 20% Unit V ˚C mA µF ELE C TRI C AL O PERATIN G C HARAC TERI S TI CS (over operatin g c onditions unless specified otherwise ) S y mbol VOUT VCCSEL VCCDES VCCHYST IS/C IRCC VR LOAD VR LINE ICC Pa r a m e t e r Regulator Output Voltage Select Voltage Deselect Voltage Hysteresis Voltage Short Circuit Output Current VCC Pin Reverse Leakage Load Regulation Line Regulation Quiescent Supply Current C onditions 0mA < ILOAD < 300mA Regulator Enabled Regulator Disabled Hysteresis (Note 2) VCC = 5V, VOUT = 0V VOUT = 3.3V, VCC = 0V VCC = 5V, ILOAD = 30 to 300mA VCC = 4.5V to 5.5V, ILOAD = 5mA VCC > VCCSEL, ILOAD = 0mA VCCDES > VCC > VOUT VOUT > VCC IGND Ground Current (Note 3) VCCSEL > VCC (Regulator Disabled) VCC = 5V, ILOAD = 5mA VCC = 5V, ILOAD = 300mA ROH ROL Drive Pull-up Resistance Drive Pull-down Resistance RPULLUP to VCC, VCC > VCCSEL RPULLDOWN to GND, VCCDES > VCC 310 2 50 50 0.6 0.2 0.01 0.2 0.6 0.7 4.0 0.1 0.02 0.4 0.8 1.4 8.0 0.4 0.8 50 3.90 MIN 3.10 TYP 3.30 4.30 4.10 0.20 MAX 3.50 4.45 U NI T V V V V mA µA mV mV mA mA mA mA mA mA kΩ kΩ Note 1: The power rating is based on a printed circuit board heat spreading capability equivalent to 2 square inches of copper connected to the GND pins. Typical multilayer boards using power plane construction will provide this heat spreading ability without the need for additional dedicated copper area. (Please consult with factory for thermal evaluation assistance.) Note 2: The hysteresis defines the maximum level of acceptable disturbance on VCC during switching. It is recommended that the VCC source impedance be kept below 0.25Ω to ensure the switching disturbance remains below the hysteresis during select/deselect transitions. An input capacitor may be required to help minimize the switching transient. Note 3: Ground pin current consists of controller current (0.15mA) and regulator current if enabled. The controller always draws 0.15mA from either VCC or VOUT, whichever is greater. All regulator current is supplied exclusively from VCC. At high load currents a small increase occurs due to current limit protection circuitry. © 2001 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corp 2 215 Topaz Street, Milpitas, California 95035  Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com 3/5/2001 CALIFORNIA MICRO DEVICES Interface Signals VCC is the power source for the internal regulator and is monitored continuously by an internal controller circuit. Whenever VCC exceeds VCCSEL (4.30V TYP), the internal regulator (300mA MAX) will be enabled and deliver a fixed 3.3V at VOUT. When VCC falls below VCCDES (4.10V TYP) the regulator will be disabled. Internal loading on this pin is typically 0.6mA when the regulator is enabled, which reduces to 0.2mA whenever the regulator is disabled. If VCC falls below the voltage on the VOUT pin the VCC loading will further reduce to only a few microamperes. During a VCC power up sequence, there will be an effective step increase in VCC line current when the regulator is enabled. The amplitude of this step increase will depend on the DC load current and any necessary current required for charging/discharging the load capacitance. This line current transient will cause a voltage disturbance at the VCC pin. The magnitude of the disturbance will be directly proportional to the effective power supply source impedance being delivered to the VCC input. To prevent chatter during Select and Deselect transitions, a built-in hysteresis voltage of 200mV has been incorporated. It is recommended that the power supply connected to the VCC input should have a source resistance of less than 0.25Ω to minimize the event of chatter during the enabling/disabling of the regulator. An input filter capacitor in close proximity to the VCC pin will reduce the effective source impedance and help minimize any disturbances. If the VCC pin is within a few inches of the main input filter, a capacitor may not be CMPWR130 necessary. Otherwise an input filter capacitor in the range of 1µF to 10µF will ensure adequate filtering. GND is the negative reference for all voltages. This current that flows in the ground connection is very low (TYP 550µA) and has minimal variation over all load conditions. VOUT is the regulator output voltage connection used to power the load. An output capacitor of 4.7µF is used to provide the necessary phase compensation, thereby preventing oscillation. The capacitor also helps to minimize the peak output disturbance during power supply changeover. When VCC falls below VOUT, then VOUT will be used to provide the necessary quiescent current for the internal reference circuits. This ensures excellent start-up characteristics for the regulator. DRIVE is an active LOW logic output intended to be used as the control signal for driving an external PFET whenever the regulator is disabled. This will allow the voltage at VOUT to be powered from an auxiliary supply voltage (3.3V). The Drive pin is pulled HIGH to VCC whenever the regulator is enabled, this ensures the auxiliary remains isolated during normal regulator operation. The output current sinking ability of this logic signal is equivalent to a 100W resistor. The current sourcing ability is equivalent to a 4kΩ resistor. NC pins are electrically isolated from the internal circuitry. These pins can be connected to any external voltage level without impacting the device functionality. PIN F U N C TI O N S Pin 1 6, 7 8 4 2, 3, 5 Symbol VCC VOUT DRIVE GND NC Description Positive (5V) supply input for regulator. (VCC > VCCSEL) Continuous output voltage (3.3V) is derived from either the internal regulator or low impedance switch connected to the auxiliary supply input. Output drive signal to control external MOSFET switch Negative reference for all voltages Unconnected pin which is electrically isolated from internal circuitry. VCC DRIVE + – VDESELECT 4.1V GND VREF 3.3V + – ENABLE VOUT 3.3V 300mA Simplified Electrical Schematic © 2001 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corp 215 Topaz Street, Milpitas, California 95035  3/5/2001 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com 3 CALIFORNIA MICRO DEVICES Typical DC Characteristics (nominal conditions unless specified otherwise) 600 500 660 640 CMPWR130 Supply Current (µA) Ground Current (µA) VAUX = 3.3V 620 600 580 560 540 520 400 300 200 100 0 0 1.0 2.0 3.0 VCC (V) 4.0 5.0 6.0 VAUX = 0V 0 100 200 Load Current (mA) 300 Figure 1. Supply Current vs Voltage (VAUX = 3.3V) 3.40 Figure 2. Ground Current vs Output Load 3.35 3.35 3.30 5mA Load VOUT (V) VOUT (V) 300mA Load 3.25 3.30 3.25 3.20 3.20 0 100 200 300 400 3.15 3.5 4.0 VCC (V) 4.5 5.0 Load Current (mA) Figure 3. Load Regulation Figure 4. Line Regulation © 2001 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corp 4 215 Topaz Street, Milpitas, California 95035  Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com 3/5/2001 CALIFORNIA MICRO DEVICES Typical Transient Characteristics (Supply source resistance set to 0.2Ω) Tek Run: 50kS/s Drive Sample Tek 50kS/s Drive 1 Acqs CMPWR130 VCC VCC VOUT (300mA Load) VOUT (300mA Load) 2 Ch1 Ch3 2 1V 5V Ch2 1V M 1ms Ch2 3.06V Ch1 Ch3 1V 5V Ch2 1V M 1ms Ch2 3.06V Figure 5. VCC Cold Start Power UP (VAUX = 0V) Tek 2.5MS/s Drive 3 VCC (offset = 4.2V) 5 Acqs Figure 6. VCC Complete Power Down (VAUX = 0V) Teck Run: 2.5MS/s Drive 3 Sample VCC (offset = 4.2V) 1 VOUT (offset = 3.3V) (300mA Load) 1 VOUT (offset = 3.3V) (300mA Load) Ch1 100mV Ch3 5V 2V M 10µs Ch3 2.32V Ch1 100mV Ch3 5V 100mV M 20µs Ch3 2.1V Figure 7. VCC Power UP (VAUX = 3.3V) Tek 5MS/s 3 Acqs Figure 8. VCC Power Down (VAUX = 3.3V) Tek 500kS/s 2 Acqs 5.5V 275mA 2 Load 25mA VOUT (offset = 3.3V) VOUT (offset = 3.3V) 2 VCC 4.5V 1 Ch1 100mV Ch2 2V M 10µs Ch2 2.32V Ch1 20mV Figure 9. Load Transient (10% to 90%) Step Response 215 Topaz Street, Milpitas, California 95035  3/5/2001 Ch2 500mV M 100µs Ch2 5V Figure 10. Line Transient (1Vpp) Step Response Fax: (408) 263-7846 www.calmicro.com © 2001 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corp Tel: (408) 263-3214 5 CALIFORNIA MICRO DEVICES Typical Thermal Characteristics The overall junction to ambient thermal resistance (θJA) for device power dissipation (PD) consists primarily of two paths in series. The first path is the junction to the case (θJC) which is defined by the package style, and the second path is case to ambient (θCA) thermal resistance which is dependent on board layout. The final operating junction temperature for any set of conditions can be estimated by the following thermal equation: TJUNC = TAMB + PD (θJC ) + PD (θCA ) = TAMB + PD (θJA) The CMPWR130 uses a standard SOIC package. When this package is mounted on a double sided printed circuit board with two square inches of copper allocated for “heat spreading”, the resulting overall θJA is 85°C/W. Based on maximum power dissipation of 0.51W (1.7V x 300mA) with an ambient of 70°C the resulting junction temperature will be: TJUNC = TAMB + PD (θJA ) = 70°C + 0.51W (85°C/W) = 70°C + 43°C = 113°C Thermal characteristics were measured using a double sided board with two square inches of copper area connected to the GND pins for “heat spreading”. Measurements showing performance up to junction temperature of 125°C were performed under light load conditions (5mA). This allows the ambient temperature to be representative of the internal junction temperature. Note: The use of multi-layer board construction with power planes will further enhance the thermal performance of the package. In the event of no copper area being dedicated for heat spreading, a multi-layer board construction, using only the minimum size pad layout, will typically provide the CMPWR130 with an overall θJA of 100°C/W, which allows up to 0.55W to be safely dissipated. Threshold (V) 4.3 4.2 VDESELECT 4.1 4.0 3.9 25 3.26 3.34 CMPWR130 3.32 VOUT (V) 3.30 3.28 3.24 25 35 45 55 65 75 Ambient Temperature (˚C) Figure 11. Regulator VOUT vs TAMB (300mA Load) 4.5 4.4 VSELECT 50 75 100 125 Junction Temperature (°C) Figure 12. Select and Deselect Threshold vs TJUNC © 2001 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corp 6 215 Topaz Street, Milpitas, California 95035  Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com 3/5/2001