CTLDM8002A-M621

CTLDM8002A-M621 SURFACE MOUNT P-CHANNEL ENHANCEMENT-MODE SILICON MOSFET w w w. c e n t r a l s e m i . c o m DESCRIPTION: The CENTRAL SEMICONDUCTOR CTLDM8002A-M621 is a Silicon P-Channel Enhancement-mode MOSFET in a small, thermally efficient, TLM™ 2x1mm package. MARKING CODE: CN FEATURES: TLM621 CASE APPLICATIONS: • Load/Power Switches • Power Supply Converter Circuits • Battery Powered Portable Equipment MAXIMUM RATINGS: (TA=25°C) Drain-Source Voltage Drain-Gate Voltage Gate-Source Voltage Continuous Drain Current Continuous Source Current (Body Diode) Maximum Pulsed Drain Current Maximum Pulsed Source Current Power Dissipation (Note 1) Operating and Storage Junction Temperature Thermal Resistance (Note 1) • • • • • • Low rDS(on) Low VDS(on) Low Threshold Voltage Fast Switching Logic Level Compatible Small TLM™ 2x1mm Package UNITS V V V mA mA A A W °C °C/W SYMBOL VDS VDG VGS ID IS IDM ISM PD TJ, Tstg ΘJA otherwise noted) MIN 50 50 20 280 280 1.5 1.5 0.9 -65 to +150 139 ELECTRICAL CHARACTERISTICS: (TA=25°C unless SYMBOL TEST CONDITIONS IGSSF, IGSSR VGS=20V, VDS=0 IDSS VDS=50V, VGS=0 IDSS VDS=50V, VGS=0, TJ=125°C ID(ON) VGS=10V, VDS=10V BVDSS VGS=0, ID=10μA VGS(th) VDS=VGS, ID=250μA VDS(ON) VGS=10V, ID=500mA VDS(ON) VGS=5.0V, ID=50mA VSD VGS=0, IS=115mA rDS(ON) VGS=10V, ID=500mA rDS(ON) VGS=10V, ID=500mA, TJ=125°C rDS(ON) VGS=5.0V, ID=50mA rDS(ON) VGS=5.0V, ID=50mA, TJ=125°C gFS VDS=10V, ID=200mA MAX 100 1.0 500 500 50 1.0 2.5 1.5 0.15 1.3 2.5 4.0 3.0 5.0 UNITS nA μA μA mA V V V V V Ω Ω Ω Ω mS 200 Notes: (1) FR-4 Epoxy PCB with copper mounting pad area of 33mm2. R1 (17-February 2010) CTLDM8002A-M621 SURFACE MOUNT P-CHANNEL ENHANCEMENT-MODE SILICON MOSFET ELECTRICAL CHARACTERISTICS - Continued: (TA=25°C unless otherwise noted) SYMBOL TEST CONDITIONS MIN MAX Crss VDS=25V, VGS=0, f=1.0MHz 7.0 Ciss VDS=25V, VGS=0, f=1.0MHz 70 Coss VDS=25V, VGS=0, f=1.0MHz 15 ton, toff VDD=30V, VGS=10V, ID=200mA, RG=25Ω, RL=150Ω 20 UNITS pF pF pF ns TLM621 CASE - MECHANICAL OUTLINE SUGGESTED MOUNTING PADS (Dimensions in mm) *Exposed pad P connects pins 1, 2, 5, and 6 R0 PIN CONFIGURATION LEAD CODE: 1) Drain 2) Drain 3) Gate 4) Source 5) Drain 6) Drain MARKING CODE: CN R1 (17-February 2010) w w w. c e n t r a l s e m i . c o m