CEB04N7G

N-Channel Enhancement Mode Field Effect Transistor FEATURES Type CEP04N7G CEB04N7G CEF04N7G VDSS 700V 700V 700V RDS(ON) 3.3Ω 3.3Ω 3.3Ω ID 4A 4A 4A d @VGS 10V 10V 10V CEP04N7G/CEB04N7G CEF04N7G Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. D D G G D S G CEP SERIES TO-220 S CEB SERIES TO-263(DD-PAK) G D S CEF SERIES TO-220F S ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Tc = 25 C unless otherwise noted Limit Symbol TO-220/263 VDS VGS ID IDM PD TJ,Tstg e TO-220F Units V V 700 ±30 4 16 84 0.67 -55 to 150 4 d d A A W W/ C C 16 35 0.28 Maximum Power Dissipation @ TC = 25 C - Derate above 25 C Operating and Store Temperature Range Thermal Characteristics Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Symbol RθJC RθJA 1.5 62.5 Limit 3.6 65 Units C/W C/W Details are subject to change without notice . 1 Rev 3. 2009.July http://www.cetsemi.com Electrical Characteristics Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics b Gate Threshold Voltage Static Drain-Source On-Resistance Dynamic Characteristics c Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics c Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage b CEP04N7G/CEB04N7G CEF04N7G Tc = 25 C unless otherwise noted Symbol BVDSS IDSS IGSSF IGSSR VGS(th) RDS(on) Test Condition VGS = 0V, ID = 250µA VDS = 700V, VGS = 0V VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VGS = VDS, ID = 250µA VGS = 10V, ID = 2A 2 2.5 Min 700 25 100 -100 4 3.3 Typ Max Units V µA 4 nA nA V Ω gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS VSD VDS = 40V, ID = 1A VDS = 25V, VGS = 0V, f = 1.0 MHz 2 595 80 20 18 17 40.5 19 14 3 6 2.5 36 34 81 38 18.2 S pF pF pF ns ns ns ns nC nC nC A V VDD = 300V, ID = 4A, VGS = 10V, RGEN = 25Ω VDS = 480V, ID = 4A, VGS = 10V Drain-Source Diode Characteristics and Maximun Ratings VGS = 0V, IS = 2.5A 1.5 Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature . b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2% . c.Guaranteed by design, not subject to production testing. d.Limited only by maximum temperature allowed . e.Pulse width limited by safe operating area . 2 CEP04N7G/CEB04N7G CEF04N7G 6 9 VGS=10,8,7V 7.5 6 4.5 3 25 C 1.5 0 TJ=125C -55 C 4 5 6 ID, Drain Current (A) 4 3 2 VGS=4V 1 0 0.0 ID, Drain Current (A) 5 5 10 15 20 25 30 1 2 3 VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics 1200 1000 800 600 400 200 0 Coss Crss 0 5 10 15 20 25 Ciss 2.2 1.9 1.6 1.3 1.0 0.7 0.4 -100 VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics ID=2A VGS=10V RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) C, Capacitance (pF) -50 0 50 100 150 200 VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 VDS=VGS TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature VGS=0V 10 1 VTH, Normalized Gate-Source Threshold Voltage IS, Source-drain current (A) ID=250µA 10 0 -25 0 25 50 75 100 125 150 10-1 0.4 0.7 1.0 1.3 1.7 2.0 TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current 3 CEP04N7G/CEB04N7G CEF04N7G VGS, Gate to Source Voltage (V) 10 8 6 4 2 0 VDS=480V ID=4A 10 2 ID, Drain Current (A) 4 10 1 RDS(ON)Limit 1ms 10ms 100ms DC 10 0 0 3 6 9 12 15 10 -1 TC=25 C TJ=175 C Single Pulse 10 0 10 1 10 2 10 3 Qg, Total Gate Charge (nC) Figure 7. Gate Charge VDD t on V IN VGS RGEN G RL D VOUT td(on) VOUT 10% VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area toff tr 90% td(off) 90% 10% tf INVERTED 90% S VIN 50% 10% 50% PULSE WIDTH Figure 9. Switching Test Circuit Figure 10. Switching Waveforms 10 0 r(t),Normalized Effective Transient Thermal Impedance D=0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 10 -1 10 -2 Single Pulse 10 -3 1. RθJC (t)=r (t) * RθJC 2. RθJC=See Datasheet 3. TJM-TC = P* RθJC (t) 4. Duty Cycle, D=t1/t2 -5 10 10 -4 10 -3 10 -2 10 -1 10 0 10 1 Square Wave Pulse Duration (sec) Figure 11. Normalized Thermal Transient Impedance Curve 4