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CEFF630

CEFF630

  • 厂商:

    CET(华瑞)

  • 封装:

  • 描述:

    CEFF630 - N-Channel Enhancement Mode Field Effect Transistor - Chino-Excel Technology

  • 数据手册
  • 价格&库存
CEFF630 数据手册
N-Channel Enhancement Mode Field Effect Transistor FEATURES Type CEPF630 CEBF630 CEFF630 VDSS 200V 200V 200V RDS(ON) 0.35Ω 0.35Ω 0.35Ω ID 10A 10A 10A d @VGS 10V 10V 10V CEPF630/CEBF630 CEFF630 Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. D D G G D S G CEP SERIES TO-220 S CEB SERIES TO-263(DD-PAK) G D S CEF SERIES TO-220F S ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Tc = 25 C unless otherwise noted Limit Symbol TO-220/263 VDS VGS ID IDM PD TJ,Tstg e TO-220F Units V V 200 ±20 10 40 75 0.6 -55 to 150 10 40 33 0.27 d d A A W W/ C C Maximum Power Dissipation @ TC = 25 C - Derate above 25 C Operating and Store Temperature Range Thermal Characteristics Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Symbol RθJC RθJA 1.5 62.5 Limit 3.7 65 Units C/W C/W Details are subject to change without notice . 1 Rev 2. 2007.March http://www.cetsemi.com CEPF630/CEBF630 CEFF630 Electrical Characteristics Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics b Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics c Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage b td(on) tr td(off) tf Qg Qgs Qgd IS VSD VGS = 0V, IS = 10A VDS = 160V, ID =5.9A, VGS = 10V VDD = 100V, ID = 5A, VGS = 10V, RGEN = 50Ω 50 80 55 40 27 4 14.7 10 1.5 100 160 110 80 54 ns ns ns ns nC nC nC A V c Tc = 25 C unless otherwise noted Symbol BVDSS IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss Test Condition VGS = 0V, ID = 250µA VDS = 160V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V VGS = VDS, ID = 250µA VGS = 10V, ID = 5A VDS = 10V, ID = 5A 6 680 105 40 2 Min 200 25 100 -100 4 350 Typ Max Units V µA 4 nA nA V mΩ S pF pF pF VDS = 25V, VGS = 0V, f = 1.0 MHz Drain-Source Diode Characteristics and Maximun Ratings Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature . b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2% . c.Guaranteed by design, not subject to production testing. d.Limited only by maximum temperature allowed . e.Pulse width limited by safe operating area . f.Full package IS(max) = 6.4A . g.Full package VSD test condition IS = 6.4A . 4 - 191 CEPF630/CEBF630 CEFF630 12 10 8 VGS=10,8,6,5V 6 4 2 0 20 25 C ID, Drain Current (A) ID, Drain Current (A) 15 10 -55 C 5 TJ=125 C VGS=4V 0 1 2 3 4 5 6 0 0 1 2 3 4 5 VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics 900 750 600 450 300 150 0 Coss Crss 0 5 10 15 20 25 Ciss 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -100 VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics ID=5A VGS=10V RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) C, Capacitance (pF) -50 0 50 100 150 200 VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 VDS=VGS TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature VGS=0V 1 VTH, Normalized Gate-Source Threshold Voltage IS, Source-drain current (A) ID=250µA 10 10 0 -25 0 25 50 75 100 125 150 10 -1 0.4 0.6 0.8 1.0 1.2 1.4 TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current 4 - 192 CEPF630/CEBF630 CEFF630 VGS, Gate to Source Voltage (V) 10 8 6 4 2 0 VDS=160V ID=5.9A 10 2 ID, Drain Current (A) RDS(ON)Limit 10 1 10ms 100ms 1ms 10ms DC 4 10 0 4 8 12 16 20 24 28 0 TC=25 C TJ=150 C Single Pulse 10 0 10 1 10 2 Qg, Total Gate Charge (nC) Figure 7. Gate Charge VDD t on V IN VGS RGEN G RL D VOUT td(on) VOUT 10% VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area toff tr 90% td(off) 90% 10% tf INVERTED 90% S VIN 50% 10% 50% PULSE WIDTH Figure 9. Switching Test Circuit Figure 10. Switching Waveforms r(t),Normalized Effective Transient Thermal Impedance 10 0 D=0.5 0.2 10 -1 0.1 0.05 0.02 0.01 Single Pulse PDM t1 t2 10 -2 1. RθJC (t)=r (t) * RθJC 2. RθJC=See Datasheet 3. TJM-TC = P* RθJC (t) 4. Duty Cycle, D=t1/t2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 Square Wave Pulse Duration (sec) Figure 11. Normalized Thermal Transient Impedance Curve 4 - 193
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