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CEM9407A_10

CEM9407A_10

  • 厂商:

    CET(华瑞)

  • 封装:

  • 描述:

    CEM9407A_10 - P-Channel Enhancement Mode Field Effect Transistor - Chino-Excel Technology

  • 数据手册
  • 价格&库存
CEM9407A_10 数据手册
P-Channel Enhancement Mode Field Effect Transistor FEATURES -60V, -3.7A, RDS(ON) = 125mΩ @VGS = -10V. RDS(ON) = 165mΩ @VGS = -4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. Surface mount Package. CEM9407A PRELIMINARY 5 D 8 D 7 D 6 D 5 SO-8 1 1 S 2 S 3 S 4 G ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a TA = 25 C unless otherwise noted Symbol Limit VDS VGS ID IDM PD TJ,Tstg -60 Units V V A A W C ±20 -3.7 -14.8 2.5 -55 to 150 Maximum Power Dissipation Operating and Store Temperature Range Thermal Characteristics Parameter Thermal Resistance, Junction-to-Ambient b Symbol RθJA Limit 50 Units C/W Specification and data are subject to change without notice . 1 Rev 4. 2010.Mar. http://www.cetsemi.com CEM9407A P-Channel Electrical Characteristics Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics c Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics d Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current b Drain-Source Diode Forward Voltage c td(on) tr td(off) tf Qg Qgs Qgd IS VSD VGS = 0V, IS = -1.3A VDS = -30V, ID = -3.7A, VGS = -10V VDD = -30V, ID = -1A, VGS = -10V, RGEN = 6Ω 11 4.5 50 15 17 2 4 -1.3 -1.2 22 9 100 30 22 ns ns ns ns nC nC nC A V d TA = 25 C unless otherwise noted Test Condition VGS = 0V, ID = -250µA VDS = -48V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V VGS = VDS, ID = -250µA VGS = -10V, ID = -3.7A VGS = -4.5V, ID = -3.1A VDS = -5V, ID = -3.7A -1 100 130 7 615 140 45 Min -60 -1 100 -100 -3 125 165 Typ Max Units V µA Symbol BVDSS IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss nA nA V mΩ mΩ S pF pF pF VDS = -30V, VGS = 0V, f = 1.0 MHz Drain-Source Diode Characteristics and Maximun Ratings Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 10 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing. 2 CEM9407A 15 -VGS=10,6,5,4.5,4V 15 -ID, Drain Current (A) -ID, Drain Current (A) 12 -VGS=3.5V 9 6 3 0 12 25 C 9 6 3 TJ=125 C -55 C 2 3 4 5 0 5 -VGS=3.0V 0 1 2 3 4 5 0 1 -VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics 1200 1000 800 600 400 200 0 Coss Crss 0 6 12 18 24 30 Ciss 2.2 1.9 1.6 1.3 1.0 0.7 0.4 -100 -VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics ID=-3.7A VGS=-10V RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) C, Capacitance (pF) -50 0 50 100 150 200 -VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 VDS=VGS TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature -IS, Source-drain current (A) VGS=0V 10 1 VTH, Normalized Gate-Source Threshold Voltage ID=-250µA 10 0 -25 0 25 50 75 100 125 150 10 -1 0.4 0.6 0.8 1.0 1.2 1.4 TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature -VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current 3 CEM9407A -VGS, Gate to Source Voltage (V) 10 V =-30V DS ID=-3.7A 10 2 -ID, Drain Current (A) 8 6 4 2 0 10 1 RDS(ON)Limit 1ms 10ms 100ms 1s 10s DC 10 0 10 -1 0 6 12 18 24 10 -2 TA=25 C TJ=150 C Single Pulse -1 10 10 0 10 1 10 2 Qg, Total Gate Charge (nC) Figure 7. Gate Charge VDD t on V IN VGS RGEN G RL D VOUT td(on) VOUT -VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area toff tr 90% td(off) 90% 10% tf 10% INVERTED 90% S VIN 50% 10% 50% PULSE WIDTH Figure 9. Switching Test Circuit Figure 10. Switching Waveforms 10 0 r(t),Normalized Effective Transient Thermal Impedance D=0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 10 -1 10 -2 Single Pulse 10 -3 1. RθJA (t)=r (t) * RθJA 2. RθJA=See Datasheet 3. TJM-TA = P* RθJA (t) 4. Duty Cycle, D=t1/t2 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 Square Wave Pulse Duration (sec) Figure 11. Normalized Thermal Transient Impedance Curve 4
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