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CS3524AGDW16

CS3524AGDW16

  • 厂商:

    CHERRY

  • 封装:

  • 描述:

    CS3524AGDW16 - Voltage Mode PWM Control Circuit with 200mA Output Drivers - Cherry Semiconductor Cor...

  • 数据手册
  • 价格&库存
CS3524AGDW16 数据手册
CS3524A CS3524A Voltage Mode PWM Control Circuit with 200mA Output Drivers Description The CS3524A PWM control circuit retains the same versatile architecture of the industry standard CS3524 (SG3524) while adding substantial improvements. The CS3524 is pin-compatible with “non-A” versions, and in most applications can be directly interchanged. The CS3524A, however, eliminates many of the design restrictions which had previously required additional external circuitry. The CS3524A includes a precision 5V reference trimmed to ±1% accuracy (eliminating the need for potentiometer adjustments), an error amplifier with an output voltage swing extending to 5V, and a current sense amplifier useful in either the ground or power supply output lines. The uncommitted 60V, 200mA NPN output pair greatly enhances the output drive capability. The CS3524A features an undervoltage lockout circuit which disables all internal circuitry (except the reference) until the input voltage has risen to 8V. This holds standby current low until turnon, and greatly simplifies the design of low power, off-line supplies. The turnon circuit has approximately 600mV of hysteresis for jitter free activation. Other improvements include a PWM latch that insures freedom from multiple pulsing within a period, even in noisy environments; logic to eliminate double pulsing on a single output, a 200ns external shutdown capability, and automatic thermal protection from excessive chip temperature. The oscillator circuit is usable to 500kHz and is easier to synchronize with an external clock pulse. Features s Precision Reference Internally Trimmed to ±1% s Current Limit s Undervoltage Lockout s Start-up Supply Current < 4mA s Output to 200mA s 60V Output Capability s Wide Common-mode Input Range for Error and Current Limit Amplifiers s PWM Latch Insures Single Pulse per Period s Double Pulse Suppression s 200ns Shutdown s Guaranteed Frequency s Thermal Shutdown Block Diagram V IN 5V Reference Regulator Power to Internal Circuitry T V REF Package Options 16 Lead PDIP & SO Wide EA- 1 EA+ 2 16 15 14 13 12 11 10 9 SYNC UV Sense CLOCK V OUTA Flip Flop EA RT OSC CT RAMP VREF VIN EB VOUTB VOUTA EA SHUTDOWN COMP + COMP S S R V OUTB PWM Latch EB SYNC 3 ISENSE+ 4 ISENSERT 5 6 7 COMP V IN EAEA+ 200mV I SENSE + CL I SENSE - EA + V IN 1k Ω 10k Ω SHUTDOWN CT Gnd Gnd 8 Cherry Semiconductor Corporation 2000 South County Trail, East Greenwich, RI 02818 Tel: (401)885-3600 Fax: (401)885-5786 Email: info@cherry-semi.com Web Site: www.cherry-semi.com Rev. 10/28/96 1 A ® Company CS3524A Absolute Maximum Ratings Supply Voltage (VIN) .................................................................................................................................................................40V Collector Supply Voltage (VCC) ...............................................................................................................................................60V Output Current (Each Output)...........................................................................................................................................200mA Reference Output Current.....................................................................................................................................................50mA Oscillator Charging Current ..................................................................................................................................................5mA Power Dissipation at TA=25˚C.........................................................................................................................................1000mW Power Dissipation at TJ=+25˚C........................................................................................................................................2000mW Derate for Case Temperature above +25˚C........................................................................................................16mW/˚C Storage Temperature Range ................................................................................................................................-65˚C to +150˚C Lead Temperature Soldering: Wave Solder (through hole styles only)..........................................10 sec. max, 260°C peak Reflow (SMD styles only) ......................................................................................60 sec. max above 183°C, 230°C peak Electrical Characteristics: 0˚C ≤ TA ≤ +70˚C for the CS3524A; VIN = VCC = 20V; unless otherwise stated. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT s Turn-on Characteristics Input Voltage Turn-on Threshold Turn-on Current Operating Current Turn-on Hysteresis* s Reference Section Output Voltage Line Regulation Load Regulation Temperature Stability* Short Circuit Current Output Noise Voltage* Long Term Stability* TA = 25˚C VIN = 10 to 40V IL = 0 to 20mA Over Operating Range VREF = 0, TA = 25˚C 10Hz ≤ f ≤ 10kHz, TA = 25˚C TA = 125˚C; 1000 Hrs. 4.90 5.00 10 20 20 80 40 20 50 5.20 30 50 50 100 V mV mA mV mA µVrms mV VIN Turn-on - 100mV VIN = 8 to 40V Operating range after Turn-on 8 5.5 7.5 2.5 5 0.6 40 8.5 4.0 10 V V mA mA V s Oscillator Section (Unless otherwise specified, RT = 2700Ω, CT = 0.01µF) Initial Accuracy Temperature Stability* Minimum Frequency Maximum Frequency Output Amplitude* Output Pulse Width* Ramp Peak Ramp Valley s Error Amplifier Section (Unless otherwise specified, VCM = 2.5V) Input Offset Voltage Input Bias Current Input Offset Current Common Mode Rejection Ratio Output Swing VCM = 1.5 to 5.5V Minimum Total Range 2 60 50 0.5 2 1 0.5 75 60 5.0 10 10 1.0 mV µA µA dB dB V TA = 25˚C Over Operating Temperature Range RT = 150kΩ, CT = 0.1µF RT = 2.0kΩ, CT = 470pF TA = 25˚C TA = 25˚C 3.3 0.7 500 3.5 0.5 3.5 0.9 3.7 1.0 39 43 1 47 2 120 kHz % Hz kHz V µs V V Power Supply Rejection Ratio VIN = 10 to 40V * These parameters are guaranteed by design but not 100% tested in production. CS3524A Electrical Characteristics: continued PARAMETER TEST CONDITIONS MIN TYP MAX UNIT s Error Amplifier Section (Unless otherwise specified, VCM = 2.5V): continued Open Loop Voltage Gain Gain-Bandwidth* ∆VOUT = 1 to 4V, RL ≥ 10 MΩ TA = 25˚C, AV = 0dB 60 80 3 dB MHz s Current Limit Amplifier (Unless otherwise specified, VSENSE = VO) Input Offset Voltage Input Offset Voltage Input Bias Current Common Mode Rejection Ratio Output Swing Open Loop Voltage Gain Delay Time* s Output Section (Each Output) Collector Emitter Voltage Collector Leakage Current Saturation Emitter Output Voltage Rise Time* Fall Time* Comparator Delay* Shutdown Delay* Shutdown Threshold Thermal Shutdown* * These parameters are guaranteed by design but not 100% tested in production. Typical Performance Characteristics Error Amplifier Voltage Gain vs. Frequency Over RF 50 80 TA = 25˚C, EA Set for Max. Output Over Operating Temperature Range 180 170 200 -1 220 230 -10 mV mV µA dB dB VSENSE = 0 to 15V Minimum Total Range ∆VOUT = 1 to 4V, RL ≥ 10MΩ ∆VIN = 300mV 50 50 0.5 70 60 60 5.0 80 300 Power Supply Rejection Ratio VIN = 10 to 40V V dB ns IC = 100µA VCE = 50V IC = 20mA IC = 200mA IE = 50mA TA = 25˚C, R = 2kΩ TA = 25˚C, R = 2kΩ TA = 25˚C, VCOMP to VOUT TA = 25˚C, VSHUT to VOUT TA = 25˚C, RC = 2kΩ 60 80 0.1 0.2 1.0 20.0 0.4 2.2 V µA V V V ns ns ns ns 1.0 V ˚C 17 18 200 100 300 200 0.5 0.7 165 Duty Cycle vs. Input Voltage OPEN VOLTAGE GAIN (dB) RF = 1MΩ 60 RF = 300kΩ RF = 100kΩ 40 RF = 30kΩ VIN = 20V TA = 25˚C DUTY-CYCLE (ONE OUTPUT) - % RF = ∞ 40 VIN = 20V RT = 2700Ω TA = 25˚C F =1 0µ CT 20 Note: Duty-Cycle is percent of two clock periods that one output conducts 0 1 2 3 4 5 20 0 RF is impedance to ground. Values below 30kΩ will begin to limit the maximum duty-cycle. 10 0 100 1k 10k 100k 1M FREQUENCY (Hz) INPUT VOLTAGE VIN 3 CT = 1 µF 30 CS3524A Typical Performance Characteristics continued Quiescent Supply Current vs. Supply Voltage Over Temperature 10 Shutdown Delay From PWM Comparator OUTPUT (V) QUIESCENT CURRENT (mA) 9 8 7 6 5 TA = -55°C TA = 25°C TA = 125°C 20 15 10 5 0 5 4 3 2 1 0 0 VIN = 20V RL = 2kΩ TA = 25˚C OUTPUT at VOA or VOB 3 2 Note: Outputs off. RT = ∞ 1 0 0 10 20 30 40 50 INTPUT (V) 4 INPUT at VOB Note: Minimum input pulse width to latch is 200ns 1 2 3 SUPPLY VOLTAGE VIN (V) DELAY TIME (µs) Oscillator Frequency vs. Timing Components Resistor Over Timing Capacitance 1M Output Dead Time vs. Timing Capacitor Value 10 OSCILLATOR FREQUENCY (Hz) OUTPUT DEAD TIME (µs) VIN = 20V TA = 25˚C 100k 5.0 VIN = 20V RT = 2700Ω TA = 25˚C 2.0 1.0 0.5 CT CT =1 =3 =1 =3 =1 .0n .0n 0nf 0nf f f 10k CT CT 1k f≈ 1.15 RTCT 100 1 2 5 10 CT 00n f 0.2 0.1 Note: Dead time = osc output pulse width plus output delay 1 2 5 10 20 50 100 20 50 100 TIMING RESISTOR - RT (kΩ) TIMING CAPACITOR - CT (nf) Current Limit Amplifier Delay OUTPUT at COMP Turn-Off Delay From Shutdown OUTPUT (V) 20 15 10 5 0 OUTPUT at VOA OR VOB VIN = 20V RL = 2kΩ TA = 25˚C 6 5 4 3 2 1 0 OUTPUT (V) Overdrive 5% 10% 20% 50% INTPUT (V) INPUT at ISENSE+ 0.2 0.1 0.0 0 1 2 VIN 20V TA 25˚C EA+ = VREF ISENSE– = Gnd INTPUT (V) 1.0 0.5 0.0 Note: Minimum input pulse width to latch is 200ns 0 1 2 3 INPUT at SHUTDOWN 3 4 DELAY TIME (µs) DELAY TIME (µs) 4 CS3524A Typical Performance Characteristics continued Output Saturation Voltage vs. Output Current Over Temperature 5 4 VCE SAT (V) 3 TA = 125˚C 2 TA = 25˚C 1 TA = –55˚C 0 0 50 100 150 200 250 OUTPUT COLLECTOR CURRENT (mA) Open Loop Test Circuit V CC IS VIN VOUTA VOUTB SYNC 2k Ω 1W 2k Ω 1W SHUTDOWN CS3524A ISENSE+ ISENSECOMP EA+ EA– EA 100k Ω 100k Ω SHUTDOWN 2k Ω 0.1 RT CT 10k Ω 0.1 2k Ω 10k Ω 1k Ω Note: The CS3524A should be able to be tested in any 3524 test circuit with two possible exceptions: 1. The higher gain-bandwidth of the current limit amplifier in the CS 3524A may cause oscillations in an uncompensated 3524 test circuit. 2. The effect of the shutdown, cannot be seen at the compensation terminal, but must be observed at the outputs. 5 Gnd VREF EB RT CT CS3524A Package Specification PACKAGE DIMENSIONS IN mm (INCHES) PACKAGE THERMAL DATA D Lead Count 16 Lead PDIP 16L SO Wide Metric Max 19.69 10.50 Min 18.67 10.10 English Max .775 .413 Min .735 .398 Thermal Data RΘJC RΘJA typ typ 16 Lead PDIP 42 80 16L SO Wide 23 105 ˚C/W ˚C/W Plastic DIP (N); 300 mil wide 7.11 (.280) 6.10 (.240) 8.26 (.325) 7.62 (.300) 3.68 (.145) 2.92 (.115) 1.77 (.070) 1.14 (.045) 2.54 (.100) BSC .356 (.014) .203 (.008) 0.39 (.015) MIN. .558 (.022) .356 (.014) Some 8 and 16 lead packages may have 1/2 lead at the end of the package. All specs are the same. REF: JEDEC MS-001 D Surface Mount Wide Body (DW); 300 mil wide 7.60 (.299) 7.40 (.291) 10.65 (.419) 10.00 (.394) 0.51 (.020) 0.33 (.013) 1.27 (.050) BSC 2.49 (.098) 2.24 (.088) 2.65 (.104) 2.35 (.093) 1.27 (.050) 0.40 (.016) REF: JEDEC MS-013 0.32 (.013) 0.23 (.009) D 0.30 (.012) 0.10 (.004) Ordering Information Part Number CS3524AGN16 CS3524AGDW16 CS3524AGDWR16 Rev. 10/28/96 Description 16 Lead PDIP 16 Lead SO Wide 16 Lead SO Wide (tape & reel) 6 Cherry Semiconductor Corporation reserves the right to make changes to the specifications without notice. Please contact Cherry Semiconductor Corporation for the latest available information. © 1999 Cherry Semiconductor Corporation
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