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CRD3511-Q1

CRD3511-Q1

  • 厂商:

    CIRRUS(凌云)

  • 封装:

    -

  • 描述:

    REFERENCE DESIGN FOR CS3511

  • 数据手册
  • 价格&库存
CRD3511-Q1 数据手册
CS3511 Stereo 10 W High-efficiency Class-D Audio Power Amplifier Features  Closed-loop Advanced ΔΣ Architecture  True Spread Spectrum Modulation  Premium Quality Audio Amplification Common Applications  Active Speakers  Portable Media Player Docking Stations  Mini/Micro Shelf Systems  Digital Televisions – – – 99 dB Dynamic Range - System Level 0.025% THD+N @ 5 W - System Level -96 dB Channel Separation General Description The CS3511 is a high-efficiency class-D PWM amplifier that integrates on-chip over-current, under-voltage, over-temperature protection, and error reporting. An onboard regulator generates a 5 VDC supply used to power the internal low-voltage analog and digital circuitry. The low RDS(ON) outputs can source peak currents up to 2.7 A, deliver high efficiency, allow a small device package, and lower power supply voltage levels. The CS3511 is available in a 32-pin QFN package in Commercial grade (-10°C to +70°C). The CRD3511 customer reference design is also available. Please refer to “Ordering Information” on page 24 for complete ordering information.  Four Selectable Amplifier Gain Settings  Integrated Protection and Automatic Recovery for Over-current, Under-voltage, and Thermal Overload  Single-supply Operation (Typ. = 9-12 V)  No Bootstrap Capacitors Required  Low-power Standby Mode  Supports Differential or Single-ended Inputs  Thermally Enhanced 32-pin, 6 x 6 mm QFN Package Requires No External Heat Sink Analog Power Digital Power 5V Regulator 12 V Positive Input Channel 1 Negative Input MUTE SLEEP STATUS Charge Pump GAIN0 GAIN1 Gain Control VP Channel 1 Processing and Modulation Gate Drive Positive Output Negative Output Positive Input Channel 2 Negative Input Processing and Modulation Channel 2 Gate Drive Positive Output Negative Output PGND Preliminary Product Information http://www.cirrus.com This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice. Copyright  Cirrus Logic, Inc. 2009 (All Rights Reserved) AUG ‘09 DS845PP2 CS3511 TABLE OF CONTENTS 1. PIN DESCRIPTIONS .............................................................................................................................. 4 2. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 6 RECOMMENDED OPERATING CONDITIONS .................................................................................... 6 ABSOLUTE MAXIMUM RATINGS ........................................................................................................ 6 AC ELECTRICAL CHARACTERISTICS ................................................................................................ 7 DC ELECTRICAL CHARACTERISTICS ................................................................................................ 8 DIGITAL INTERFACE SPECIFICATIONS ............................................................................................. 8 DIGITAL I/O PIN CHARACTERISTICS ................................................................................................. 9 3. TYPICAL CONNECTION DIAGRAMS ................................................................................................. 10 4. APPLICATIONS ................................................................................................................................... 12 4.1 CS3511 Input Stage ....................................................................................................................... 12 4.2 Dynamic DC Offset Calibration ...................................................................................................... 12 4.3 CS3511 Amplifier Gain .................................................................................................................. 13 4.4 MUTE Pin ....................................................................................................................................... 13 4.5 SLEEP Pin ..................................................................................................................................... 13 4.6 Power Up and Power Down Sequence .......................................................................................... 13 4.6.1 Recommended Power-Up Sequence .................................................................................... 13 4.6.2 Recommended Power-Down Sequence ............................................................................... 14 4.7 Protection Circuits .......................................................................................................................... 14 4.7.1 Under-Voltage Protection ...................................................................................................... 14 4.7.2 Over-Temperature Protection ................................................................................................ 14 4.7.3 Over-Current Protection ........................................................................................................ 14 4.8 Integrated 5 V Regulator ................................................................................................................ 14 4.9 Power Dissipation De-Rating ......................................................................................................... 14 4.10 Performance Measurements of the CS3511 ................................................................................ 15 4.11 Full-Bridge Output Filter ............................................................................................................... 15 5. POWER SUPPLY, GROUNDING, AND PCB LAYOUT ....................................................................... 16 5.1 Power Supply and Grounding ........................................................................................................ 16 5.1.1 Maximum Supply Voltage ...................................................................................................... 16 5.2 QFN Thermal Pad .......................................................................................................................... 16 5.3 Layout Considerations ................................................................................................................... 16 6. TYPICAL AUDIO PERFORMANCE PLOTS ........................................................................................ 17 7. PARAMETER DEFINITIONS ................................................................................................................ 21 8. PACKAGE DIMENSIONS .................................................................................................................... 22 9. THERMAL CHARACTERISTICS ......................................................................................................... 23 9.1 Thermal Flag .................................................................................................................................. 23 10. ORDERING INFORMATION .............................................................................................................. 24 11. REVISION HISTORY .......................................................................................................................... 25 2 DS845PP2 CS3511 LIST OF FIGURES Figure 1.Typical Connection Diagram - Stereo Amplifier with Differential Inputs ...................................... 10 Figure 2.Typical Connection Diagram - Stereo Amplifier with Single-Ended Inputs ................................. 11 Figure 3.CS3511 Input Stage .................................................................................................................... 12 Figure 4.Output Filter ................................................................................................................................ 15 Figure 5.THD+N vs. Output Power (RL= 8 W) .......................................................................................... 17 Figure 6.THD+N vs. Output Power (RL= 6 W) .......................................................................................... 17 Figure 7.THD+N vs. Output Power (RL= 8 W) .......................................................................................... 17 Figure 8.THD+N vs. Output Power (RL= 6 W) .......................................................................................... 17 Figure 9.THD+N vs. Output Power (RL= 8 W) .......................................................................................... 17 Figure 10.THD+N vs. Output Power (RL= 6 W) ........................................................................................ 17 Figure 11.Supply Current vs. POUT (RL= 8 W) ........................................................................................ 18 Figure 12.Supply Current vs. POUT (RL= 6 W) ........................................................................................ 18 Figure 13.THD+N vs. Frequency (RL= 8 W) ............................................................................................. 18 Figure 14.THD+N vs. Frequency (RL= 6 W) ............................................................................................. 18 Figure 15.Frequency Response (POUT = 1 W, RL= 8 W) ........................................................................ 18 Figure 16.Frequency Response (POUT = 1 W, RL= 6 W) ........................................................................ 18 Figure 17.Crosstalk vs. Frequency (RL= 8 W) .......................................................................................... 19 Figure 18.Crosstalk vs. Frequency (RL= 6 W) .......................................................................................... 19 Figure 19.Output FFT (POUT = 1 W, RL= 8 W) ........................................................................................ 19 Figure 20.Output FFT (POUT = 1 W, RL= 6 W) ........................................................................................ 19 Figure 21.Output FFT (POUT = 5 W, RL= 8 W) ........................................................................................ 19 Figure 22.Output FFT (POUT = 5 W, RL= 6 W) ........................................................................................ 19 Figure 23.Efficiency (RL= 8 W) ................................................................................................................. 20 Figure 24.Efficiency (RL= 6 W) ................................................................................................................. 20 LIST OF TABLES Table 1. I/O Power Rails ............................................................................................................................. 9 Table 2. Low-Pass Filter Components ...................................................................................................... 15 DS845PP2 3 CS3511 1. PIN DESCRIPTIONS BIASCAP AGND AGND IN1- 32 31 30 29 28 27 26 IN225 V5A C1 C2 IN1+ V5D GAIN0 DGND REF SLEEP MUTE STATUS 1 2 3 4 24 23 22 21 IN2+ AGND GAIN1 5VGEN VP DCAP CPUMP PGND Thermal Pad 5 6 7 8 9 10 11 12 13 14 15 16 20 19 Top-Down (Through Package) View 32-Pin QFN Package 18 17 OUT1- OUT1+ OUT2- Pin Name IN1+ IN1IN2+ IN2V5D GAIN0 GAIN1 DGND REF SLEEP MUTE # 1 32 24 25 2 3 22 4 5 6 7 Pin Description Differential Analog Input (Input) - Differential Audio Signal Inputs for channel 1 and channel 2. Digital Power (Input) - Supply for digital logic. Connect to 5VGEN. Gain (Input) - Gain select bits. GAIN0 is the least significant bit. Digital Ground (Input) - Ground reference for the internal logic and digital I/O. Reference (Output) - Internal reference voltage. Sleep (Input) - When set to logic high, device enters low power mode. If not used, this pin should be grounded. Mute (Input) - When set to logic high, both amplifiers are muted and in Idle Mode. When low (grounded), both amplifiers are fully operational. If not used, this pin should be grounded. Status (Output) - A logic high output indicates over-current or under-voltage condition, thermal overload, that an output is shorted to ground or to another output, that the device is in low power mode (the SLEEP pin is high), or that the device is in reset. A logic low state indicates that the CS3511 is ready to output audio. STATUS 8 4 OUT2+ VP PGND PGND VP DS845PP2 CS3511 OUT1+ OUT1OUT2+ OUT2VP 9 12 16 13 10 15 20 11 14 17 18 19 21 23 27 30 24 25 26 31 28 29 Differential PWM Output (Output) - Differential PWM Outputs for channel 1 and channel 2. High Voltage Power (Input) - Supply pins for high current H-bridges. PGND CPUMP DCAP 5VGEN AGND IN2+ IN2C2 C1 V5A BIASCAP Thermal Pad Power Ground (Input) - High current ground for analog outputs. Charge Pump Input (Input) - Input pin for charge pump. Charge Pump Switching Pin (Output) - Free-running 350 kHz square wave between VP and ground. 5 Volt Generator (Output) - Regulated 5 VDC source used to supply power to the input section (pins 2 and 28). Analog Ground (Input) - Connect all pins together directly at the thermal pad of the CS3511. Negative Analog Input (Input) - Negative Audio Signal for channel 2 and channel 1, respectively. Pop Minimization Capacitor (Input) - External capacitor used to reduce turn on/off pops. Analog Power (Input) - Supply for analog circuitry. Connect to 5VGEN. Analog Input Bias (Input) - Input stage bias voltage. Thermal Pad (Input) - Thermal relief pad for optimized heat dissipation. Connect to PGND. See “QFN Thermal Pad” on page 16 for more information. DS845PP2 5 CS3511 2. CHARACTERISTICS AND SPECIFICATIONS RECOMMENDED OPERATING CONDITIONS AGND = DGND = PGND = 0 V; All voltages with respect to ground. (Note 1) Parameters DC Power Supply Supply Voltage VP TA TJ 8.5 -10 -10 12 13.2 +70 +150 V °C °C Symbol Min Typ Max Units Temperature Ambient Temperature Junction Temperature Notes: 1. Device functionality is not guaranteed or implied outside of these limits. Operation outside of these limits may adversely affect device reliability. ABSOLUTE MAXIMUM RATINGS AGND = DGND = PGND = 0 V; All voltages with respect to ground. Parameters DC Power Supply Outputs Switching and Under Load No Output Switching (Note 2) VP VP Iin VIND TA Tstg -0.3 -0.3 -20 -65 13.2 14.0 ±10 V5D + 0.3 +85 +150 V Symbol Min Max Units Inputs Input Current Digital Input Voltage (Note 3) (Note 4) mA V °C °C Temperature Ambient Operating Temperature (power applied) Storage Temperature WARNING: Operation at or beyond these limits may result in permanent damage to the device. Notes: 2. The outputs will stop switching at the VP Under-Voltage Error Falling Trigger Point. See “DC Electrical Characteristics” on page 8. 3. Any pin except supplies. Transient currents of up to ±100 mA on the INxx pins will not cause SCR latch-up. 4. The maximum over/under voltage is limited by the input current. 6 DS845PP2 CS3511 AC ELECTRICAL CHARACTERISTICS Test Conditions (unless otherwise specified): AGND = DGND = PGND = 0 V; All voltages with respect to ground; TA = 25°C; VP = 12 V; RL = 8 Ω full-bridge; GAIN1 = 0, GAIN0 = 1; 10 Hz to 20 kHz Measurement Bandwidth; Performance measurements taken with a differential 997 Hz sine wave and AES17 measurement filter; Stereo FullBridge measurements taken through the Full-Bridge Output Filter shown in Figure 4 on page 15. Parameters Output Power (Continuous Average/Channel) (Note 5) PO Symbol Test Conditions THD+N = 1% THD+N = 7% THD+N = 10% RL = 8 Ω RL = 6 Ω RL = 8 Ω RL = 6 Ω RL = 8 Ω RL = 6 Ω Min - Typ 7.5 9.1 8.8 10.8 9.4 11.4 0.019 0.025 99 96 99 96 55 Max - Units W W W W W W % % dB dB dB dB dB Total Harmonic Distortion + Noise Dynamic Range (Note 5) (Note 6) THD+N DYR PO = 1 W, RL = 8 Ω PO = 5 W, RL = 8 Ω Vin = -60 dBi A-Weighted Unweighted Inputs AC coupled to AGND A-Weighted Unweighted 200 mv p-p from 20 Hz ≤ f ≤ 1 kHz, inputs AC coupled to AGND 19 kHz, 20 kHz, 1:1 (IHF), PO = 1 W PO=1 W, f = 1 kHz 20 Hz ≤ f ≤ 20 kHz MUTE = low PO = 2 x 9.4 W, RL = 8 Ω Signal to Noise Ratio (Note 6) SNR Power Supply Rejection Ratio PSRR IHF Intermodulation Distortion Channel Separation Output Offset Voltage Efficiency PWM Output Over-Current Error Trigger Point Junction Thermal Error Rising Trigger Point Junction Thermal Error Falling Trigger Point Turn On Time Turn Off Time Amplifier Gain (Note 7) IHF-IMD CS VOFFSET η ICE TTERISE TTEFALL ton toff - 0.20 104 78 50 85 2.7 155 135 155 3 13.6 19.5 23.8 27.3 0.1 46.0 23.0 13.8 9.2 55.2 27.6 16.6 11.1 % dB dB mV % A °C °C ms ms dB dB dB dB % kΩ kΩ kΩ kΩ SLEEP = VIL SLEEP = VIH Gain1 = 0, Gain0 = 0 Gain1 = 0, Gain0 = 1 Gain1 = 1, Gain0 = 0 Gain1 = 1, Gain0 = 1 Between output channels Gain1 = 0, Gain0 = 0 Gain1 = 0, Gain0 = 1 Gain1 = 1, Gain0 = 0 Gain1 = 1, Gain0 = 1 36.8 18.4 11.0 7.3 Gain Matching Input Impedance Notes: 5. See Figure 5 on page 17. 6. dBi is referenced to the input signal amplitude resulting in the specified output power at THD+N
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