CS1600-FSZ

CS1600 Low-cost PFC Controller for Electronic Ballasts Features & Description  Lowest PFC System Cost for Electronic Ballasts  Variable Frequency Discontinuous Conduction Mode  Improved Efficiency Due to Variable Switching Frequency  EMI Signature Reduction from Digital Noise Shaping  Integrated Feedback Compensation  Overvoltage Protection with Hysteresis  Overpower Protection with Shutdown  UVLO with Wide Hysteresis  Thermal Shutdown with Hysteresis Description CS1600 is a high-performance Variable Frequency Discontinuous Conduction Mode (VF - DCM), active Power Factor Correction (PFC) controller, optimized to deliver the lowest PFC system cost for electronic ballast applications. A variable ON time / variable frequency algorithm is used to achieve near unity power factor. This algorithm spreads the EMI frequency spectrum, which reduces the conducted EMI filtering requirements. The feedback loop is closed through an integrated compensation network within the IC, eliminating the need for additional external components. Protection features such as overvoltage, overcurrent, overpower, open- and short-circuit protection, overtemperature, and brownout help protect the device during abnormal transient conditions. Pin Assignments NC STBY IAC FB 1 2 3 4 8 7 6 5 NC VDD GD GND 8-lead SOIC D5 L1 RAC D6 RFB R1a BR1 BR1 R1b R2a CS1600 1 NC IAC VDD NC STBY FB GD GND 2 R2b C3a Clink R2c 4 C3b 6 5 R3 Q1 AC Mains C1 R1c 3 +12V 7 C2 8 BR1 BR1 A dvance Product Information Cirrus Logic, Inc. http://www.cirrus.com This document contains information for a product under development. Cirrus Logic reserves the right to modify this product without notice. Copyright  Cirrus Logic, Inc. 2010 (All Rights Reserved) MAY ‘10 DS904A5 CS1600 1. PIN DESCRIPTIONS NC STBY IAC FB 1 2 3 4 8 7 6 5 NC VDD GD GND Table 1. Pin Descriptions Pin Name NC Pin # I/O Description No Connect — Connect these pins to VDD to prevent any leakage path that could arise from leaving them unterminated. Standby — This is an active-low pin. Shorting this pin to GND disables PFC switching. The input has a pull-up resistor and should be driven with an open-collector device. Leave this pin unterminated when not in use. Rectified Line Voltage Sense — The IAC pin is used to sense the rectified line voltage. This signal, in conjunction with the signal on the FB pin, is used in the Power Factor Correction (PFC) algorithm A filter capacitor of up to 2.2 nF may be added between this pin and VDD to provide noise immunity. Feedback Voltage Sense — The FB pin is used to sense the output voltage of the PFC stage. This signal, in conjunction with the signal on the IAC pin, is used in the Power Factor Correction (PFC) algorithm. A filter capacitor of up to 2.2 nF may be added between this pin and VDD to provide noise immunity. Ground — GND is a common reference for all the functional blocks in this device. Gate Drive — GD is the output of the device with a source capability of 0.5 A and a current sink capacity of 1 A. IC Supply Voltage — VDD is the input used to provide bias to the device. This pin has an internal shunt to ground. An external bias needs to be applied for steadystate operation. A low-ESR ceramic decoupling capacitor at this pin is recommended for reliable operation of this device. 1, 8 - STBY 2 IN IAC 3 IN FB 4 IN GND GD 5 6 – OUT VDD 7 IN 2 DS904A5 CS1600 2. CHARACTERISTICS AND SPECIFICATIONS 2.1 Absolute Maximum Ratings Pin 7 2,3,4 3,4 6 6 1,2,3,4,5,6,8 1,2,3,4,5,6,8 1,2,3,4,5,6,8 2. Symbol VDD VIN IIN VGD IGD ESD ESD ESD PD TJ TStg IC Supply Voltage1 Parameter Value Vz -0.5 to VDD 50 -0.3 to VDD -1.0 / +0.5 2000 200 500 600 -40 to +125 -65 to +150 Unit V V mA V A V V V mW ºC ºC Input Voltage Input Current Gate Drive Voltage Gate Drive Current Human Body Model Machine Model Charged Device Model Total Power Dissipation at 50° C2 Junction Temperature Operating Range Storage Temperature Range Notes: 1. The CS1600 has an internal shunt regulator that controls the nominal operating voltage on the VDD pin. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation at the rate of 50 mW / ºC for variation over temperature. 2.2 Electrical Characteristics Recommended operating conditions (unless otherwise specified): TA = TJ = -40º to +125º C, VDD = 10 to 15 V, GND = 0 V. Typical values are at TA = 25º C. Parameter VDD Supply Voltage VDD Turn-on Threshold Voltage VDD Turn-off Threshold Voltage UVLO Hysteresis Zener Voltage Supply Current Section Start-up Supply Current Standby Supply Current Operating Supply Current PFC Gate Drive Section Maximum Operating Frequency3,4 Minimum Operating Frequency3,4 Minimum Duty Cycle Maximum Duty Cycle3,4 Minimum On Time Output Source Resistance Output Sink Resistance Rise Time Normal mode, VDD = 13 V Normal mode, VDD = 13 V VDD = 13 V, STBY < 0.8 V VDD = 13 V VDD = 13 V IGD = 100 mA, VDD = 13 V IGD = -200 mA, VDD = 13 V CL = 1 nF, VDD = 13 V fSW(max) fSW(min) tDC_min Dmax ton_min ROH ROL tr 62 20 64 0.45 66 22 66 0.5 9 6 32 70 23 0 68 0.55 45 kHz kHz % % μs Ω Ω ns VDD < Vth(St) STBY < 0.8V CL = 1nF, fsw = 70 kHz IST ISB IDD 68 80 1.7 80 112 1.9 μA μA mA IDD = 20 mA VDD increasing VDD decreasing Vth(St) Vth(Stp) VHys VZ 8.4 7.1 17.0 8.8 7.4 1.3 17.9 9.3 7.9 18.5 V V V V Condition Symbol Min Typ Max Unit DS904A5 3 CS1600 Parameter Fall Time Output Voltage Low Output Voltage High Feedback and Protection Reference Current Overvoltage Protection Threshold Overvoltage Protection Current Hysteresis Undervoltage Protection Threshold Undervoltage Protection Current Hysteresis Overpower Protection Threshold 3,4 Overpower Protection Recovery 3,4 Input Brownout Protection Threshold7 Input Brownout Recovery Threshold7 Thermal Protection Thermal Shutdown Threshold 3 Thermal Shutdown Hysteresis STBY Input Logic Threshold 5 Low High Condition CL = 1 nF, VDD = 13 V IGD = -200 mA,VDD = 13 V IGD = 100 mA,VDD = 13 V Symbol tf VOL VOH Iref IOVP/Iref IOVP(Hy) IUVP/Iref IUVP(Hy) Min 11.3 127 105 83 123 Typ 15 0.9 11.8 130 107 4 85 10 125 49 86 97 Max 25 1.3 133 110 87 127 60 90 100 Unit ns v v μA % % % % % % Vrms Vrms % of full load as defined by Eq. 3 35 Vout = 460V, GDRV turns off Vout = 460V, GDRV turns on VBP(th) VBR TSD TSD(Hy) 82 94 130 - 143 9 155 - ºC ºC VDD – 0.8 - 0.8 - V 2.3 Thermal Characteristics Parameter Thermal Resistance (Junction to Ambient)6. Thermal Resistance (Junction to Case)6. 3. 4. 5. 6. 7. Value TBD TBD Unit ºC / W ºC / W Symbol RθJA RθJC Specifications guaranteed by design & characterization. Specifications measured as an instantaneous quantity NOT as a time-averaged quantity. STBY is designed to be driven by an open-collector device. The input is internally pulled up with a 600 kΩ resistor. The package thermal impedance is calculated in accordance with JESD 51. For an output voltage, Vout, other than 460V, the threshold scales by a factor of Vout/460 4 DS904A5 CS1600 3. TYPICAL ELECTRICAL PERFORMANCE 3.5 3 2.5 C L = 1 nF fSW = 70 kHz TA = 25 °C 13 12 11 IDD (mA) 2 1.5 Rising 1 Falling 0.5 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 VDD (V) 10 9 Startup 8 UVLO 7 -50 0 Figure 1. UVLO Characteristics VDD (V) TEMP (o C) 50 100 150 Figure 2. Start-up & UVLO vs. Temperature 2 19 IDD = 20 mA UVLO Hysteresis (V) 1.5 18.5 VZ (V) -50 0 50 100 150 1 18 0.5 17.5 0 17 TEMP ( o C) -50 0 50 100 150 TEMP ( oC) Figure 3. UVLO Hysteresis vs. Temperature Figure 4. VDD Zener Voltage vs. Temperature DS904A5 5 CS1600 1.8 Operating 1.6 14 12 Supply Current (mA) 1.4 1.2 1.0 0.8 0.6 fSW = 70 kHz Zout (Ohm) VDD = 13 V CL = 1 n F Source 10 8 6 Sink 4 0.4 0.2 2 Start-up Standby VDD = 13 V Isource = 100 mA Isink = 200 mA Standby Start-up 0 -50 0 TEMP ( o C) 50 100 150 0 -60 -40 Gate Resistor (ROH, ROL) Temp (oC) -20 0 20 40 60 80 100 120 140 Figure 5. Supply Current (ISB, IST, IDD) vs. Temperature Figure 6. Gate Resistance (ROH, ROL) vs. Temperature 6 DS904A5 CS1600 4. INTRODUCTION CS1600 is a digitally controlled Power Factor Correction (PFC) controller that operates in the Variable Frequency Discontinuous Conduction Mode (VF - DCM). The CS1600 uses a proprietary digital algorithm to optimize control of the power switch to deliver highly efficient performance for electronic ballast applications. With this control scheme, the total number of external components needed is minimized in comparison to conventional control techniques, thus reducing the overall system cost. Digital control is achieved by constantly monitoring two voltages – the PFC output voltage (Vlink) at pin FB and the rectified AC line voltage (Vrect) at pin IAC. This is done by measuring the currents that flow into the respective pins. These currents are then fed to the inputs of two analog-to-digital converters (ADCs) and are compared against an internal target current, Iref. The digital outputs of the two ADCs are then processed in a control algorithm which determines the behavior of the CS1600 during start-up, normal operation, and under fault conditions such as brownout, overvoltage, overcurrent, overpower, and over-temperature. Details of operation during these conditions are discussed in later sections of this document. Some of the key features of the CS1600 are as follows: • Discontinuous Conduction Mode with Continuously Variable Switching Frequency The PFC switching frequency is varied every switching cycle. This allows for a spread spectrum which minimizes the conducted EMI peaks at any given frequency, thereby minimizing the size and cost of the EMI filter required at the front-end. During start-up, the control algorithm limits the maximum ON time and adjusts the frequency to avoid inductor saturation and provides a near-trapezoidal envelope for the input current during every half cycle. During normal operation, as the line voltage changes over half of a line cycle, the frequency varies approximately 2:1 as shown in Figure 7 below. 120 Switching Frequency (% of Max) 100 80 % of Max 60 Line Voltage (% of Max) 40 20 0 0 45 90 135 180 Rectified Line Voltage Phase (Deg.) Figure 7. Switching Frequency vs. Phase Angle Maximum power transfer occurs at the peak of the AC line voltage, at which time, the frequency reaches its maximum value. Switching losses are minimized during periods of low power transfer by switching at lower frequencies near the zero-crossing of the AC line. This switching frequency profile helps reduce total BOM cost through savings in the size of the boost inductor and the EMI filter components, while at the same time, improving overall system efficiency. • Integrated Feedback Control No external feedback compensation components are required for the CS1600. The internal digital control engine self-compensates the feedback error signal using an adaptive control algorithm. • Protection Features The CS1600 provides various protection features such as undervoltage, overcurrent, overpower, open and short circuit protection and brownout. It also provides the user with the option of using the STBY pin to disable switching of the device. DS904A5 7 CS1600 4.1 PFC Implementation CRM mode near the peaks of the input line, in order to enable maximum power delivery, as illustrated in Figure 10 below. The PFC switching frequency profile over the line period has been discussed in detail in Section 4. In addition, the digital control algorithm tracks changes the AC input and operates in different frequency bands at different line voltages as illustrated in Figure 8 and Figure 9 below. DCM Quasi CRM DCM Quasi CRM DCM ILB fSW [kHz] 100 Burst Mode 70 Max fSW Figure 10. DCM and quasi-CRM Operation with CS1600 4.1.1 35 Min fSW Start-up Mode vs. Normal Mode CS1600 operates in two discrete states: Start-up mode: When the output voltage of the PFC stage, Vlink, is 165 VAC The CS1600 primarily operates in the DCM mode with a properly sized inductor. However, it will move into a quasi- Once Vlink reaches its nominal value, the chip operates in the normal mode. Here, the frequency follows the profile shown in Figure 7, and the ON time is varied to achieve PFC. Any drop in Vlink to below its undervoltage threshold, as defined in Section 2.2. Electrical Characteristics re-triggers the start-up mode of operation. A simplified illustration of operation in these two modes is shown below in Figure 11. 100% Startup Mode Startup Mode 90% Normal Mode Normal Mode t [ms] Figure 11. Start-up and Normal Modes 8 DS904A5 CS1600 4.1.2 Burst Mode Iref = Target Reference current used for feedback In addition to the start-up mode and normal mode of operation, the controller enters the burst mode of operation when the estimated output power (PO) is < 5% of its nominal value. During this stage, the PFC driver is disabled intermittently over a full line cycle period, as shown in Figure 12. The period of time for which the PFC drive is disabled depends on the level of loading present.. PO [W] Vlink IFB RFB VDD 7 RIFB 15k FB 4 ADC 5% Burst Mode Active t [ms] Vin [V] Vin PFC Disable IFB Figure 13. Output Feedback Vlink RFB VDD 7 FET Vgs RIFB 15k ADC t [ms] FB 4 Figure 12. Burst Mode of Operation 4.2 Input Feedforward and Output Regulation 4.3 4.3.1 Figure 14. Input Feedforward The CS1600 continuously monitors the rectified AC line and the PFC output voltage through sense resistors tied to the IAC and the FB pins to monitor the voltages, scaled as currents. The rectified AC line sense resistor RAC needs to be the same size of the resistor RFB used for current feedback from the PFC output voltage. These currents are effectively compared against an internal reference current to provide adaptive PFC control. The resistor values are calculated as follows: V link – V DD R FB = ---------------------------I ref R AC = R FB where RFB = Feedback resistor used to sense the PFC output voltage RAC = Feedforward resistor used to sense the rectified line voltage Vlink= PFC Output Voltage VDD = IC Supply Voltage [Eq.1] Protection Features Overvoltage Protection If the PFC output voltage, Vlink, exceeds the overvoltage threshold, as scaled by the current monitored by the sense resistors, the CS1600 provides protection by disabling the gate drive. A nominal hysteresis is provided to allow the system to recover from the fault condition, before switching is resumed. 4.3.2 Overcurrent Protection The CS1600’s digital controller algorithm limits the ON time of the Power MOSFET by the following equation: [Eq.2] 0.001126 T on ≤ -----------------------V rect Where Ton is the max time that the power MOSFET is turned on and Vrect is the rectified line voltage. In the event of a sudden line surge or sporadic, high dv/dt line voltages, this equation may not limit the ON time appropriately. For this type of line disturbance, additional protection mechanisms, such as fusible resistors, fast-blow fuses, or other current-limiting devices, are recommended. DS904A5 9 CS1600 4.3.3 Overpower Protection for the output voltage, drops to 49% of its nominal value. Detection of brownout for a period of 56 ms disables the gate drive. The device continues to monitor the input voltage while in this condition. The CS1600 exits the brownout mode when the input current scales up to, and stays above 56.4% of its nominal value for a period of 56 ms. To minimize false detects, the brownout detection circuit increases the brownout detection time by a factor of 1.6 mS/V for every volt differential between the minimum operating voltage and the brownout threshold, following half of a line cycle of exceeding the brownout threshold. The following diagram illustrates the brownout sequence whereby the CS1600 enters standby, and upon recovery from brownout, enters normal operation.. TBrownout Brownout Thresholds Upper Lower Start Timer 56 ms 56 ms The nominal output power is estimated internally by the CS1600 from the following equation 2 V link – ( V in ( min ) × 2 ) P = α × η × ( V in ( min ) ) × -------------------------------------------------------o 2 × f max × L B × V link [Eq.3] where Po = rated output power of the system η = efficiency of the boost converter = estimated as 100% by the internal PFC algorithm Vin(min) = minimum RMS line voltage for operation Vlink = PFC output voltage fmax = maximum switching frequency LB = boost inductor used in the application V link V link –  ------------- × 90V × 2 V link  400V  90V  α =  ------------- × -------------------  × ------------------------------------------------------------------- 400V V in ( min ) V link – V in ( min ) × 2 2 Operation estimated to be at power levels higher than that calculated by Eq. 3 above is tracked by the IC as an overpower condition. During this phase, the PFC output voltage, Vlink, is reduced and will continue to decrease as the power draw increases. When Vlink reaches its undervoltage threshold, it goes into the start-up mode as explained in section 4.1.1. At this point, the overpower protection timer is activated. If this condition continues to exist for 112 ms, the gate drive is disabled for a period of about 3 seconds. This “hiccup” mode of operation continues until the fault is removed. If a value of the boost inductor other than that obtained from Eq. 3 above is used, the total output power capability as well as the thresholds for the different operating conditions will scale accordingly. Enter Standby Start Timer Exit Standby Figure 15. Brownout 4.3.6 Over-temperature Protection Over-temperature protection is activated and PFC switching is disabled when the die temperature of the device exceeds 125°C. There is a hysteresis of about 30°C before resumption of normal operation. 4.4 Standby (STBY) Function 4.3.4 Open/short circuit protection The standby (STBY) pin may be used as a means to force the CS1600 into a non-operating, low-power state. The STBY input should be driven by an open-collector/open-drain device. Internal to the pin, there is a pull-up resistor connected to the VDD pin as shown in Figure 16. A filter capacitance of about 1000 pF is recommended while this pin is being used. CAP 600 k Ω The CS1600 protects the system in case the feedforward resistor tied to the IAC pin or the feedback resistor tied to the FB pin is open or shorted to ground. A fault seen on the resistor going into the FB pin would imply no current being fed into the pin, which would trigger the Vlink undervoltage algorithm as described in Section 4.3.1. A fault detected on the IAC pin would trigger the brownout condition discussed in Section 4.3.5 below. STBY CS1600