Contents
Memory .....................................................................................................47
Mobile FCRAM TM (Fast Cycle RAM) ...................................................................................................48
Consumer FCRAM TM (Fast Cycle RAM) .............................................................................................52
FRAM....................................................................................................................................................54
Flash Memory (Single 3V) * ..................................................................................................................56
Flash Memory (Single 1.8 V) * ..............................................................................................................60
Flash Memory (MirrorBit TM) (Single 3 V) * ...........................................................................................62
Flash Memory (MirrorBit TM) (Single 1.8 V) * ........................................................................................64
SPI Flash Memory (MirrorBit TM) (Single 3 V) *.....................................................................................66
MCP (Single 3 V) * ...............................................................................................................................68
MCP (Single 1.8 V) * ............................................................................................................................74
Products Scheduled to be out of Production ........................................................................................82
Semicustom ..............................................................................................83
Standard Cell ........................................................................................................................................84
Macro-Embedded Type Cell Arrays .....................................................................................................91
Sea-of-Gate Type CMOS Gate Arrays ..............................................................................................102
AccelArray TM......................................................................................................................................106
IF PLL Frequency Synthesizer ...........................................................................................................107
Package Line-up .....................................................................................108
Index ........................................................................................................110
* : SPANSION TM Products
Memory
Semicustom
Telephone Products................................................................................................................................2
Wireless Communication Products .........................................................................................................4
Communication Control ........................................................................................................................16
Communication Network.......................................................................................................................16
Display Control Products ......................................................................................................................18
Video/Audio Products ...........................................................................................................................20
Demodulator Products ..........................................................................................................................22
Power Management Applications .........................................................................................................24
Fingerprint Sensor ................................................................................................................................34
Smart Card............................................................................................................................................36
RFID......................................................................................................................................................36
Secure ..................................................................................................................................................36
Sense Amplifier ICs ..............................................................................................................................36
General-Purpose Converter..................................................................................................................38
Others ...................................................................................................................................................40
System Configuration............................................................................................................................43
ASSP
ASSP ...........................................................................................................1
Trademarks
Trademarks:
• LightWave and LightWave 3D are registered trademark of NewTek, Inc in the United States and/
or other countries.
• Ethernet is a registered trademark of XEROX Corporation in the United States.
• FCRAM is a trademark of Fujitsu Limited, Japan.
• MirrorBit is a trademark of Spansion LLC.
• SPANSION is a trademark of Spansion LLC.
• Amplify is a registered trademark of Synplicity, Inc.
• AccelArray is a registered trademark of Fujitsu Limited, Japan.
• “Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to
use these components in an I2C system, provided that the system conforms to the I2C Standard
Specification as defined by Philips.”
• Other company names and brand names are the trademarks or registered trademarks of their
respective owners.
ASSP Product Line-up
■ ASSP Product Line-up
ASSP
Telecom
Communication control
Communication network
Communication
control
Communication
network
Video equipment products
Telephones
2
Wireless communication
4
ISDN
16
IP Packet Processing Engine
16
High-speed IPsec Processing Engine
16
Wireless LAN
16
LAN
16
Display control products
18
Video/Audio products
20
Demodulator products
22
Power management
applications
24
Fingerprint sensor
34
Smart card
36
RFID
36
Secure
36
Sense amplifier IC
36
General-purpose linear
ICs (Analog)
General-purpose converter
38
Others
Motor drivers
40
Spread spectrum clock generator
40
ASSP
Page No.
1
Telephone Products
Telephones
Part number
ISDN
telephones
digital
Digital
telephones
mobile
2
Serial
MB86434
Features
*
AIU LSI for ISDN digital telephone
*: Audio Interface Unit
MB86435
3 V single power supply AIU
MB86437
3 V single power supply AIU
Telephone Products
■ Telephone Products
Part number
MB86434
CODEC
Power supply
voltage (V)
Package
A-laW
µ-laW
14-bit linear
+5±5%
64P
Functions
AIU for ISDN digital telephones
CODEC, DTMF tones, service tone
Internal ringer tone
ASSP
ISDN Digital Telephone LSIs
QFP
Package: P - Plastic
LSIs for Digital Mobile Telephones
Part number
Functions
MB86435
3 V single power supply AIU
MB86437
Compression law
Power supply voltage (V)
A-laW
µ-laW
linear
2.7 to 3.6
Package
LQFP
64P
48P
Package: P - Plastic
3
Wireless Communication Products
Wireless
communication
PLL
Frequency
Synthesizers
Low
Noize
Single
Integer-N
PLL
Single
Integer-N
PLL
(New
Version)
Single
Integer-N
PLL
(Conventi
onal)
Input frequency
band of prescaler
PLL type
Prescaler
divide ratio
Part number
Features
100 MHz
to 2.5 GHz
RF Integer-N
32/33, 64/65
MB15E07SR
For digital telecommunications equipment, Low noise
700 MHz
to 3.0 GHz
RF Integer-N
64/65,
128/129
MB15E06SR
For digital telecommunications equipment, Low noise
300 MHz
to 2.0 GHz
RF Integer-N
64/65,
128/129
MB15E05SR
For digital telecommunications equipment, Low noise
100 MHz
to 2.5 GHz
RF Integer-N
32/33,
64/65
MB15E07UV
For digital telecommunications equipment, Low noise
Low power dissipation
Small Package
100 MHz
to 2.0 GHz
RF Integer-N
64/65,
128/129
MB15E05UV
For digital telecommunications equipment, Low noise
Low power dissipation
Small Package
100 MHz
to 1.3 GHz
RF Integer-N
64/65,
128/129
MB15E03UV
For digital telecommunications equipment, Low noise
Low power dissipation
Small Package
700 MHz
to 2.5 GHz
RF Integer-N
32/33, 64/65
MB15E07SL
For digital telecommunications equipment, Low noise
Low power dissipation
100 MHz
to 2.0 GHz
RF Integer-N
64/65,
128/129
MB15E05SL
For digital telecommunications equipment, Low noise
Low power dissipation
100 MHz
to 1.2 GHz
RF Integer-N
64/65,
128/129
MB15E03SL
For digital telecommunications equipment, Low noise
Low power dissipation
Integer-N :Integer-N technology
Sigma-Delta:Sigma-Delta fractional-N technology
(Continued)
4
(Continued)
Wireless Communication Products
■ Wireless Communication Products
• Low Noize Single Integer-N PLL
Part number
Input
frequency
band (Hz)
PLL
Type
min max
MB15E07SR
Power Power Power supply
voltage
Package
supply save
(V)
current current
typ
typ
Swallow Reference
(mA)
(µA) min typ max BCC TSSOP
counter counter
Divide ratio
Prescaler Program
counter
32/33,
64/65
100M 2.5G
MB15E06SR
700M 3.0G
Integer 64/65,
128/129
-N
MB15E05SR
300M 2.0G
64/65,
128/129
Binary
11bit
3 to 2047
Binary
Binary
14bit
7bit
0 to 127 3 to 16383
8.0
0.1
2.7 3.75 5.0
7.0
0.1
2.7 3.0
5.0
8.0
0.1
2.7 3.0
4.0
7.0
0.1
2.7 3.75 5.0
6.0
0.1
2.7 3.0
16P
16P
16P
16P
16P
16P
5.0
Package: P - Plastic
• Single Integer-N PLL (New Version)
Part number
Input
frequency
band (Hz)
Power Power Power supply
voltage
Package
supply
save
PLL
(V)
current current
Type
typ
typ
Program Swallow Reference
min max
Prescaler
(mA)
(µA) min typ max TSSOP BCC
counter counter counter
MB15E07UV
2.5G
MB15E05UV
100M 2.0G
MB15E03UV
1.3G
Divide ratio
32/33,
64/65
Integer
-N
64/65,
128/129
Binary
11bit
3 to 2047
Binary
Binary
14bit
7bit
0 to 127 3 to 16383
64/65,
128/129
3.5
0.1
2.4
3.0
3.6
16P
18P
2.9
0.1
2.4
3.0
3.6
16P
18P
2.1
0.1
2.4
3.0
3.6
16P
18P
: Now planning
Package: P - Plastic
• Single Integer-N PLL (Conventional)
Part number
Input
frequency
band (Hz)
min max
MB15E07SL
MB15E05SL
MB15E03SL
PLL
Type
Power Power Power supply
voltage
Package
supply save
(V)
current current
typ
typ
Swallow Reference
(mA)
(µA) min typ max SSOP BCC
counter counter
Divide ratio
Prescal
er
Program
counter
Binary
Binary
Binary 7bit
14bit
11bit
0 to 127
3 to 16383
3 to 2047
Binary
Binary
Binary 7bit
Integer 64/65,
14bit
11bit
2.0G
0 to 127
-N 128/129
3 to 16383
3 to 2047
100M
Binary
Binary
Binary 7bit
64/65,
14bit
11bit
1.2G
0 to 127
128/129
3 to 16383
3 to 2047
700M 2.5G
32/33,
64/65
4.5
0.1
2.4
3.0
3.6
16P
16P
3.5
0.1
2.4
3.0
3.6
16P
16P
2.5
0.1
2.4
3.0
3.6
16P
16P
Package: P - Plastic
5
ASSP
PLL Frequency Synthesizers
Wireless Communication Products
(Continued)
(Continued)
Input frequency
band of prescaler
Dual
Integer-N
PLL
400 MHz
to 2.6 GHz
100 MHz
to 1.2 GHz
2.0 GHz
to 6.0 GHz
100 MHz
to 1.5 GHz
PLL type
Prescaler
divide ratio
RF Integer-N
32/33, 64/65
IF Integer-N
Part number
Features
MB15F78UL
For digital telecommunications equipment
Low noise
Low power dissipation
MB15F76UL
For digital high-speed telecommunications equipment
16/17, 32/33
RF Integer-N 6.0G : 16/17,
32/33
IF Integer-N 1.5G : 4/5, 8/9
(Fixed part 4 division)
2.0 GHz
to 4.0 GHz
200 MHz
to 2.0 GHz
RF Integer-N 4.0G : 64/65,
128/129
2.0G : 32/33,
IF Integer-N
64/65
Small Package
MB15F74UV
MB15F74UL
200 MHz
to 2.25 GHz
50 MHz
to 600 MHz
2.25G : 64/65,
128/129
600M : 8/9, 16/
IF Integer-N
17
RF Integer-N
1.3G : 64/65,
128/129
350M
: 8/9, 16/
IF Integer-N
17
RF Integer-N
100 MHz
to 1.1GHz
100 MHz
to 1.1GHz
RF Integer-N
8/9, 16/17
RF Integer-N 1.1G : 64/65,
128/129
1.1G : 64/65,
IF Integer-N
128/129
For digital high-speed telecommunications equipment
For digital high-speed telecommunications equipment
For digital high-speed telecommunications equipment
Small Package
32/33, 64/65
MB15F30UV
IF Integer-N
For digital high-speed telecommunications equipment
Small Package
MB15F72UV
MB15F72UL
500 MHz
to 2.6 GHz
45 MHz
to 510 MHz
For digital high-speed telecommunications equipment
Small Package
MB15F73UV
MB15F73UL
100 MHz
to 1.3GHz
50 MHz
to 350 MHz
For digital high-speed telecommunications equipment
MB15F07SL
For digital high-speed telecommunications equipment
Low power dissipation
For digital high-speed telecommunications equipment
Low noise
Integer-N :Integer-N technology
Sigma-Delta:Sigma-Delta fractional-N technology
(Continued)
6
(Continued)
Wireless Communication Products
Part number
Input
frequency
band (Hz)
min
MB15F74UV
Power supply
Power Power
voltage
Package
supply save
(V)
current current
typ
typ
Program Swallow Referenc (mA)
(µA) min typ max BCC TSSOP
counter counter e counter
Divide ratio
PLL
Type
max
Prescaler
2.0G 4.0G
200M 2.0G
RF : 64/65, 128/129
IF : 32/33, 64/65
Binary
11 bit
3 to
2047
Binary
7bit
0 to 127
Binary
14bit
3 to
16383
6.5
2.5
0.1
0.1
2.7 3.0 3.6 18P
−
2.0
1.2
0.1
0.1
2.4 2.7 3.6 18P
−
1.5
1.0
0.1
0.1
2.4 2.7 3.6 18P
−
−
MB15F73UV
200M 2.25G
50M 600M
RF : 64/65, 128/129
IF : 8/9, 16/17
MB15F72UV
100M 1.3G
50M 350M
RF : 64/65, 128/129
IF : 8/9, 16/17
MB15F30UV
500M 2.6G
45M 510M
RF : 32/33, 64/65
IF : 8/9, 16/17
Binary
11 bit
3 to
2047
Binary
7bit
0 to 63
Binary
15bit
3 to
32768
2.8
1.2
0.1
0.1
2.4 2.7 3.6 18P
MB15F78UL
400M 2.6G
100M 1.2G
RX : 32/33, 64/65
TX : 16/17, 32/33
Binary
11 bit
3 to
2047
Binary
7bit
0 to 127
Binary
14bit
3 to
16383
2.8
1.7
0.1
0.1
2.4 2.7 3.6 20P 20P
Binary
5bit
0 to 31
Binary
14bit
3 to
16383
6.2
2.3
0.1
0.1
2.5 3.0 3.6 20P
−
6.5
2.5
0.1
0.1
2.7 3.0 3.6 20P
−
2.0
1.2
0.1
0.1
2.4 2.7 3.6 20P 20P
1.5
1.0
0.1
0.1
2.4 2.7 3.6 20P 20P
5.5
5.5
0.1
0.1
2.5 3.0 3.6 16P 16P
Integer
-N
MB15F76UL
2.0G 6.0G
100M 1.5G
RF : 16/17, 32/33
Binary
(Fixed part 4 division)
13bit
IF : 4/5, 8/9
(Fixed part 4 division) 3 to 8191
MB15F74UL
2.0G 4.0G
200M 2.0G
RF : 64/65,128/129
IF : 32/33,64/65
MB15F73UL
200M 2.25G
50M 600M
Binary
Binary
RF : 64/65,128/129
7bit
11bit
IF : 8/9,16/17
3 to 2047 0 to 127
MB15F72UL
100M 1.3G
50M 350M
RF : 64/65,128/129
IF : 350M: 8/9,16/17
MB15F07SL
100M 1.1G
100M 1.1G
64/65,128/129
64/65,128/129
Binary
Binary
7bit
11bit
3 to 2047 0 to 127
Binary
14bit
3 to
16383
Binary
14bit
3 to
16383
Package: P - Plastic
7
ASSP
• Dual Integer-N PLL
Wireless Communication Products
(Continued) (Continued)
Single
SigmaDelta
FractionalN PLL
Single
Sigma-Delta
Fractional-N
PLL (RF)
&
Integer-N
PLL (IF)
IF Band
Integer-N
PLL
IF Band
Integer-N
PLL
With 68 bit
Flash
memory
Input frequency
band of prescaler
PLL type
Prescaler
divide ratio
500 MHz to
2.0 GHz
RF Sigma-Delta
16/17/18
1.0 GHz to
3.5 GHz
RF Sigma-Delta
16/17/18
500MHz to
2.0 GHz
RF Sigma-Delta
16/17, 20/21
100 MHz to
600MHz
IF
Integer-N
8/9, 16/17
233.15/
259.20MHz
IF
Integer-N
16/17
Part number
High-speed lock-up/Low
MB15E65UV noize
Modulo : 218/ 215
High-speed lock-up/Low
MB15E64UV noize
Modulo : 218/ 215
High-speed lock-up
MB15F63UL
MB15C101
10 to
330MHz
(1.2 V to
1.5 V)
IF
Integer-N
64/65
MB15C02
100 to 500
MHz
IF
Integer-N
8/9
16/17
MB15C51
8
Modulo : 220
LPF switch
IF PLL for PHS
With no external setting
of a divide ratio
Low voltage
Integer-N :Integer-N technology
Sigma-Delta:Sigma-Delta fractional-N technology
(Continued) (Continued)
Features
Low power dissipation
With setting of a divide
ratio
68 bit Flash memory
(Internal)
With setting of 2 divide
ratio
Wireless Communication Products
Part number
Input
frequency
band (Hz)
min
Divide ratio
PLL
Type
max
Program
counter
Prescaler
MB15E65UV 500 M 2.0 G
16/17/18
Binary 8 bit Binary 4 bit Binary 6 bit
9 to 255
0 to 15
1 to 63
4.6
0.1
2.7 3.0
3.3
18P
16/17/18
Binary 8 bit Binary 4 bit Binary 6 bit
9 to 255
0 to 15
1 to 63
4.6
0.1
2.7 3.0
3.3
18P
SigmaDelta
MB15E64UV 1.0 G 3.5 G
Swallow
counter
Power supply
Pack
Power Power
voltage
age
supply save
(V)
current current
typ
typ
Reference (mA)
(µA) min typ max BCC
counter
Package: P - Plastic
• Single Sigma-Delta Fractional-N PLL (RF) & Integer-N PLL (IF)
Part number
Input
frequency
band (Hz)
min
Divide ratio
PLL
Type
max
Program
counter
Swallow
counter
Reference
counter
Binary 7bit
5 to 127(RF)
Binary 11bit
3 to 2047(IF)
Binary 4bit
0 to 15(RF)
Binary 7bit
0 to 127(IF)
Binary 6bit
1 to 63(RF)
Binary
14 bit
3 to 16383(IF)
Prescaler
Sigma
500M 2.0G -Delta, RF : 16/17,
20/21,
MB15F63UL
100M 600M Integer IF : 8/9,16/17
-N
Power
Pack
Power Power
supply
age
supply save
voltage (V)
current current
typ
typ
(mA)
(µA) min typ max BCC
6.1
1.4
0.1
0.1
2.7 3.0 3.3 20P
Package: P - Plastic
• IF Band Integer-N PLL
Part number
Input
frequency
band (Hz)
min
Power Power Power supply Package
voltage (V)
supply save
current current
typ
typ
Program Swallow Reference (mA)
(µA) min typ max SSOP BCC
Prescaler
counter counter
counter
Divide ratio
PLL
Type
max
MB15C101
233.15
259.20
IntegerN
16/17
291
33
7
12
384
40
1.0
−
2.4 3.0 3.6
8P
16P
MB15C02
10 M 330M
IntegerN
64/65
12bit,
5 to 4095
6bit,
0 to 63
14bit,
16 to 16383
1.0
70
1.0 1.2 1.5
16P
20P
−
Package: P - Plastic
• IF Band Integer-N PLL (with 68 bit Flash memory)
Part number
Input
frequency
band (Hz)
min
MB15C51
max
100 M 500 M
* : When memory writing
: New product
Power Power Power supply
Package
voltage (V)
supply
save
PLL
current current
Type
typ
typ
Program Swallow Reference (mA)
(µA) min typ max SSOP BCC
Prescaler
counter counter counter
Divide ratio
IntegerN
8/9
16/17
11 bit
3 to 2047
6 bit
0 to 63
10 bit
3 to 1023
3.0
0.1
2.7
3.0
3.5
4.9 5.0 * 5.1
16P
16P
Package: P - Plastic
9
ASSP
• Single Sigma-Delta Fractional-N PLL
Wireless Communication Products
(Continued)
(Continued)
Application
Frequency
band
IF transmission
and reception
for PHS
PHS
1.9 GHz
Specific power
saving
communication
ISM
Semicustom
IF PLL
(Continued)
10
Part number
MB15H110
PHS (for IF Upper-Lo)
QMOD, Up-Converter, VGA,
2nd MIX, LIMAMP, RSSI, IF-PLL,
IF-VCO TANK circuit (internal)
MB15H121
Prescaler divide ratio
8/9
PA, Σ∆PLL, FSK-MOD, LNA,
MIXER, LIMAMP, RSSI, FSK-DEM,
VCO TANK circuit (internal)
MB15C100 series
Prescaler divide ratio
8/9, 16/17, 32/33
to 380 MHz : Vin = -10 to +2 dBm
to 500 MHz : Vin = -5 to +2 dBm
430 MHz
to 300 MHz
(2.4 to 3.6 V)
to 380 MHz
(2.4 to 3.0 V)
to 500 MHz
(2.4 to 3.6 V)
Features
Wireless Communication Products
Part number
Application
MB15H110
Frequency
band
(GHz)
PHS
1.9
Power
supply
current
typ (mA)
Functions
PHS (for IF Upper-Lo)
QMOD, Up-Converter, VGA, 2ndMIX,
LIMAMP, RSSI,
IF-PLL, IF-VCO TANK circuit (internal)
29.7 : TX
10.5 : RX
Power Power supply
Package
save
voltage (V)
current
typ (µA) min typ max
BCC
0.3
40P
2.7 2.9 3.1 (0.75 mm
thickness)
Package: P - Plastic
• Specific power saving communication
Part number
Frequency
band
Application
(MHz)
MB15H121
ISM
430
Power
supply
current
typ (mA)
Functions
Prescaler divide ratio
8/9
PA, Σ∆PLL, FSK-MOD, LNA, MIXER,
LIMAMP, RSSI, FSK-DEM,
VCO TANK circuit (internal)
6.7 (PLL)
23.0 (TX)
5.0 (RX)
Power Power supply
Package
save
voltage (V)
current
typ (µA) min typ max
LQFP
0.3
2.2 2.5 2.8
: New product
48P
Package: P - Plastic
• Semicustom IF PLL
Part number
(Series name)
Frequency band
(MHz)
to 300
MB15C100 series
*1
Prescaler divide Power supply current Power supply
voltage (V)
ratio
(mA)
(2.4 to 3.6 V)
to 380 *1 (2.4 to 3.0 V)
8/9, 16/17, 32/33
2
to 500 * (2.4 to 3.6 V)
*1: Input sensitivity –10 to +2 dBm
*2: Input sensitivity –5 to +2 dBm
1.2
(300 MHz, VCC = 3 V)
+2.4 to +3.6
Package
SSOP
BCC
8P
16P
(S type)
Package: P - Plastic
11
ASSP
• IF transmission and reception for PHS
Wireless Communication Products
(Continued))
Application
VCO *
Single Type
(700 MHz to
2500 MHz)
Dual Type
(800 MHz to
2500 MHz)
Unbalance/
balance
SAW
duplexer *
SAW
filter *
Unbalance
Balance
CDMA, GSM,
PCS, PHS
AMPS/PCS
CDMA/PCS
Size (mm)
12
Features
VC-90 series
Compact type with wide variable frequency
band
VC-10* series
Ultra Compact type with wide variable frequency band
V08 series
Compact dual band type with band selection
function
V09 series
Compact dual band type with band selection
function
Part number
Correspondence system
5.0 × 5.0
D6CZ series
K-PCS, US-PCS
3.8 × 3.8
D5CF series
AMPS/CDMA
D5CQ series
J-CDMA
3.0 × 2.5
D5GA series
AMPS/CDMA
2.0 × 1.6
F5/F6EA series
AMPS/CDMA, GSM850, EGSM, J-CDMA,
DCS, US-PCS, GSM1900, W-CDMA, GPS
1.4 × 1.0
F5/F6KA series
AMPS/CDMA, GSM850, EGSM, J-CDMA,
DCS, US-PCS, GSM1900, W-CDMA, GPS
F5/F6EB series
(5 pins)
AMPS/CDMA, GSM850, EGSM, J-CDMA,
DCS, US-PCS, GSM1900, W-CDMA, GPS
F5/F6EC series
(6 pins)
GSM850, EGSM, DCS, GSM1900, W-CDMA
F5/F6KB series
AMPS/CDMA, GSM850, EGSM, J-CDMA,
DCS, US-PCS, GSM1900, W-CDMA, GPS
2.0 × 1.6
1.4 × 1.0
(Continued))
Part number
*: Product of FUJITSU MEDIA DEVICES LIMITED
Wireless Communication Products
VCO
VC-90 series
VC-10* series
V08 series
V09 series
Application
Frequency (MHz)
Power supply
voltage (V)
CDMA,GSM,PCS,PHS
700 to 2500
2.5 to 3.3
AMPS•CDMA/PCS
800 to 2500
2.8
Functions
Voltege Controlled
Oscillator
Package Typ.
(mm)
5.0 × 4.0 × 1.55
4.5 × 3.2 × 1.5
5.5 × 4.8 × 1.8
5.0 × 4.0 × 1.4
ASSP
Part number
(Product of FUJITSU MEDIA DEVICES LIMITED)
SAW Duplexer for Mobile Communication System
Correspondence
system
Size (mm)
3.8 ×
3.0 ×
3.8 ×
5.0 ×
5.0 ×
AMPS/CDMA
J-CDMA
K-PCS
US-PCS
3.8
2.5
3.8
5.0
5.0
Part Number
FAR-D5CF-881M50-D1F1
FAR-D5GA-881M50-D1AA
FAR-D5CQ-906M00-D1Q1
FAR-D6CZ-1G8550-D1T1
FAR-D6CZ-1G9600-D1XC
Remarks
Two types of package are available
Two types of package are available
Two types of package are available
Two types of package are available
Two types of package are available
(Product of FUJITSU MEDIA DEVICES LIMITED)
SAW Filter for Mobile Communication System
Correspondence Transmission/
Size (mm)
system
Reception
Transmission
AMPS/CDMA,
GSM850
2.0 × 1.6
1.4 × 1.0
2.0 × 1.6
Reception
1.4 × 1.0
Transmission
2.0 × 1.6
1.4 × 1.0
2.0 × 1.6
EGSM
Reception
1.4 × 1.0
Transmission
2.0 × 1.6
1.4 × 1.0
2.0 × 1.6
J-CDMA
Reception
1.4 × 1.0
2.0 × 1.6
GPS
1.4 × 1.0
2.0 × 1.6
DCS
Reception
1.4 × 1.0
Transmission
2.0 × 1.6
1.4 × 1.0
2.0 × 1.6
US-PCS, GSM1900
Reception
1.4 × 1.0
2.0 × 1.6
Transmission
1.4 × 1.0
W-CDMA
2.0 × 1.6
Reception
1.4 × 1.0
Part number
FAR-F5EA-836M50-D27A
FAR-F5KA-836M50-D4CM
FAR-F5EA-881M50-D27B
FAR-F5EB-881M50-B2JJ
FAR-F5EB-881M50-B28W
FAR-F5EC-881M50-B29W
FAR-F5KA-881M50-D4CH
FAR-F5KB-881M50-B4ED
FAR-F5KB-881M50-B4EA
FAR-F5EA-897M50-D27C
FAR-F5KA-897M50-D4CN
FAR-F5EA-942M50-D27F
FAR-F5EB-942M50-B28E
FAR-F5EC-942M50-B29C
FAR-F5KA-942M50-D4CJA
FAR-F5KB-942M50-B4EB
FAR-F5EA-906M00-D27E
FAR-F5KA-911M50-D4CC
FAR-F5EA-851M00-L27P
FAR-F5EB-851M00-B28Y
FAR-F5KA-856M50-D4CE
FAR-F5KB-856M50-B4EC
FAR-F6EA-1G5754-L2AZ
FAR-F6EB-1G5754-B2BS
FAR-F6KA-1G5754-L4AA
FAR-F6KB-1G5754-B4GE
FAR-F6EA-1G8425-D2ABA
FAR-F6EB-1G8425-B2BG
FAR-F6EC-1G8425-B2CE
FAR-F6KA-1G8425-D4CK
FAR-F6KB-1G8425-B4GA
FAR-F6EA-1G8800-L2AN
FAR-F6KA-1G8800-L4AF
FAR-F6EA-1G9600-D2AC
FAR-F6EB-1G9600-B2BK
FAR-F6EB-1G9600-B2BW
FAR-F6EC-1G9600-B2CW
FAR-F6KA-1G9600-D4CR
FAR-F6KB-1G9600-B4GP
FAR-F6KB-1G9600-B4GB
FAR-F6EA-1G9500-D2AL
FAR-F6EB-1G9500-B2BQ
FAR-F6KA-1G9500-D4CD
FAR-F6KB-1G9500-B4GJ
FAR-F6EA-2G1400-L2HL
FAR-F6EB-2G1400-B2BN
FAR-F6EB-2G1400-B2BP
FAR-F6EC-2G1400-B2CP
FAR-F6KA-2G1400-D4CG
FAR-F6KB-2G1400-B4GC
FAR-F6KB-2G1400-B4GD
Remarks
Unbalanced
Unbalanced
Unbalanced
5 pins, Balanced 100ohm output
5 pins, Balanced 150ohm output
6 pins, Balanced 150ohm output
Unbalanced
Balanced 100ohm output
Balanced 150ohm output
Unbalanced
Unbalanced
Unbalanced
5 pins, Balanced 150ohm output
6 pins, Balanced 150ohm output
Unbalanced
Balanced 150ohm output
Unbalanced
Unbalanced
Unbalanced
5 pins, Balanced 100ohm output
Unbalanced
Balanced 100ohm output
Unbalanced
5 pins, Balanced 100ohm output
Unbalanced
Balanced 100ohm output
Unbalanced
5 pins, Balanced 150ohm output
6 pins, Balanced 150ohm output
Unbalanced
Balanced 150ohm output
For Full Band
For Full Band
Unbalanced
5 pins, Balanced 100ohm output
5 pins, Balanced 150ohm output
6 pins, Balanced 150ohm output
Unbalanced
Balanced 100ohm output
Balanced 150ohm output
Unbalanced
5 pins, Balanced 100ohm output
Unbalanced
Balanced 100ohm output
Unbalanced
5 pins, Balanced 100ohm output
5 pins, Balanced 200ohm output
6 pins, Balanced 200ohm output
Unbalanced
Balanced 100ohm output
Balanced 200ohm output
(Product of FUJITSU MEDIA DEVICES LIMITED)
13
Wireless Communication Products
(Continued))
Dual SAW
filter *
IF SAW
filter *
Unbalance/
balance
Size (mm)
Part number
Unbalance
2.5 × 2.0
G5/G6ED series
GSM850 + EGSM
Balance
2.5 × 2.0
G5/G6EE series
EGSM + DCS,
GSM850 + EGSM, DCS + GSM1900
2.0 × 1.6
G5/G6KE series
EGSM + DCS,
GSM850 + EGSM, DCS + GSM1900
1.8 × 1.4
G5/G6KG series
EGSM + DCS,
GSM850 + EGSM, DCS + GSM1900
3.8 × 3.8
F4CH series
PHS
Correspondence system
*: Product of FUJITSU MEDIA DEVICES LIMITED
14
Wireless Communication Products
Correspondence Transmission/
Size (mm)
system
Reception
EGSM + DCS
2.5 × 2.0
FAR-G6EE-1G8425-Y2PN
2.0 × 1.6
FAR-G6KE-1G8425-Y4QG
1.8 × 1.4
FAR-G6KG-1G8425-Y4SA
2.5 × 2.0
FAR-G5ED-897M50-D2DE
2.5 × 2.0
FAR-G5EE-942M50-Y2PB
2.0 × 1.6
FAR-G5KE-942M50-Y4QA
1.8 × 1.4
FAR-G5KG-942M50-Y4SD
2.5 × 2.0
FAR-G6EE-1G9600-Y2PR
2.0 × 1.6
FAR-G6KE-1G9600-Y4QB
1.8 × 1.4
FAR-G6KG-1G9600-Y4SC
Transmission
1.8 × 1.4
FAR-G6KG-1G9500-Y4PF
Reception
1.8 × 1.4
FAR-G6KG-2G1400-Y4SE
Reception
Transmission
GSM850 + EGSM
DCS + GSM1900
W-CDMA
800MHz + 2GHz
Part number
Reception
Reception
ASSP
SAW Dual Filter for Mobile Communication System
Remarks
Balanced 150ohm output, Opposite type of Filter
position is available.
Balanced 150ohm output
Balanced 150ohm output, Opposite type of Filter
position is available.
Unbalanced
Balanced 150ohm output, Opposite type of filter
position is available.
Balanced 150ohm output, Opposite type of filter
position is available.
Balanced 150ohm output, Opposite type of filter
position is available.
Balanced 150ohm output, Opposite type of filter
position is available.
Balanced 150ohm output, Opposite type of filter
position is available.
Balanced 150ohm output, Opposite type of filter
position is available.
Balanced 200ohm intput, Opposite type of filter
position is available.
Balanced 200ohm output, Opposite type of filter
position is available.
(Product of FUJITSU MEDIA DEVICES LIMITED)
IF SAW filter for Mobile Communication System
Correspondence
system
PHS
Size (mm)
3.8 × 3.8
Part number
FAR-F4CH-243M95-T101D
Remarks
Low Insertion loss
(Product of FUJITSU MEDIA DEVICES LIMITED)
15
Communication Control/Communication Network
Communication
standard
Communication
control
Part number
Features
ISDN
MB86434
Serial interface to microcontroller,
AIU LSI for ISDN digital telephones
IP Packet
Processing
Engine
MB86977
High-speed packet processing engine for
access router or home gateway
High-speed
IP sec
Processing
Engine
MB86978
Inline Ipsec processing, DES/3DES,
AES, HMAC-SHA-1, HMAC-MD5, SA:64,
IPv6, 10/100M MAC
MBH2WLZ07
SDIO Card with wireless function of conforms to IEEE802.11b.
Conforms to SDIO Card Specification
Version 1.00.
MBH7WLZ07
Small module with wireless function of
conforms to IEEE802.11b.
Wireless
LAN
Wireless
LAN
Card *
Wireless
LAN
module *
*: Product of FUJITSU MEDIA DEVICES LIMITED
Part number
Communication
network
16
LAN
LAN controller
MB86967
Features
10BASE-T LAN controller with PC card interface
and ISA interface,
General purpose bus interface
Communication Control/Communication Network
■ Communication Control
Part number
Functions
Communication
standard
Power supply
voltage (V)
Package
QFP
MB86434
AIU LSI for ISDN digital telephones,
Internal CODEC, DTMF tones, service tone, and ringer tone
—
+5 ± 5%
64P
ASSP
ISDN
Package: P - Plastic
IP Packet Processing Engine
Part number
MB86977
Functions
Enable to process following functions with hardware.
IP Packet Forwarding
Packet Filtering
NAT
PPPoE
and more.
Supports QoS, DMZ, IPv6 and more.
10/100M MAC (Conforms to IEEE802.3)
Power supply
voltage (V)
Package
LQFP
3.3 ± 0.3
1.8 ± 0.15
208P
Package: P - Plastic
High Speed IP sec Processing Engine
Part number
MB86978
Power supply
voltage (V)
3.3 ± 0.3
1.8 ± 0.15
Functions
Inline Ipsec processing, DES / 3DES,AES,HMAC - SHA-1,HMACMD5,SA:64,IPv6,10 / 100M MAC
Package
FBGA
337P
288P
Package: P - Plastic
Wireless LAN Card
Part number
Communication
Transfer
Power supply Package
standard
speed (bps) voltage (V)
(mm)
Functions
SDIO Card with wireless function of conforms to
MBH2WLZ07 IEEE802.11b.
Supports CF host slot and simultaneous operation of
Wireless LAN, a PHS communication card, etc.
IEEE802.11b
*: It is the maximum of a theoretical price increase of a WirelessLAN standard.
11M/5.5M/
2M/1M *
+3.3 ± 5%
24 × 40
(Product of FUJITSU MEDIA DEVICES LIMITED)
Wireless LAN Mini PCI module
Part number
MBH7WLZ07
Functions
Communication
standard
Transfer speed (bps)
Small module with wireless function of conforms to IEEE802.11b.
IEEE802.11b
11M/5.5M/2M/1M *
*: It is the maximum of a theoretical price increase of a WirelessLAN standard.
Power supply Package
voltage (V)
(mm)
+3.3 ± 5%
14 × 12
(Product of FUJITSU MEDIA DEVICES LIMITED)
■ Communication Network
LAN
Part number
MB86967
Communication
standard
Power supply
voltage (V)
Package
Conforms to IEEE 802.3
+5 ± 5%
100P
Functions
10BASE-T Ethernet controller with PC card interface,
ISA bus interface and General purpose bus interface
Note: Ethernet is a registered trademark of XEROX Corporation of the USA.
LQFP
Package: P - Plastic
17
Display Control Products
Application
Display
control
products
Screen
display
control
OSDC
Part number
TV
MB90050
MB90096
512 character sets, 24 × 32 dot matrix, 32 characters ×
16 lines (512 characters) display, 16 colors,
Independently specifiable for each character,
Shaded background, Sprite display,
Command table ROM 16KB,
5 V power supply voltage
MB90098A
512 character sets, 24 × 32 dot matrix, 32 characters ×
16 lines (512 characters) display, 16 colors,
Independently specifiable for each character,
Shaded background, Sprite display,
Command table ROM 16KB, 2 pixel parallel output,
3.3 V power supply voltage
MB90097
512 character sets, 12 × 18 dot matrix,
28 characters × 12 lines (336 characters) display,
16 colors, Independently specifiable for each character,
Shaded background, Sprite display,
Three output control,
3.3 V power supply voltage
MB90099
1024 character sets, 12 × 18 dot matrix,
28 characters × 12 lines (336 characters) display,
16 colors, Independently specifiable for each character,
Shaded background, Sprite display,
Three output control,
3.3 V power supply voltage
MB90092
16384 character sets (external ROM),
24 × 32 dot matrix, 24 characters × 12 lines (288 characters) display,
8 colors, Independently specifiable for each character,
Shaded background,
Sub screen display, Video signal generator for the NTSC
and PAL system, Composite video and Y/C video,
5 V power supply voltage
LCD display
Camcoder /
Digital Still
Camera
General
purpose
18
Features
512 character sets, 24 × 32 dot matrix, 35 characters ×
16 lines (560 characters) display, 16 colors,
Independently specifiable for each character,
Shaded background, Sprite display,
Video signal generator for the NTSC and PAL system,
Composite video and Y/C video,
5 V power supply voltage
Display Control Products
■ Display Control Products
OSDC (On-Screen Display Controller)
Part number
MB90050
Character
generator
Number
Character
of
dot
character
structure
set
Screen
size
Analog
(video)
output
6bit
35
Composite
(16 color
characters
Video and
selection in
× 16 lines 64 colors) Y/C video
Internal ROM
Power
512
MB90098A
(V)
NTSC
PAL
32
characters
× 16 lines
4bit
Unavailable Unavailable
(16 colors)
Internal ROM
MB90097
MB90099
1024
External ROM
16384
(Max.)
28
12 × 18 characters
× 12 lines
Composite
24
3bit
Video and
24 × 32 characters
(8 colors)
Y/C video
× 12 lines
Package
Sync
supply
signal
SHSOP QFP SSOP FLGA
generation voltage
DIP
24 × 32
MB90096
MB90092
RGB
digital
output
NTSC
PAL
+5
±10%
—
— 48P
—
—
+5
28P 28P —
±10%
—
—
— 28P —
—
—
—
+3.3
±0.3
—
—
—
20P
+2.4 to
—
+3.6
—
—
20P 20P
+5
±10%
— 80P
—
—
—
Package: P - Plastic
19
ASSP
Screen Display Control
Video/Audio Products
Video/Audio
products
SAW filter
(IF) *
Analog
40 to 60 MHz
Digital
40 to 60 MHz
Double
conversion
system
1 GHz band
Part number
F0** series
F4SA series
G4SB series
K4SD series
Features
Plastic package 13.7 × 5.2 × 2.1 mm
For Inter carrier, Split-carrier
Single, Dual filter (Switchable)
Flat in passband, high attenuation
SBF series
F4SE series
K4SH series
Plastic package 13.7 × 5.2 × 2.1 mm
For terrestrial, CATV, Cable modem
Single, Dual filter (Switchable)
Flat in passband, high attenuation
F6CV series
Ceramic package 2.5 × 2.0 × 1.0 mm
1st IF for 1 chip tuner
200 Ω I/O Balanced
Unbalanced, high attenuation
*: Product of FUJITSU MEDIA DEVICES LIMITED
20
Video/Audio Products
■ Video/Audio Products
Applicable types
NTSC Japan
NTSC USA
PAL, PAL Multi
System
Video/Audio
Split-Carrier (single)
Split-Carrier (single)
Split-Carrier (dual)
Inter-Carrier (single)
Split-Carrier (single)
Split-Carrier (single)
Split-Carrier (dual)
Inter-Carrier (single)
Inter-Carrier (single)
Split-Carrier (single)
Split-Carrier (single)
Split-Carrier (Switchable)
Split-Carrier (Switchable)
Split-Carrier (Switchable)
Video
Audio
Video + Audio
Video
Video
Audio
Video + Audio
Video
Video
Video
Audio
Video + Video
Video + Video
Audio + Audio
Picuture carrier
frequency (MHz)
Part number
58.75
FAR-F4SA-58M750-A008
FAR-F4SA-54M250-B011
58.75
58.75
FAR-G4SB-58M750-D011
45.75
F072TPL-A
FAR-F4SA-45M750-A024
45.75
45.75
FAR-F4SA-41M250-B021
45.75
FAR-G4SB-45M750-D001
FAR-F4SA-38M000-A009
38.00
38.90
FAR-F4SA-38M900-A041
38.90
FAR-F4SA-38M900-A072
FAR-F4SA-40M400-B071
38.90
38.00
FAR-K4SD-38M000-F002
38.00
FAR-K4SD-38M000-F011
FAR-K4SD-40M400-G002
33.90/38.90
(Product of FUJITSU MEDIA DEVICES LIMITED)
IF SAW Filter for Digital
Applicable types
Center frequency (MHz)
DTV
&
CATV (QAM)
36.000
36.000
36.125
36.125
36.125
43.750
44.000
44.000
44.000
44.000
44.000
44.000
44.000
44.000
36.170
57.000
57.000
44.000
3 dB Bandwidth (MHz)
Part number
8.10
FAR-F4SE-36M000-A005
8.20
FAR-F4SE-36M000-A002
FAR-F4SE-36M125-A001
6.10
7.00
SBF0407BPL
8.00
FAR-F4SE-36M125-A004
FAR-F4SE-43M750-A006
6.00
5.49
FAR-F4SE-44M000-H0A1
6.12
FAR-F4SE-44M000-H0A2
FAR-F4SE-44M000-H0A3
4.00
5.37
FAR-F4SE-44M000-H0A4
6.00
FAR-F4SE-44M000-A007
FAR-F4SE-44M000-H0A9
6.00
6.20
FAR-F4SE-44M000-A008
8.00
SBF0408LPL
FAR-K4SH-36M170-F003
7.0/7.9 (Switchable)
6.00
FAR-F4SE-57M000-H0J1
FAR-F4SE-57M000-H0J3
5.60
2.60
FAR-F4SE-44M000-H0A6
(Product of FUJITSU MEDIA DEVICES LIMITED)
IF SAW Filter for Double Conversion System
Applicable types
1st IF
Center frequency (MHz)
Bandwidth (MHz)
1086
1220
10
8
Part number
FAR-F6CV-1G0860-C27B
FAR-F6CV-1G2200-C27A
(Product of FUJITSU MEDIA DEVICES LIMITED)
21
ASSP
IF SAW Filter for Analog
Demodulator products
Part number
Demodulator
products
8PSK Silicon Tuner
MB86A10
MB86A15
All functions (direct conversion, PLL, QPSK and FFC) are
implemented.
No external inductors or vari-cap diode.
No 30V power supply for channel tuning.
Input frequency range : 950 to 2150MHz.
Symbol rates : 1 to 45 Mbaud.
MB86A20
Support Japanese Terrestrial Digital TV and Digital Radio.
All memory such as time-interleave is implemented.
Input signal : 4MHz-IF or 57MHz-IF
Output signal : serial or parallel TS
MBG016
Support all functions of MB86A20.
Support various function, such as the monitoring of input
signal alarm, the monitoring of constellation and AC output.
QPSK Silicon Tuner
OFDM
22
Features
All tuner functions (direct conversion, PLL, 8PSK and FFC)
are implemented.
No external inductors or vari-cap diode.
No 30V power supply for channel tuning.
Input frequency range : 950 to 2150MHz.
Demodulator products
■ Demodulator products
Part number
MB86A10
Function
RF tuner + 8PSK demodulator
Digital BS support
ASSP
8PSK Silicon Tuner
Package
Power supply voltage (V)
QFP
2.3 to 2.7
3.0 to 3.6
4.75 to 5.25
120P
Package: P - Plastic
QPSK Silicon Tuner
Part number
MB86A15
Function
RF tuner + QPSK demodulator
DVB-S and DSS support
Package
Power supply voltage (V)
QFP
2.3 to 2.7
3.0 to 3.6
4.75 to 5.25
120P
Package: P - Plastic
OFDM
Part number
Function
Power supply voltage (V)
Package
FBGA
QFP
MB86A20
OFDM demodulator
ISDB-T support
1.4 to 1.6
1.65 to 1.95
3.0 to 3.6
144P
-
MBG016
OFDM demodulator of the high grade type
ISDB-T support
1.4 to 1.6
1.65 to 1.95
3.0 to 3.6
-
208P
Package: P - Plastic
23
Power Management Applications
Power
Management
Applications
AC/DC
converters
Oscillator
frequencies
(kHz)
Error
amplifiers
300
Operational
amplifier type
MB3759
Push-pull, Single-end function
switchable, TL494-equivalent
700
Operational
amplifier type
MB3769A
MOS FET compatible,
Dynamic over-current detection
200
Operational
amplifier type
MB3789
Adaptable for external synchronization.
Two internal error amplifiers
500
Operational
amplifier type
MB3817
Power on/off control function
MB3885
Synchronous rectification
Built-in over voltage protection circuit
MB3800
Low voltage operation,
Internal timer-latch type short
protection circuit
Part number
Features
Number of
Channels
General
purpose
DC/DC
converters
1
2
(Continued)
24
(Continued)
1000
Fixed gain
type
600
Comparator
type
500
Fixed gain
type
MB3775
Low voltage operation
Operational
amplifier type
MB3778
Low voltage operation,
Power on/off control function
MB3821
Synchronous rectification
MB3882
Synchronous rectification
Built-in over voltage protection circuit
MB3889
Synchronous rectification
Built-in timer-latch type over voltage protection
circuit, timer-latch type over current protection
circuit (Unnecessary current sense resistor)
Symmetrical-Phase method adoption
MB39A106
Synchronous rectification
Built-in boot strap diode,
timer-latch type over voltage protection circuit,
timer-latch type over current protection circuit
(Unnecessary current sense resistor)
Symmetrical-Phase method adoption
Bottom detection comparator type
Synchronous rectification
Adjustable built-in inductor saturation protection
Built-in over voltage protection
MB39A120A
Built-in low voltage protection
Built-in over current detection
Built-in soft-start circuit independent of loads
Built-in discharge control circuit
1500
Operational
amplifier type
MB39A104
Built-in over current protection circuit (Unnecessary current sense resistor)
2000
Operational
amplifier type
MB39C011
Synchronous rectification
Built-in soft-start circuit independent of loads
Power Management Applications
■ Power Management Applications
Part number
Function
MB3759
Power supply
voltage (V)
No. of
channels
Operating oscillator
Reference voltage
frequency
(V) (Typ.) Precision (%)
(kHz) (Max.)
+7 to +32
300
PWM-type controllers
for AC/DC converters
MB3769A
1
Package
SOP
5.0
16P
2.0
16P
5
+12 to +18
700
Packages: P - Plastic
General purpose DC/DC Converters
Part number
Function
+3.0 to +18
MB3789
MB3817
MB3885
Operating
oscillator Reference voltage
Power
No. of
frequency
supply
channels
(kHz)
voltage (V)
(V)
Precision
(Max.)
(Typ.)
(%)
PWM-type
controllers
for DC/DC
converters
MB3800
4.0
Up conversion
−
16P
−
−
1.5
2.0
Down conversion
Up/Down
conversion
−
16P
−
−
2.5
1.0
Down conversion
−
20P
−
−
1000
(0.5)
4.0
Up conversion
8P
8P
16P
−
600
2.5
1.5
Down conversion
−
24P
−
24P
1.28
1.5
16P
16P
−
−
16P
16P
−
−
−
24P
−
−
−
24P
−
−
−
−
30P
−
−
−
30P
−
+2.5 to +18
500
+5.5 to +18
+1.8 to +15
Bottom
detection
comparator
+4.5 to +25
type
MB39A120A
controlers
for DC/DC
converters
1
SOP SSOP TSSOP QFN
2.5
200
1
Package
Solutions
MB3775
+3.6 to +18
MB3778
2.46
Up conversion
Down conversion
Invert
2.0
MB3821
+4.5 to +30
500
MB3882
MB3889
PWM-type
controllers
for DC/DC
converters
+5.5 to +18
2.5
2
3.5
Down conversion
1.0
MB39A106
+6.5 to +18
MB39A104
+7 to +19
1500
5.0
−
24P
−
−
MB39C011
+4.5 to +17
2000
1.0
−
−
16P
24P
: New product
Packages: P - Plastic
25
ASSP
AC/DC Converters
Power Management Applications
(Continued)
(Continued)
Number of Oscillator
frequencies
Channels
(kHz)
3
DC/DC
converters with
switching FET
1
2
(Continued)
26
Error
amplifiers
500
Operational
amplifier type
2600
Operational
amplifier type
2000/
3000
Fixed gain
type
2000
Part number
Features
MB3782
High generality
MB39A112
Supports for control and soft-start of
each channel
High-precision reference voltage
MB39C014
Current mode type
Built-in LDO mode
Low consumption current
Synchronous rectification
Built-in POWER GOOD function
MB39C015
Current mode type
Built-in LDO mode
Low consumption current
Synchronous rectification
Built-in voltage detection function
Fixed gain
type
Power Management Applications
Part number
Function
Power
supply
voltage
(V)
PWM-type +3.6 to +18
controllers for
DC/DC
MB39A112 converters
+7 to +25
No. of
channels
Operating
Reference voltage
oscillator
(V)
frequency
(kHz) (Max.) (Typ.) Precision (%)
Package
Solutions
SOP
TSSOP
500
2.5
2.0
Up conversion
Down conversion
Invert
20P
−
2600
(1.0/
1.23)
1.0
Down conversion
−
20P
MB3782
3
Packages: P - Plastic
DC/DC converters with switching FET
Part number
MB39C014
MB39C015
Function
Operating
Power
oscillator
supply No. of
frequency
voltage channels
(kHz)
(V)
(Max.)
PWM type
controllers +2.5 to
for DC/DC
+5.5
converters
: New product
1
2
2000/3000
(Fix)
2000 (Fix)
Reference
voltage
(V)
(Typ.)
Output
current
Package
Bypass Solutions
Preci DC/DC Bypass Pch Nch
FET
FET MOS MOS
BCC SSOP QFN SON
sion (mA) (mA)
(Ω)
(Ω)
(Ω)
(%) (Max) (Max) (Typ) (Typ)
(Typ)
−
2.5
(Output
voltage)
Switching FET
ON resistance
2.0
800
−
0.3
−
10P
−
−
10P
20P
20P
24P
−
Down
conversion
0.2
−
Packages: P - Plastic
27
ASSP
General purpose DC/DC Converters
Power Management Applications
(Continued)
Number of Oscillator
frequencies
Channels
(kHz)
DSC/
camcorder
DC/DC
converters
4
6
8
(Continued)
28
Part number
Features
1000
Operational
amplifier type
MB3785A
Internal high-precision reference voltage circuit,
Channel on/off control function
1500
Operational
amplifier type
MB39A102
Support for control and soft-start of each channel,
High-precision reference voltage,
Support for external input short detection
MB39A103
Low voltage operation,
Support for control and soft-start of each channel,
High-precision reference voltage,
Support for external input short detection.
MB39A110
Synchronous rectification
Support for control and soft-start of each channel,
High-precision reference voltage,
Support for external input short detection
MB39A108
Low voltage operation
Synchronous rectification
Supports for control and soft-start of each channel
High-precision reference voltage
Support for external input short detection
MB39A115
Synchronous rectification
Supports for control and soft-start of each channel
High-precision reference voltage
Support for external input short detection
MB39A121
Synchronous rectification
Supports for control and soft-start of each channel
High-precision reference voltage
Support for external input short detection
MB3825A
High-precision reference voltage,
Synchronous rectification
MB3883
Low voltage operation,
High-precision reference voltage,
Synchronous rectification
MB39A123
Low voltage operation,
Synchronous rectification
Supports for control and soft-start of each channel
High-precision reference voltage,
Support for external input short detection
MB3881
Low voltage operation,
High-precision reference voltage,
Synchronous rectification,
Adaptable for external synchronization.
2000
5
Error
amplifiers
2000
Operational
amplifier type
Operational
amplifier type
800
Operational
amplifier type
1000
Operational
amplifier type
2000
Operational
amplifier type
800
Operational
amplifier type
Power Management Applications
Part number
Function
Operating
Reference
Power
oscillator
voltage
supply
No. of
frequency
voltage channels
(kHz)
(V) Precision
(V)
(Max.)
(Typ.)
(%)
MB3785A
+4.5 to
+18
MB39A102
+2.5 to
+11
1000
4
2.5
Package
Solutions
Drive
circuit
LQFP BCC TSSOP
Down conversion
PNP :4
48P
—
—
Pch : 3,
Nch : 1
—
32P
30P
—
32P
30P
—
—
38P
—
40P
38P
—
40P
38P
1500
MB39A103
+1.7 to
+11
Pch : 1,
Nch : 3
MB39A110
+2.5 to
+11
Pch : 3,
Up conversion
Nch : 1
Down conversion
Up/Down conversion Pch : 3,
Nch : 2
2.0
MB39A108
+1.7 to
+11
MB39A115
MB39A121
MB3825A
MB3883
PWM-type
controllers
for DC/DC
converters
ASSP
DSC/Camcorder DC/DC Converters
2000
Pch : 4,
Nch : 1
5
1.0
+2.5 to
+11
Pch : 4,
Nch : 1
48P 40P
—
+2.5 to
+12
800
1.5
+1.7 to +9
1000
2.5
Up conversion
Pch : 2,
Down conversion
Nch : 4
Up/Down conversion
48P 48P
—
2000
2.0
Up conversion
Pch : 4,
Down conversion
Up/Down conversion Nch : 2
Invert
48P 48P
—
800
2.5
Down conversion
Pch : 7,
Up/Down conversion Nch : 1
64P*
—
6
MB39A123
+1.7 to
+11
MB3881
+1.8 to
+13
* : 0.4 mm pitch
** : 0.4 mm pitch, 0.5 mm pitch
8
Down conversion
PNP : 6 64P** —
—
—
Packages: P - Plastic
29
Power Management Applications
(Continued)
Number of
cells
Secondary
battery
Charge
control
4 cells
3/4 cells
3 cells
1 to 3 cells
1 to 4 cells
(Continued)
30
Part number
Features
MB3876
Applicable to lithium ion battery (4-cell) charging.
Parallel charging , Dynamically-controlled charging.
MB3877
Applicable to lithium ion battery (4-cell) charging.
Dynamically-controlled charging.
MB3879
Applicable to lithium ion battery (3/4-cell) .
2 mode charging (Dynamically-controlled charging,
differential charging)
MB39A114
Built-in constant current control cicuit in two systems.
Built-in low voltage protection function.
Posssible to prevent mis-detection of the full charge by
the constant voltage control state detection function.
Built-in overvoltage detection function of charge voltage.
Built-in output voltage setting resistor.
Built-in output setting voltage switch function.
Built-in circuit for load-independent soft-start.
MB39A126
Built-in two constant current control circuits
Analog control of the charging current value
Built-in AC adapter detection function
Built-in output voltage setting resistor
Built-in charge stop function at low VCC
Built-in high accuracy current detection amplifier
In standby mode, make output voltage setting resistor open
to prevent inefficient current loss
Totem-pole type output for Pch MOS FET
MB3875
Applicable to lithium ion battery (3-cell) charging.
Dynamically-controlled charging.
MB3874
Applicable to lithium ion battery (3-cell) charging.
Parallel charging , Dynamically-controlled charging.
MB3832A
Output voltage and current independently controllable.
Applicable to 1 to 3-cell charging.
Internal high-precision reference supply voltage.
MB3878
Output voltage and current are independently controllable.
Applicable to 1 to 4-cell charging.
Internal high-precision reference supply voltage,
Dynamically-controlled charging.
MB3887
Output voltage and current are independently controllable.
Applicable to 1 to 4-cell charging.
Internal high-precision reference supply voltage.
High charging current accuracy.
Dynamically-controlled charging.
MB3888
Output voltage and current are independently controllable.
Applicable to 1 to 4-cell charging.
Internal high-precision reference supply voltage.
High charging current accuracy.
MB39A113
Built-in constant current control cicuit in two systems.
Built-in low voltgae protection function.
Posssible to prevent mis-detection of the full charge by
the constant voltage control state detection function.
Built-in overvoltage detection function of charge voltage.
Built-in circuit for load-independent soft-start.
(Continued)
Power Management Applications
Part number Function
Power
supply
voltage
(V)
Output
voltage
(V)
+7 to +25
16.8
Precision (%)
Ta = +25 ° C
Ta = -30 to +85 ° C
±0.8
±1.0
Operating
Package
oscillator
Number
frequency Solutions
of cells
SSOP LQFP QFN
(kHz)
(Max.)
MB3876
MB3877
12.6/16.8
±0.8
±1.0
12.3/16.4
±0.9
±1.1
MB3879
+8 to +25
MB39A114
3/4
12.6/16.8
±0.5
MB3874
Charge
+7 to +25
control
DC/DC
converters
MB3832A
MB3878
+3.6 to +18
12.6
Any
voltage
level
+7 to +25
±0.8
−
−
24P
−
−
—
48P
—
24P
−
−
24P
−
28P
24P
−
−
24P
−
−
20P
−
−
24P
−
−
24P
−
−
20P
−
−
24P
−
−
±0.74 *
MB39A126
MB3875
24P
4
±1.0
±0.5
±1.0*
±0.8
±1.0
3
1 to 3
500
Down
conversion
4.2 V/cell
MB3887
+8 to +25
MB3888
MB39A113
* : Ta = -10 to +85 ° C
+8 to +25
Any
voltage
level
4.2 V/cell
1 to 4
±0.5
±0.74 *
Package: P-plastic
31
ASSP
Secondary Battery (Charge Control)
Power Management Applications
(Continued)
(Continued)
Part number
MB39A118
Voltage
detectors
Features
Built-in off time control function
Built-in constant current control circuit in two systems
Possible to control of the constant current by analog value
Built-in for Nch MOS FET synchronous rectification type output
stage
Built-in battery select function
Possible to set any output voltage by external resistor
In IC standby mode, leave output voltage setting resistor open
to prevent inefficient current loss
MB39A119
Built-in off time control function
Built-in voltage detection function of AC adapter
Possible to prevent mis-detection of the full charge by the constant voltage control state detection function
Built-in constant current control circuit in two systems
Possible to control of the constant current by analog value
Built-in for Nch MOS FET synchronous rectification type output
stage
Built-in charge stop function at low VCC
Possible to set any output voltage by external resistor
In IC standby mode, leave output voltage setting resistor open
to prevent inefficient current loss
MB39A125
Built-in two constant current control circuits
Analog control of the charging current value
Built-in AC adapter detection function
External output voltage setting resistor
Built-in charge stop function at low VCC
Built-in high accuracy current detection amplifier
In standby mode, make output voltage setting resistor open to
prevent inefficient current loss
Totem-pole type output for Pch MOS FET
MB3761
Wide operating voltage range,
Easy addition of hysteresis characteristics
MB3771
Accurate supply voltage drop detection,
External add-on allows detection of any desired voltage drop
MB3773
Watchdog timer
Accurate supply voltage drop detection
Watchdog
timer
Supply
voltage
monitoring
applications
Single
system
Double
systems
Power
managemen
t
switches
32
MB3793-27A
MB3793-28A
MB3793-30A
Watchdog timer
MB3793-34A
Accurate supply voltage drop detection
MB3793-37A
MB3793-42
MB3793-45
MB3841
Low on-resistance switch
MB3842
MB3845
Low on-resistance switch
Power Management Applications
Part number
Power
supply
voltage
(V)
Function
Output
voltage
(V)
Operating
Package
oscillator
Number
frequency Solutions
of cells
SSOP QFN
(kHz)
(Max.)
Precision (%)
Ta = +25 ° C
Ta = -30 to +85 ° C
MB39A118
1000
Charge control
+8 to +25 4.2 V/cell
MB39A119
DC/DC converters
MB39A125
±0.5
±0.74 *
1 to 4
Down
conversion
500
* : Ta = -10 to +85 ° C
−
28P
−
28P
24P
28P
Package: P-plastic
Voltage Detectors
Part number
Function
MB3761
Voltage detector
Power supply voltage
(V)
Reference voltage
(V) (Typ.)
+2.5 to +40
1.2
Package
SOP
8P
Package: P - Plastic
Supply Voltage Monitoring Applications
Part number
Package
Power supply
Reset certified
Detection voltage (V) voltage (V) (Typ.)
voltage (V)
SOP SSOP
Function
Any voltage level in
addition to 4.2 V
8P
−
8P
−
2.7±0.07
8P
8P
8P
8P
8P
8P
3.4±0.08
8P
(8P)*2
3.7±0.1
8P
(8P)*2
MB3793-42 *1
4.2±0.1
8P
(8P)*2
*1
4.5±0.1
8P
8P
MB3771
Supply voltage monitoring applications
+3.5 to +18
MB3773
Supply voltage monitoring applications
with watchdog timer
+3.5 to +16
MB3793-27A *1
MB3793-28A
*1
MB3793-30A
*1
MB3793-34A
*1
+4 (Max.)
2.8±0.07
3.0±0.07
Supply voltage monitoring applications
with dual watchdog timer systems
MB3793-37A *1
MB3793-45
+6 (Max.)
0.8
*1:Detection voltages of the MB3793 series are available in the range from 2.4 V to 4.9 V in 0.1 V increments.
Package: P - Plastic
Consult with supplier.
*2:( ) option
Switching Applications
Part number
Function
Power supply
voltage (V) (Max.)
MB3841
MB3842
MB3845
Power management switch
Package
Number of
channels
On-resistance
(Ω)
Drive current
(A) (Max.)
1
0.045
2.0
8P
−
2
0.1
0.6
−
20P
5.5
SOP SSOP
Package: P - Plastic
33
ASSP
Secondary Battery (Charge Control)
Fingerprint sensor
Sensor type
Fingerprint
sensor
Part number
MBF200
Capacitive based solid-state fingerprint sensors
Resolution : 500dpi
Sensor area : 12.8mm × 15mm
Sensor array : 256 × 300
8-bit A/D converter
Power supply voltage : 3.3 V to 5 V
I/F 8-bit MPU, SPI, USB 1.1
MBF310
Capacitive based solid-state fingerprint sensors
Resolution : 500dpi
Sensor area : 10.9mm × 0.5mm
Sensor array : 218 × 8
8-bit A/D converter
Power supply voltage : 2.7 V to 3.3 V
I/F 8-bit MPU, SPI
FIFO
Static-touch
type
Sweep type
34
Features
Fingerprint sensor
■ Fingerprint sensor
Resolution Sensor area Sensor array
(dpi)
(mm)
(pixel)
MBF200
Power supply
voltage
(V)
Interface
TSOP FBGA
12.8 × 15.0
256 × 300
3.3 to 5.0
8bit MPU
SPI
USB 1.1
-
80P
-
10.9 × 0.5
218 × 8
2.7 to 3.3
8bit MPU
SPI
FIFO
-
43P
500
MBF310
Package
Others
Package: P - Plastic
35
ASSP
Part number
Smart card/RFID/Secure/Sense amplifier IC
Part number
MB89R076
Un-contacting type, ISO14443 TypeB
CPU 8-bit
Private key system
FRAM 4 Kbyte
MB94R215B
Pair type, ISO14443 TypeB, ISO7816
CPU 32-bit
Private key system / Public key system
FRAM 32 Kbyte
MB89R111
ISO14443 TypeB
FRAM 2 Kbyte
MB89R118
ISO15693 Type
FRAM 2 Kbyte
MB89R119
ISO15693 Type
FRAM 256 byte
MB89R907A
CPU 8-bit , Ellipse Code Type(ECC),
FRAM 4 Kbyte
MB42M101
Detection circuit : 3 piece built-in
Gain 240 to 2860 times
Fixed current drive for bridge
Power supply voltage : 3.0 V to 5.5 V
MB42M102
Detection circuit : 3 piece built-in
Gain 240 to 2860 times
Fixed current drive for bridge
With breakdown detection circuit
MB42M103
Detection circuit : 3 piece built-in
Gain 48 to 572 times
Fixed current drive for bridge
With breakdown detection circuit
MB42M104
Detection circuit : 3 piece built-in
Gain 240 to 2860 times
Fixed voltage drive for bridge
With breakdown detection circuit
Smart card
RFID
Secure
Function
Sense amplifier
IC
For bridge
resistance
Detection circuit
Temperature correction
method
Look-up
table
Analog
function
36
Features
Smart card/RFID/Secure/Sense amplifier IC
Interface
CPU
(bit)
FRAM
(byte)
ROM
(byte)
SRAM
(byte)
Code Type
Shipment form
MB89R076
ISO14443 TypeB
8
4K
32K
512
DES
An exclusive package
MB94R215B
ISO14443 TypeB,
ISO7816
32
32K
128K
8K
DES/RSA
An exclusive package
Part number
■ RFID
Part number
Interface
FRAM
(byte)
Transmission speed
Shipment form
MB89R111
ISO14443 TypeB
106 Kbps, 212 Kbps
2K
Wafer
MB89R118
ISO15693
26.48 Kbps (52.97 Kbps)
2K
Wafer (With a golden Bump)
MB89R119
ISO15693
26.48 Kbps (52.97 Kbps)
256
Wafer (With a golden Bump)
■ Secure
Part number
MB89R907A
CPU
(bit)
FRAM
(byte)
ROM
(byte)
SRAM
(byte)
Code Type
8
4K
32K
1K
Ellipse Code Type
(ECC)
Power supply voltage
(V)
Package
QFP
+5 ± 5%
48P
Package: P - Plastic
■ Sense amplifier IC
Part number
Function
Temperature Number of
correction detection
method
circuits
MB42M101
For bridge resistance
Look-up table
Detection circuit
MB42M102
For bridge resistance
Detection circuit
MB42M103
MB42M104
: Now planning
For bridge resistance
Detection circuit
For bridge resistance
Detection circuit
Analog
function
Analog
function
Analog
function
Gain
(times)
3
240 to
2860
3
240 to
2860
3
3
48 to 572
240 to
2860
Power supply
voltage
(V)
Package
Others
BCC
3.0 to 5.5
Digital compensation
Fixed current drive
Built-in memory
1280 bits
32P
4.5 to 5.5
Digital compensation
Fixed current drive
Built-in memory
1280 bits
Breakdown detection circuit
40P
4.5 to 5.5
Digital compensation
Fixed current drive
Built-in memory
1280 bits
Breakdown detection circuit
40P
4.5 to 5.5
Digital compensation
Fixed voltage drive
Built-in memory
1280 bits
Breakdown detection circuit
40P
Package: P - Plastic
37
ASSP
■ Smart card
General-Purpose Converter
General-purpose
converter
Resolution
(bits)
A/D
converter
D/A
converter
for digital
tuning
applications
38
Conversion
time
Linear accuracy
(%)
Number of
Channels
Part number
Features
10
50µs
±1LSB
24
MB88111
8-channel port input capability,
Internal serial expansion interface
12
16µs/ch
– 4.0 to
+2.0LSB
4
MB88101A
Ultra-miniature, Ultra-low current
consumption, Serial data output
Bits
Settling
time
Non-linearity
(LSB)
8
20µs
±1.5
12
MB88346B
Serial data input, R-2R type,
Cascade connection capability
Internal operational amplifier
300µs
±1.5
12
MB88346L
Functionally compatible with
MB88346B,
Low-voltage operating capability
100µs
±1.5
8
MB88347
Serial data input, R-2R type,
Cascade connection capability,
Internal operational amplifier
200µs
±1.5
8
MB88347L
Functionally compatible with
MB88347,
Low-voltage operating capability
100µs
±1.5
24
MB88345
Serial data input, R-2R type,
Cascade connection capability,
Internal operational amplifier
100µs
±1.5
12
MB88141
MB88141A
Compatible with I2C bus,
R-2R type,
Internal operational amplifier
MB88146A
R-2R type, I/O expander,
internal operational amplifier
Number of
Channels
General-Purpose Converter
■ General-Purpose Converter
Part number
Conversion
method
Function
24-ch 10-bit A/D
converter
MB88111
4-ch 12-bit A/D
converter
MB88101A
Conversion Linearity
error (%)
time
(µs/ch) (Max.) (Max.)
±1 LSB
50
Successive
approximation
Power
supply
voltage (V)
DIP
SOP
SSOP
QFP
SH-DIP
+3.5 to +5.5
−
−
−
44P
48P
16P
16P
16P
−
−
16
-4.0 to +2.0
+3.3 to +5.5
(at 5 V±10%)
LSB
Package
Packages: P - Plastic
D/A Converter for Digital Tuning Applications
Part number
Function
Settling
NonPower
time
linearity
consumption
(µs)
error
(mW) (Typ.)
(Max.)
(LSB)
Package
Power supply
voltage
(V)
DIP
SOP
SSOP
QFP
MB88346B
12-ch 8-bit D/A converter
(internal operational amplifier)
20
14
+5±10%
20P
20P
20P
−
MB88346L
12-ch 8-bit D/A converter
(internal operational amplifier,
low voltage operation)
300
5
+2.7 to +3.6
20P
20P
20P
−
MB88347
8-ch 8-bit D/A converter
(internal operational amplifier)
100
9
+5±10%
16P
16P
16P
−
MB88347L
8-ch 8-bit D/A converter
(internal operational amplifier,
low voltage operation)
200
4.2
+2.7 to +3.6
16P
16P
16P
−
24-ch 8-bit D/A converter
(internal operational amplifier)
100
−
−
−
32P
24P
24P
24P
−
−
24P
−
24P
−
MB88345
MB88141 *
MB88141A
MB88146A
*
±1.5
27
+5±10%
12-ch 8-bit D/A converter
(compatible with I2C bus,
internal operational amplifier)
15
100
12-ch 8-bit D/A converter
(I/O expander, internal
operational amplifier)
Digital:+2.7 to +5.5
Analog:+5±10%
14.5
Package: P - Plastic
2
2
* “Purchase of Fujitsu I C components conveys a license under the Philips I C Patent Rights to use these components in an
I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.”
39
ASSP
A/D Converter
Others
Number of
Channels
Others
Motor drivers
1
2
Part number
Features
MB3763
Motor drive current (300 mA),
Wide operating voltage range,
TTL drive available
MB3863
Motor drive current (500 mA),
Wide operating voltage range,
TTL drive available
MB88151
Input frequency : 16.6 to 33.4 MHz
20 to 67 MHz
40 to 134 MHz
Modulation type : center/down
Modulation sensitivity:
-1.0%, -3.0%, no modulation (down)
±0.5%, ±1.5%, no modulation (center)
Power supply voltage : 3.3 V
With multiply circuit
Efficiency of
multiply
Spread spectrum
clock generator
× 1/2, × 1,
× 2, × 4
Input frequency :
× 1
MB88152
20 to 40 MHz
33 to 67 MHz
Modulation type : center/down
Modulation sensitivity:
-1.0%, -2.0%, -3.0%, no modulation(down)
±0.5%, ±1.0%, ±1.5%, no modulation (center)
Power supply voltage : 3.3 V
Input/output frequency detailed setup is possible.
Input frequency :
MB88153
20 to 40 MHz
33 to 67 MHz
Modulation type : center/down
Modulation sensitivity:
-1.0%, -2.0%, -3.0%, no modulation(down)
±0.5%, ±1.0%, ±1.5%, no modulation (center)
Power supply voltage : 3.3 V
Power down terminal
Input frequency :
MB88154
20 to 40 MHz
33 to 67 MHz
Modulation type : center/down
Modulation sensitivity:
-1.0%, -2.0%, -3.0%, no modulation(down)
±0.5%, ±1.0%, ±1.5%, no modulation (center)
Power supply voltage : 3.3 V
REFOUT(no modulation) terminal output
Input frequency :
× 1, × 2,
× 4
(selection)
40
MB88155
12.5 to 25 MHz
25 to 50 MHz
Modulation type : center/down
Modulation sensitivity:
-1.0%, -2.0%, no modulation (down)
±0.5%, ±1.0%, no modulation (center)
Power supply voltage : 3.3 V
Power down function / no, small package
MB88156
Input frequency :
12.5 to 50 MHz
Modulation type : center/down
Modulation sensitivity:
-1.0%, -2.0%, -3.0%, ±0.5%, ±1.5%,
no modulation (down/center)
Power supply voltage : 3.3 V
With multiply circuit, BCC16 (multi function)
Others
■ Others
Part number
Function
Power supply voltage Package
(V)
SOP
Number of Channels
Output current
(mA)
1
300
+4 to +18
8P
2
500
+4 to +36
20P
MB3763
Reversible motor drivers
MB3863
Package: P - Plastic
Spread spectrum clock generator (SSCG)
Part number
MB88151-100
MB88151-200
MB88151-400
MB88151-500
MB88152-100
MB88152-110
MB88152-101
MB88152-111
MB88152-102
MB88152-112
Input
Efficiency
of
Function frequency
(MHz)
multiply
16.6 to 33.4
× 1
× 2
× 4
× 1/2
20 to 40
33 to 67
40 to 80
66 to 134
20 to 40
33 to 67
× 1
40 to 80
66 to 134
MB88153-100
20 to 40
MB88153-101
66 to 134
33 to 67
MB88153-110
40 to 80
MB88153-111
MB88154-102
33 to 67
EMI
MB88154-103
20 to 40
noise
MB88154-112 reduction 33 to 67
PLL
MB88154-113
20 to 40
MB88155-100 (SSCG) 12.5 to 25
MB88155-101
25 to 50
MB88155-102
12.5 to 25
MB88155-103
25 to 50
MB88155-110
12.5 to 25
MB88155-111
25 to 50
MB88155-112
12.5 to 25
MB88155-113
25 to 50
× 1
× 1
× 1
Output
frequency
(MHz)
Modulation
Type
12.5 to 25
25 to 50
12.5 to 25
25 to 50
12.5 to 25
25 to 50
12.5 to 25
25 to 50
Down
Center
Down
12.5 to 20
× 4
50 to 80
MB88155-410
Center
MB88155-412
MB88156-000
MB88156-001
12.5 to 50
( × 1)
12.5 to 25
( × 2)
12.5 to 20
( × 4)
Package
Other
SOP TSSOP BCC
16.6 to 33.4
-1.0%, -3.0% (down)
Down or
33.3 to 66.7
±0.5%, ±1.5% (center)
center
66.6 to 133.4
no modulation
(selectable)
8.3 to 16.7
20 to 40
Down
-1.0%, -3.0%
33 to 67
40 to 80
Center
±0.5%, ±1.5%
66 to 134
-1.0%, -3.0%
Down
no modulation
20 to 40
33 to 67
±0.5%, ±1.5%
Center
no modulation
-1.0%, -3.0%
Down
no modulation
40 to 80
66 to 134
±0.5%, ±1.5%
Center
no modulation
-1.0%, no modulation
20 to 40
Down
PD
-3.0%, no modulation
66 to 134
function
33 to 67
±0.5%, no modulation
enable
Center
40 to 80
±1.5%, no modulation
33 to 67
-1.0%, -2.0%, 3.0%,
Down
no modulation
20 to 40
REF output
enable
33 to 67
±0.5%, ±1.0%, ±1.5%,
Center
no modulation
20 to 40
MB88155-400
MB88155-402
Modulation
sensitivity
-1.0%, -2.0%
no modulation
PD function
disable
-1.0%, -2.0%
PD function
enable
±0.5%, ±1.0%
no modulation
PD function
disable
±0.5%, ±1.0%
PD function
enable
-1.0%, -2.0%
no modulation
PD function
disable
-1.0%, -2.0%
PD function
enable
±0.5%, ±1.0%
no modulation
PD function
disable
±0.5%, ±1.0%
PD function
enable
8P
-
-
8P
-
-
8P
-
-
8P
-
-
-
8P
-
-
-
16P
REF output
× 1, × 2, 12.5 to 50 ( ×
Down/
enable
-1.0%, -2.0%, ±0.5%,
1)
× 4
Center
25 to 50 ( × 2)
±1.0%, no modulation
REF output
(selectable) 50 to 80 ( × 4) (selectable)
disable
Package: P - Plastic
41
ASSP
Motor Drivers
Others
SSGC Simple Evaluation Board
Part number
MB88151
MB88152
MB88153
MB88154
MB88155
MB88156
MB88151EB01-100
MB88151EB01-200
MB88151EB01-400
MB88151EB01-500
MB88152EB01-100
MB88152EB01-110
MB88152EB01-101
MB88152EB01-111
MB88152EB01-102
MB88152EB01-112
MB88153EB01-100
MB88153EB01-101
MB88153EB01-110
MB88153EB01-111
MB88154EB01-102
MB88154EB01-103
MB88154EB01-112
MB88154EB01-113
MB88155EB01-100
MB88155EB01-101
MB88155EB01-102
MB88155EB01-103
MB88155EB01-110
MB88155EB01-111
MB88155EB01-112
MB88155EB01-113
MB88155EB01-400
MB88155EB01-402
MB88155EB01-410
MB88155EB01-412
MB88156EB01-BC16-000
MB88156EB01-BC16-001
Overview (MB88152EB01-101 : 30 mm × 35 mm)
42
Remarks
MB88151-100 mounted
MB88151-200 mounted
MB88151-400 mounted
MB88151-500 mounted
MB88152-100 mounted
MB88152-110 mounted
MB88152-101 mounted
MB88152-111 mounted
MB88152-102 mounted
MB88152-112 mounted
MB88153-100 mounted
MB88153-101 mounted
MB88153-110 mounted
MB88153-111 mounted
MB88154-102 mounted
MB88154-103 mounted
MB88154-112 mounted
MB88154-113 mounted
MB88155-100 mounted
MB88155-101 mounted
MB88155-102 mounted
MB88155-103 mounted
MB88155-110 mounted
MB88155-111 mounted
MB88155-112 mounted
MB88155-113 mounted
MB88155-400 mounted
MB88155-402 mounted
MB88155-410 mounted
MB88155-412 mounted
MB88156-000 mounted
MB88156-001 mounted
An oscillation vibrator, oscillation stable capacity, and a
power supply line are required.
System Configuration
■ Communication Equipment (Telephones)
System Configuration of a Digital Cellular Phone
ASSP
ANT
LNA
SAW
1stRxMIX
SAW
2ndRxMIX
BPF
LIM
System
Power
Management
RX
TX
PLL
PLL
BaseBand
Processor
AIU
Series
Regulator
Power Amp.
Driver Amp.
0
SAW
Φ
Σ
1/2
X2
Div
Other
Block
90
IF I/Q Modulator
Recommended Semiconductor Products [Digital Cellular]
Part number
Functions
MB15F72UL
MB15F73UL
PLL frequency synthesizer with an internal prescaler
MB15F78UL
MB15C100
IF PLL frequency synthesizer semicustom LSI
MB86437
Audio interface unit (AIU)
43
System Configuration
System Configuration of a Digital Cordless Phone
ANT
LNA
BPF
1stRxMIX
BPF
2ndRxMIX
BPF
LIM
RX
PLL
PLL
TX
Power Amp.
0
BPF
Φ
Σ
1/2
X2
Div
90
TxMIX I/Q Modulator
Recommended Semiconductor Products [Digital Cordless]
Part number
MB15E05SL
MB15F73UL
44
Functions
PLL frequency synthesizer with an internal prescaler
MB15C100
IF PLL frequency synthesizer semicustom LSI
MB15C101
IF PLL frequency synthesizer
BaseBand
Processor
AIU
System Configuration
Telephone line
S
S-point interface
AIU
1
2
3
4
5
6
7
8
9
∗
0
#
ASSP
System Configuration of an ISDN Digital Telephone
Sound
Handset
Single-chip
microcontroller
Keypad
LCD panel
:Voice signal (analog)
:Control signal (digital)
Recommended Semiconductor Products [ISDN Digital Telephone]
Part number
MB86434
Functions
Audio interface unit (AIU)
45
System Configuration
■ Communication Control and Communication Networks
LAN (Local Area Network)
Ethernet System Configuration
Host CPU
Main memory
Host system bus
Bus interface
LAN controller
Buffer memory
Encoder/decoder
Transceiver
10BASE-5
10BASE-2
10BASE-T
Recommended Semiconductor Products [Ethernet]
Part number
MB86967
Functions
LAN controller, encoder/decoder, transceiver, PCMCIA interface, general-purpose interface
Note: Ethernet is a registered trademark of XEROX Corporation of the USA.
46
Memory Product Line-up
■ Memory Product Line-up
Memory
RAM
Volatile
ASM *
Mobile FCRAM TM
(Fast Cycle RAM)
Page No.
16M-bit Async. SRAM type
48
FCRAM
32M-bit Async. /Sync. SRAM type
FCRAM
48
64M-bit Async. /Sync. SRAM type
FCRAM
50
128M-bit Async. /Sync. SRAM
type FCRAM
50
16M-bit SDR-SDRAM type
FCRAM
52
128M-bit SDR-SDRAM type
FCRAM
52
FRAM
FRAM (Single 3 V)
54
Flash Memory
Flash Memory (Single 3 V)
56
Flash Memory (Single 1.8 V)
60
Flash Memory (MirrorBit TM)
(Single 3 V)
62
Flash Memory (MirrorBit TM)
(Single 1.8 V)
64
SPI Flash Memory (MirrorBit TM)
(Single 3 V)
66
Flash Memory + SRAM/PSRAM
(2-Chip)
68
Flash Memory + Flash Memory
+ PSRAM (3-Chip)
72
Flash Memory + PSRAM/SDRAM
(2-Chip)
74
Flash Memory + Flash Memory
+ PSRAM/SDRAM (3-Chip)
78
Flash Memory + Flash Memory
+ Flash Memory + PSRAM
(4-Chip)
80
Consumer FCRAM TM
(Fast Cycle RAM)
for Consumer Products/
Embedded Systems
Non-Volatile
ROM
MCP
Non-Volatile &
Rewritable
Non-Volatile &
Rewritable
Electrically
erasable
Single 3 V
Single 1.8 V
* : ASM =Application Specific Memory
FCRAM is a trademark of Fujitsu Limited.
MirrorBit is a trademark of Spansion LLC.
47
Memory
for Mobile Phones/PDAs
FCRAMTM (Fast Cycle RAM) (1)
Type/Application
FCRAMTM
(Fast Cycle
RAM)
Mobile FCRAMTM
for Mobile phones/ PDAs
Density(Interface)
16M bits
(Async. SRAM type)
32M bits
(Async. /Sync.
SRAM type)
Organization
1M × 16
2M × 16
Clock
Freq.
Access
Time
MB82D01181E
–
Up to 60
ns
MB82DS01181E
–
Up to 70
ns
MB82DP02183C *
–
Up to 65
ns
Part Number
MB82DBS02163C *
(Continued)
Up to Up to 70
66 MHz
ns
(Continued)
* : Compliance with "COSMORAM (Common Specifications
for Mobile RAM) "
COSMORAM is common specifications for pseudo
SRAM agreed among Toshiba Corporation Semiconductor Company, NEC Electronics Corporation, and
FUJITSU LIMITED.
FCRAM is a trademark of Fujitsu Limited.
48
FCRAMTM (Fast Cycle RAM) (1)
■ Mobile FCRAMTM (Fast Cycle RAM)
• 16M-bit Async. SRAM Type FCRAM
Organization
(W × b)
TA = −30° C to +85° C
Supply Current Max.
Package
Supply Voltage
Access Time
Operating Standby Power Down
Max. (ns)
(V)
FBGA
(mA)
(µA)
(µA)
Part Number *1
MB82D01181E-60L
60
20
100
10
2.3 to 3.5
48P, *2, *3
MB82DS01181E-70L
70
20
100
10
1.7 to 1.95
-,*4
*1: Package suffix is not included.
*2: SRAM compatible pin out FBGA (Fine Pitch Ball Grid Array) (Suffix PBN) .
*3: Stacked MCP (Multi Chip Package) parts, in which an Async. SRAM type FCRAM part is
packaged with a flash memory part, is also available for mobile phone applications.
Chip/wafer (Suffix KTD/WFKT) supply is optional.
*4: Monolithic package option is T.B.D. Chip/wafer (Suffix KTD/WFKT) supply is optional.
• 32M-bit Async. /Sync. SRAM Type FCRAM
Organization
(W × b)
TA = −30° C to +85° C
Supply Current Max.
Access Time
Part Number *1
MB82DP02183C-65L
2M × 16
MB82DBS02163C-70L
*1:
*2:
*3:
*4:
Supply
Voltage (V)
Package
Max. (ns) *2
Operating
(mA)
Standby
(µA)
Power Down
(µA)
65
(20)
30
80
10
2.6 to 3.5
71P,*3,*4
70 (20)
30
80
10
1.65 to 1.95
71P,*3,*4
FBGA
Package suffix is not included.
( ) : Page Address Access Time, < > : Burst Clock Access Time.
FBGA package in compliance with COSMORAM spec (Suffix PBT).
Stacked MCP (Multi Chip Package) parts, in which an Async. SRAM type FCRAM part is
packaged with a flash memory part, is also available for mobile phone applications.
Chip/wafer (Suffix KTD/WFKT) supply is optional.
49
Memory
1M × 16
FCRAMTM (Fast Cycle RAM) (2)
(Continued)
Type/Application
Mobile FCRAMTM
for Mobile phones/PDAs
Density(Interface)
64M bits
(Async. /Sync.
SRAM type)
128M bits
(Async. /Sync.
SRAM type)
Organization
4M × 16
8M × 16
4M × 32
Part Number
MB82DP04183C *
Clock
Freq.
Access
Time
–
Up to 65
ns
MB82DBS04163C *
Up to Up to 70
75MHz
ns
MB82DBR08163A *
Up to Up to 70
75MHz
ns
MB82DBS08164C *
Up to Up to 70
108MHz
ns
MB82DBS04314C *
Up to Up to 70
108MHz
ns
(Continued)
* : Compliance with "COSMORAM (Common Specifications
for Mobile RAM) "
COSMORAM is common specifications for pseudo SRAM
agreed among Toshiba Corporation Semiconductor Company, NEC Electronics Corporation, and FUJITSU LIMITED.
FCRAM is a trademark of Fujitsu Limited.
50
FCRAMTM (Fast Cycle RAM) (2)
• 64M-bit Async. /Sync. SRAM Type FCRAM
TA = −30° C to +85° C
Organization
(W × b)
Part Number *
Access Time
Max. (ns) *2 Operating
(mA)
1
MB82DP04183C-65L
4M × 16
MB82DBS04163C-70L
Standby
(µA) *3
Package
Supply Voltage
Power Down
(V)
(µA)
FBGA
65
(20)
40
90
10
2.6 to 3.1
71P, *4, *5
70 (20)
35
90
10
1.7 to 1.95
71P, *4, *5
*1:
*2:
*3:
*4:
Package suffix is not included.
( ) : Page Address Access Time, < > : Burst Clock Access Time.
TA
40° C.
FBGA package in compliance with COSMORAM spec (Suffix PBT) .
Production support with monolithic package is T.B.D.
*5: Stacked MCP (Multi Chip Package) parts, in which an Async. SRAM type FCRAM part is
packaged with a flash memory part, is also available for mobile phone applications.
Chip/wafer (Suffix KTD/WFKT) supply is optional.
• 128M-bit Async. /Sync. SRAM Type FCRAM
Organization
(W × b)
Part
Number *1
Access Time
Max. (ns) *2 Operating
(mA)
Standby
(µA)
Supply Voltage
Power Down
(V)
(µA)
Package
FBGA
Core : 2.6 to 3.1
71P, *4, *5
IO : 1.65 to 1.95
MB82DBR08163A-70L
70 (20)
35
300
10
MB82DBS08164C-70L
70 *3
40
300
10
1.7 to 1.95
115P, *4, *5
MB82DBS04314C-70L
70 *3
50
300
10
1.7 to 1.95
115P, *4, *5
8M × 16
4M × 32
TA = −30° C to +85° C
Supply Current Max.
*1: Package suffix is not included.
MB82DBR08163A : with Burst mode (Sync. Type) & Page mode (Async. Type) .
MB82DBS08164C/MB82DBS04314C : with Burst mode (Sync. Type) .
*2: ( ) : Page Address Access Time, < > : Burst Clock Access Time.
*3: Burst Clock Access Time : RL = 6, 7
*4: FBGA (Fine Pitch Ball Grid Array) package in compliance with COSMORAM spec
(Suffix PBT) . Production support with monolithic package is T.B.D.
*5: Stacked MCP (Multi Chip Package) parts, in which an Async. SRAM type FCRAM part is
packaged with a flash memory part, is also available for mobile phone applications.
Chip/wafer (Suffix KTD/WFKT) supply is optional.
51
Memory
Supply Current Max.
FCRAMTM (Fast Cycle RAM) (3)
(Continued)
Type/Application
Consumer FCRAMTM
for Consumer
Products/ Embedded
Systems
Density (Interface)
16M bits
(SDR-SDRAM type)
128M bits
(SDR-SDRAM type)
Part Number
Clock
Freq.
Access
Time
2 × 512K ×
16
MB81ES171625
MB81ES171625-X *
Up to
85 MHz
Up to
10.2 ns
2 × 256K ×
32
MB81ES173225
MB81ES173225-X *
Up to
85 MHz
Up to
10.2 ns
4 × 1M × 32
MB81ES123245
Up to
108 MHz
Up to
7 ns
Organization
* : Clock Frequency to 66.7 MHz, Access time to 12 ns
FCRAM is a trademark of Fujitsu Limited.
52
FCRAMTM (Fast Cycle RAM) (3)
■ Consumer FCRAMTM (Fast Cycle RAM)
• 16M-bit SDR-SDRAM Type *1 FCRAM
VDD = +1.65V to +1.95V, Tj = 0° C to +100° C
2 × 512K × 16
2 × 256K × 32
Supply Current Max.
Clock
Frequency
Max. (MHz)
Clock Period
Min. (ns)
Access Time
MB81ES171625-12
85
11.7
10.2
MB81ES171625-15
66.7
15
12
30
1
MB81ES173225-12
85
11.7
10.2
30
1
MB81ES173225-15
66.7
15
12
30
1
Part Number *
2
Shipping
style
(mA) *4
Max. (ns) *3
Operating
Standby
30
1
Chip or
Wafer
VDD = +1.65V to +1.95V, Tj = -40° C to +125° C
Organization
(Bank × W × b)
Part
Number *2
Supply Current Max.
Clock
Frequency
Max. (MHz)
Clock Period
Min. (ns)
Access Time
Shipping
style
(mA) *4
Max. (ns) *3
Operating
Standby
2 × 512K × 16
MB81ES171625-15-X
66.7
15
12
30
1
2 × 256K × 32
MB81ES173225-15-X
66.7
15
12
30
1
*1:
*2:
*3:
*4:
Chip or
Wafer
Single Data Rate SDRAM Interface.
Chip/wafer suffix (KTD/WFKT) are not included.
tAC(Max.)
Operating current is IDD1 (1 Bank Active) and Standby current is IDD2P (Power
Down Mode) .
• 128M-bit SDR-SDRAM Type *1 FCRAM
VDD = +1.7V to +1.9V, Tj *6
Supply Current Max.
Organization
(Bank × W × b)
4 × 1M × 32
2
Part Number *
Clock Frequency Clock Period Access Time
Max. (MHz)
Min. (ns)
Max. (ns) *3
MB81ES123245-10
108
9.2
7
Shipping
style
(mA) *4
Operating
Standby
*5
0.5
Chip or
Wafer
*1:
*2:
*3:
*4:
Single Data Rate SDRAM Interface
Chip/wafer suffix (KTD/WFKT) are not included.
tAC(Max.)
Operating current is IDD1 (1 Bank Active) and Standby current is IDD2P (Power
Down Mode) .
*5: 60 (Page Length 256) , 45 (Page Length 128) , 35 (Page Length 64)
*6: Tj = -25 ° C to +95 ° C
53
Memory
Organization
(Bank × W × b)
FRAM (Ferroelectric RAM)
FRAM
Interface
Supply
Voltage
Capacity
Organization
Parallel
Interface
Single 3V
256K-bit
32K × 8
MB85R256
150 ns
1M-bit
128K × 8
MB85R1001
100 ns
64K × 16
MB85R1002
100 ns
Part Number Access Time
Clock Speed
Serial
Interface
54
Single 3V
256K-bit
32K × 8
MB85RS256
15 MHz
FRAM (Ferroelectric RAM)
■ FRAM
Organization
Interface
(W × b)
Part Number
Access
Time
Max.
(ns)
Cycle
Time
Min.
(ns)
VCC Current
Operating
Packages
Clock
Supply Temperature
Speed
Voltage
Range
Max. Operating Standby
(V)
SOP TSOP FBGA
TA (° C)
(MHz)
(mA)
(µA)
Parallel
32K × 8
MB85R256
150
235
−
5
5
3.0 to 3.6
-40 to +85
28P
28P
Parallel
128K × 8
MB85R1001
100
200
−
10
10
3.0 to 3.6
-20 to +85
-
48P
-
Parallel
64K × 16
MB85R1002
100
200
−
10
10
3.0 to 3.6
-20 to +85
-
48P
48P
Serial
32K × 8
MB85RS256
−
−
15
10
50
3.0 to 3.6
-20 to +85
8P
-
-
-
Memory
Pakage : P −Plastic
: New released.
55
Flash Memory (Single 3V) (1)
(Continued)
Flash Memory
Single 3V
Variation
Access
Time
Remarks
S29AL004D
PD
70 to 90 ns
*1
1M × 8
512K × 16
S29AL008D
PD
60 to 90 ns
*2
16M-bit
2M × 8
1M × 16
S29AL016D
PD
70 to 90 ns
*3
32M-bit
4M × 8
2M × 16
S29AL032D
PD
70 to 90 ns
*4
S29JL032H
PD
SRW
60 to 90 ns
*5
S29JL064H
PD
SRW
55 to 90 ns
*6
Capacity
Organization
4M-bit
512K × 8
256K × 16
8M-bit
64M-bit
8M × 8
4M × 16
Part Number
(Continued)
Variation
PD: Automatic sleep mode
SRW: Simultaneous Read / Write operation (Read-while-program or Readwhile-Erase)
MirrorBit is a trademark of Spansion LLC.
*1 :
*2 :
*3 :
*4 :
*5 :
*6 :
56
(16Kbytes × 1sectors) + (8Kbytes × 2sectors) + (32Kbytes × 1sector) + (64Kbytes × 7sectors)
(16Kbytes × 1sectors) + (8Kbytes × 2sectors) + (32Kbytes × 1sector) + (64Kbytes × 15sectors)
(16Kbytes × 1sectors) + (8Kbytes × 2sectors + (32Kbytes × 1sector) + (64Kbytes × 31sectors)
(16Kbytes × 1sectors) + (8Kbytes × 2sectors + (32Kbytes × 1sector) + (64Kbytes × 61sectors)
(8Kbytes × 8sectors) + (64Kbytes × 63sectors)
(8Kbytes × 16sectors) + (64Kbytes × 126sectors)
Flash Memory (Single 3V) (1)
■ Flash memory (Single 3V)
(W × b)
512K × 8
256K × 16
1M × 8
512K × 16
Part Number
S29AL004D70 *
70
70
S29AL004D90
90
90
S29AL008D60 *
60
60
S29AL008D70 *
S29AL008D90
2M × 8
1M × 16
4M × 8
2M × 16
8M × 8
4M × 16
70
90
70
VCC Current
Read
(mA)
16
(f = 5 MHz)
Packages
Operating
Supply Voltage Temperature
Standby
Range
(V)
Mode
TSOP FBGA SOP
TA (° C)
(µA)
5
2.7 to 3.6
-40 to +85
48P
48P
44P
-40 to +85
48P
48P
44P
3.0 to 3.6
16
(f = 5 MHz)
5
16
(f = 5 MHz)
5
2.7 to 3.6
-40 to +85
48P
48P
−
16
(f = 5 MHz)
5
2.7 to 3.6
-40 to +85
48P
48P
−
16
(f = 5 MHz)
5
2.7 to 3.6
-40 to +85
48P
−
−
16
(f = 5 MHz)
5
2.7 to 3.6
-40 to +85
48P
63P
−
2.7 to 3.6
90
S29AL016D70 *
70
70
S29AL016D90
90
90
S29AL032D70 *
70
70
S29AL032D90
90
90
S29JL032H60 *
60
60
S29JL032H70
70
70
S29JL032H90
90
90
S29JL064H55 *
55
55
S29JL064H60 *
60
60
S29JL064H70
70
70
S29JL064H90
90
90
* : at CL = 30pF
Package: P-Plastic
57
Memory
Organization
Access
Cycle
Time
Time
Max.
Min. (ns)
(ns)
Flash Memory (Single 3V) (2)
(Continued)
Capacity
Organization
Part Number
Variation
Access Time
Remarks
From 55 to 70 ns
*1
32M-bit
2M × 16
S29PL032J
PD
SRW
PM
64M-bit
4M × 16
S29PL064J
PD
SRW
PM
From 55 to 70 ns
*2
128M-bit
8M × 16
S29PL127J
PD
SRW
PM
From 55 to 70 ns
*3
S29PL129J
PD
SRW
PM
From 55 to 70 ns
*4
Feature
Variation
PD: Automatic sleep mode
SRW: Simultaneous Read / Write operation (Read-while-program
or Read-while-Erase)
PM: Page mode
*1: Sector structure - (4 K word ×8 sectors, 32 K word × 7 sectors) + (32 K word × 24 sectors) + (32 K word × 24
sectors) (4 K word × 8 sectors, 32 K word × 7 sectors)
*2: Sector structure - (4 K word × 8 sectors, 32 K word × 15 sectors) + (32 K word × 48 sectors) + (32 K word ×
48 sectors) (4 K word × 8 sectors, 32 K word × 15 sectors)
*3: Sector structure - (4 K word × 8 sectors, 32 K word × 31 sectors) + (32 K word × 96 sectors) + (32 K word ×
96 sectors) (4 K word × v8 sectors, 32 K word × 31 sectors)
*4: Sector structure - (4 K word × 8 sectors, 32 K word × 31 sectors) + (32 K word × 96 sectors) + (32 K word ×
96 sectors) (4 K word × 8 sectors, 32 K word × 31 sectors)
58
Flash Memory (Single 3V) (2)
■ Flash memory (Single 3V)
(Continued)
Part Number
S29PL032J55BxW
2M × 16
S29PL032J60BxW
S29PL032J70BxW
S29PL064J55BxW
4M × 16
S29PL064J60BxW
S29PL064J70BxW
S29PL127J55xxW
S29PL127J60xxW
S29PL127J70xxW
8M × 16
S29PL129J55xxW
S29PL129J60xxW
S29PL129J70xxW
Access
Cycle
Time
Time
Max. (ns) Min. (ns)
55
(20) *
60
(25) *
70
(30) *
55
(20) *
60
(25) *
70
(30) *
55
(20) *
60
(25) *
70
(30) *
55
(20) *
60
(25) *
70
(30) *
55
(20) *
60
(25) *
70
(30) *
55
(20) *
60
(25) *
70
(30) *
55
(20) *
60
(25) *
70
(30) *
55
(20) *
60
(25) *
70
(30) *
VCC Current
Supply
Voltage
(V)
Packages
Operating
Temperature
Range
TSOP FBGA
TA (° C)
Read
(mA)
Standby
Mode
(µA)
30
(f = 5 MHz)
5
Read:2.7 to 3.6
Write:2.7 to 3.6
-25 to +85
-40 to +85
-
48P
56P
30
(f = 5 MHz)
5
Read:2.7 to 3.6
Write:2.7 to 3.6
-25 to +85
-40 to +85
-
48P
56P
30
(f = 5 MHz)
5
Read:2.7 to 3.6
Write:2.7 to 3.6
-25 to +85
-40 to +85
56P
64P
80P
30
(f = 5 MHz)
5
Read:2.7 to 3.6
Write:2.7 to 3.6
-25 to +85
-40 to +85
56P
64P
80P
CL = 30pF
*: Page Access
Package: P - Plastic
59
Memory
Organization
(W × b)
Flash memory (Single 1.8V)
Flash Memory
Supply
Voltage
Capacity
Organization
Single 1.8V
64M-bit
4M × 16
128M-bit
Variation
Access
Time
Remarks
S29WS064J
PD
BM
SRW
HM
From 9.1 (80 MHz)
to 11.2 ns (66 MHz)
*2
S29WS128J
PD
BM
SRW
HM
From 9.1 (80 MHz)
to 11.2 ns (66 MHz)
*3
S29WS128K
PD
BM
SRW
HM
From 7.0 (108 MHz)
to 13.5 ns (54 MHz)
*4
Part Number
8M × 16
Feature
T: The boot blocks located in top address area.
B: The boot blocks located in bottom address area.
D: The boot blocks located in top address and bottom address area.
Variation
PD : Automatic sleep mode
SRW: Simultaneous Read / Write operation (Read-while-program or Read-while-Erase)
PM: Page mode
BM: Burst Mode
HM: Hand Shake Mode
*1: Sector structure - (16Kbytes × 1sector) + (8Kbytes × 2sectors)+(32Kbytes × 1sector)+(64Kbytes × 15sectors)
*2: Sector structure - (4Kwords × 16sectors) + (32Kwords × 126sectors)
*3: Sector structure - (4Kwords × 16sectors) + (32Kwords × 254sectors)
*4: Sector structure - (16Kwords × 8sectors) + (32Kwords × 252sectors)
60
Flash memory (Single 1.8V)
■ Flash memory (Single 1.8V)
TA = -40 ° C to +85 ° C
(W × b)
Part Number
S29WS064J0P
4M × 16
S29WS064J0S
S29WS128J0P
S29WS128J0S
S29WS128KBA
8M × 16
S29WS128K0S
Access
Cycle Burst
Time
Time Speed
Max. (ns) Min. (ns) (MHz)
55 *1,
56/11.2 *2
45 *1,
55 *1,
45 *1,
45 *1,
45/7.0 *2
45 *1,
1
S29WS128K0P
S29WS128K0L
55 * ,
55/11.2 *2
55 *1,
55/13.5 *2
66
30 *3, *4
80
36
*3, *4
66
30 *3, *4
80
3, 4
36 * *
108
25 *3, *4
80
25 *3, *4
−
46/9.1 *2
45/9.0 *2
Read
(mA)
−
46/9.1 *2
56/11.2 *2
VCC Current
−
Standby
Mode (µA)
Packages
Supply Voltage
(V)
FBGA
Super
CSP
50
1.65 to 1.95
80P
−
50
1.65 to 1.95
84P
−
50
1.70 to 1.95
80P
84P
−
*3, *4
66
20
54
20 *3, *4
CL = 30pF
Package: P-Plastic
*1 : Asynchronous access time
*2 : Synchronous delay time/burst access time
*3 : Burst Read
*4 : Continuous mode
61
Memory
Organization
Flash Memory (MirrorBit TM) (Single 3 V)
Flash Memory
MirrorBit TM
Supply
Voltage
Capacity
Organization
Variation
Access
Time
Remarks
Single 3V
16M-bit
2M × 8
1M × 16
S29GL016A
PD
PM
from 90 to 100 ns.
*2
32M-bit
4M × 8
2M × 16
S29GL032A
PD
PM
from 90 to 110 ns.
*3
64M-bit
8M × 8
4M × 16
S29GL064A
PD
PM
from 90 to 110 ns.
*4
128M-bit
16M × 8
8M × 16
S29GL128N
PD
PM
from 90 to 110 ns.
*5
256M-bit
32M × 8
16M × 16
S29GL256N
PD
PM
from 90 to 110 ns.
*6
512M-bit
64M × 8
32M × 16
S29GL512N
PD
PM
from 100 to 110 ns.
*7
1G-bit
128M × 8
64M × 16
S70GL01GN11
PD
PM
110 ns.
*8
Part Number
Variation
PD : Automatic sleep mode
PM: Page mode
MirrorBit is a trademark of Spansion LLC.
*1: 16Kbytes × 1 +8Kbytes × 2 +32Kbytes × 1 +64Kbytes × 31sectors (Byte mode)
8Kword × 1 +4Kword × 2 +16Kword × 1 +32Kword × 31sectors (Word mode)
*2: Uniform sector model : 32Kword (64Kbytes) × 32sectors
Boot sector model : 32Kword (64Kbytes) × 31sectors +4Kword (8Kbytes) × 8sectors
*3: Uniform sector model : 32Kword (64Kbytes) × 64sectors
Boot sector model : 32Kword (64Kbytes) × 63sectors +4Kword (8Kbytes) × 8sectors
*4: Uniform sector model : 32Kword (64Kbytes) × 128sectors
Boot sector model : 32Kword (64Kbytes) × 127sectors +4Kword (8Kbytes) × 8sectors
*5: Sector structure - 64Kword (128Kbytes) × 128sectors
*6: Sector structure - 64Kword (128Kbytes) × 256sectors
*7: Sector structure - 64Kword (128Kbytes) × 512sectors
*8: Sector structure - 64Kword (128Kbytes) × 1024sectors
62
Flash Memory (MirrorBit TM) (Single 3 V)
■ Flash memory (MirrorBit ) (Single 3V)
Part Number
(W × b)
2M × 8
1M × 16
4M × 8
2M × 16
8M × 8
4M × 16
16M × 8
8M × 16
32M × 8
16M × 16
64M × 8
32M × 16
128M × 8
64M × 16
Access
Cycle
Time
Time
Max. (ns) Min. (ns)
S29GL016A90
90
(25)
90
(25)
S29GL016A10
100
(30)
100
(30)
S29GL032A90
90
(25)
90
(25)
S29GL032A10
100
(30)
100
(30)
S29GL032A11
110
(30)
110
(30)
S29GL064A90
90
(25)
90
(25)
S29GL064A10
100
(30)
100
(30)
S29GL064A11
110
(30)
110
(30)
S29GL128N90
90
(25)
90
(25)
S29GL128N10
100
(25)
100
(25)
S29GL128N11
110
(30)
110
(30)
S29GL256N90
90
(25)
90
(25)
S29GL256N10
100
(25)
100
(25)
S29GL256N11
110
(30)
110
(30)
S29GL512N10
100
(25)
100
(25)
S29GL512N11
110
(30)
110
(30)
S70GL01GN11
110
(25)
110
(25)
: Now planning
VCC Current
Read
(mA)
Standby
Mode
(µA)
Packages
Operating
Supply Voltage Temperature
Range
(V)
TSOP FBGA
T (° C)
A
25
(f = 5 MHz)
5
3.0 to 3.6
-40 to +85
48P
48P
64P
25
(f = 5 MHz)
5
3.0 to 3.6
-40 to +85
40P
48P
56P
48P
64P
25
(f = 5 MHz)
5
3.0 to 3.6
-40 to +85
48P
56P
63P
64P
-40 to +85
56P
64P
-40 to +85
56P
64P
3.0 to 3.6
50
(f = 5 MHz)
5
2.7 to 3.6
3.0 to 3.6
50
(f = 5 MHz)
5
50
(f = 5 MHz)
5
2.7 to 3.6
-40 to +85
56P
64P
50
(f = 5 MHz)
5
2.7 to 3.6
-40 to +85
−
64P
2.7 to 3.6
CL = 30pF
Package: P-Plastic
63
Memory
Organization
Flash Memory (MirrorBit TM) (Single 1.8 V)
(Continued)
Supply
Voltage
Flash Memory
Single
1.8V
MirrorBit TM
Capacity
Organization
128M-bit
8M × 16
256M-bit
Variation
Access
Time
Remarks
S29WS128N
PD
BM
SRW
HM
from 9 (80 MHz.) to
13.5 ns. (54 MHz.)
*1
S29WS256N
PD
BM
SRW
HM
from 9 (80 MHz.) to
13.5 ns. (54 MHz.)
*2
Part Number
16M × 16
Variation
PD : Automatic sleep mode
BM: Burst mode
SRW: Simultaneous Read / Write operation (Read-while-program or Read-while-Erase)
HM: Hand Shake Mode
MirrorBit is a trademark of Spansion LLC.
*1: Sector structure - (16Kwords × 8sectors) + (64Kwords × 126sectors)
*2: Sector structure - (16Kwords × 8sectors) + (64Kwords × 254sectors)
64
Flash Memory (MirrorBitTM) (Single 1.8 V)
■ Flash memory (MirrorBit ) (Single 1.8V)
VCC Current
(W × b)
Part Number
S29WS128N0LBxW
8M × 16
S29WS128N0PBxW
S29WS128N0SBxW
S29WS256N0LBxW
16M × 16
S29WS256N0PBxW
S29WS256N0SBxW
80 *1,
80/13.5 *2
80 *1,
80/11.2 *2
80 *1,
80/9.0 *2
80 *1,
80/13.5 *2
80 *1,
80/11.2 *2
80 *1,
80/9.0 *2
Burst
Speed
(MHz)
Read
(mA)
54
36 *3
66
42 *3
80
48 *3
54
36 *3
66
42 *3
80
48 *3
Operating
Supply Voltage Temperature
Standby
Range
(V)
Mode
TA (° C)
(µA)
Packages
FBGA
40
1.70 to 1.95
-25 to +85
84P
40
1.70 to 1.95
-25 to +85
84P
Memory
Organization
Access
Time
Max. (ns)
CL = 30pF
Package: P-Plastic
*1 : Asynchronous access time
*2 : Synchronous delay time/burst access time
*3 : Burst Read (continuous mode)
65
Serial Peripheral Interface (MirrorBit TM) (Single 3 V)
Supply
Voltage
Flash Memory
MirrorBit TM
Single 3V
Capacity
Organization
Part Number
Variation
Access
Time
Remarks
4 M-bit
4M× 1
S25FL004A
SI
50 MHz
*1
8 M-bit
8M× 1
S25FL008A
SI
50 MHz
*2
16 M-bit
16 M × 1
S25FL016A
SI
50 MHz
*3
64M-bit
64 M × 1
S25FL064A
SI
50 MHz
*4
Variation
SI: Serial interface
*1 : Sector structure - 512 K bytes ×
*2 : Sector structure - 512 K bytes ×
*3 : Sector structure - 512 K bytes ×
*4 : Sector structure - 512 K bytes ×
8 sectors
16 sectors
32 sectors
128 sectors
MirrorFlash is a trademark of Spansion LLC.
66
Serial Peripheral Interface (MirrorBit TM) (Single 3 V)
■ Flash memory (MirrorBit) (Single 3 V)
Organization
(W × b)
Part Number
Read
(mA)
Standby
Mode
(µA)
Supply
Voltage
(V)
Operating
Temperature
Range
TA (° C)
Packages
SOP
SON
4M× 1
S25FL004A0L
50
13
(f = 50MHz)
50
2.7 to 3.6
-40 to +85
8SO
8USON
8M× 1
S25FL008A0L
50
12
(f = 50MHz)
50
2.7 to 3.6
-40 to +85
8SO
8USON
16 M × 1
S25FL016A0L
50
11
(f = 50MHz)
50
2.7 to 3.6
-40 to +85
16SO
8WSON
64 M × 1
S25FL064A0L
50
10
(f = 50MHz)
50
2.7 to 3.6
-40 to +85
16SO
−
CL = 30pF
Package: P-Plastic
67
Memory
VCC Current
Clock
speed
(MHz)
MCP (Multi Chip Package)
Supply
Voltage
2-Chip MCP
(Continued)
68
Single
3V
Organization
Flash memory
PSRAM
2 M × 16
256 K × 16
Flash memory
SRAM
2 M × 16
512 K × 16
Flash memory
PSRAM
2 M × 16 M
1 M × 16
Flash memory
PSRAM
4 M × 16
1 M × 16
Flash memory
PSRAM
8 M × 16
2 M × 16
Flash memory
PSRAM
8 M × 16
4 M × 16
Flash memory
PSRAM
16 M × 16
4 M × 16
Flash memory
PSRAM
16 M × 16
8 M × 16
(Continued)
Part Number
Access
Time
Features
S71PL032J40BxW
65 ns
−
S71PL032J08BxW
65 ns
−
S71PL032JA0BxW
65 ns
−
S71PL064JA0BxW
65 ns
−
S71PL127NB0HxW
S71PL129NB0HxW
70 ns
−
S71PL127NC0HxW
S71PL129NC0HxW
70 ns
−
S71PL256NC0HxW
70 ns
−
S71PL256ND0HxW
70 ns
−
MCP (Multi Chip Package)
■ 2-Chip MCP (Single 3 V)
S71PL032J40BxW
S71PL032J08BxW
S71PL032JA0BxW
S71PL064JA0BxW
S71PL127NB0HxW
S71PL129NB0HxW
S71PL127NC0HxW
S71PL129NC0HxW
S71PL256NC0HxW
S71PL256ND0HxW
: Now planning
Organization
(W × b)
Flash memory
2 M × 16
PSRAM
256 K × 16
Flash memory
2 M × 16
SRAM
512 K × 16
Flash memory
2 M × 16
PSRAM
1 M × 16
Flash memory
4 M × 16
PSRAM
1 M × 16
Flash memory
8 M × 16
PSRAM
2 M × 16
Flash memory
8 M × 16
PSRAM
4 M × 16
Flash memory
16 M × 16
PSRAM
4 M × 16
Flash memory
16 M × 16
PSRAM
8 M × 16
Access
Time
Max. (ns)
65
65
65
65
70
70
70
70
VCC Current
Read
(mA)
Standby
Mode (µA)
30
(f = 5 MHz)
5
22
(f = 10 MHz)
100
30
(f = 5 MHz)
5
25
(f = 10 MHz)
10
30
(f = 5 MHz)
5
35
100
30
(f = 5 MHz)
5
25
100
45
(f = 5 MHz)
40
35
100
45
(f = 5 MHz)
40
45
120
45
(f = 5 MHz)
40
45
120
45
(f = 5 MHz)
40
TBD
TBD
Supply
Voltage
(V)
Operating Packages
Temperatu
re
BGA
(° C)
2.7 to 3.1
-25 to +85
56P
2.7 to 3.1
-25 to +85
56P
2.7 to 3.1
-25 to +85
56P
2.7 to 3.1
-25 to +85
56P
2.7 to 3.1
-25 to +85
64P
2.7 to 3.1
-25 to +85
64P
2.7 to 3.1
-25 to +85
84P
2.7 to 3.1
-25 to +85
84P
Memory
Part Number
Package: P-Plastic
Consult the Sales representatives for other products.
69
MCP (Multi Chip Package)
(Continued)
(Continued)
Supply
Voltage
Single
3V
70
Organization
Flash memory
PSRAM
1 M × 16
256 K × 16
Flash memory
PSRAM
2 M × 16
256 K × 16
Flash memory
SRAM
2 M × 16 M
512 K × 16
Flash memory
SRAM
4 M × 16
512 K × 16
Flash memory
PSRAM
4 M × 16
1 M × 16
Flash memory
PSRAM
8 M × 16
2 M × 16
Flash memory
PSRAM
8 M × 16
4 M × 16
Flash memory
PSRAM
16 M × 16
2 M × 16
Flash memory
PSRAM
32 M × 16
2 M × 16
Access
Time
Features
S71GL016A40BxW
100 ns
−
S71GL032A40BxW
100 ns
−
S71GL032A08BxW
100 ns
−
S71GL064A08BxW
100 ns
−
S71GL064AA0BxW
100 ns
−
S71GL128NB0BxW
90 ns
−
S71GL128NC0BxW
90 ns
−
S71GL256NB0BxW
90 ns
−
S71GL512NB0BxW
100 ns
−
Part Number
MCP (Multi Chip Package)
■ 2-Chip MCP (Single 3 V)
S71GL016A40BxW
S71GL032A40BxW
S71GL032A08BxW
S71GL064A08BxW
S71GL064AA0BxW
S71GL128NB0BxW
S71GL128NC0BxW
S71GL256NB0BxW
S71GL512NB0BxW
Organization
(W × b)
Flash memory
1 M × 16
PSRAM
256 K × 16
Flash memory
2 M × 16
PSRAM
256 K × 16
Flash memory
2 M × 16
SRAM
512 K × 16
Flash memory
4 M × 16
SRAM
512 K × 16
Flash memory
4 M × 16
PSRAM
1 M × 16
Flash memory
8 M × 16
PSRAM
2 M × 16
Flash memory
8 M × 16
PSRAM
4 M × 16
Flash memory
16 M × 16
PSRAM
2 M × 16
Flash memory
32 M × 16
PSRAM
2 M × 16
Access
Time
Max. (ns)
100
100
100
100
100
90
90
90
100
VCC Current
Read
(mA)
Standby
Mode (µA)
25
(f = 5 MHz)
5
15
(f = 10 MHz)
40
25
(f = 5 MHz)
5
15
(f = 10 MHz)
40
25
(f = 5 MHz)
5
22
15
25
(f = 5 MHz)
5
22
15
25
(f = 5 MHz)
5
20
100
30
(f = 5 MHz)
5
20
100
30
(f = 5 MHz)
5
TBD
TBD
30
(f = 5 MHz)
5
20
100
30
(f = 5 MHz)
5
20
100
Supply
Voltage
(V)
Operating Packages
Temperature
(° C)
BGA
2.7 to 3.1
-25 to +85
56P
2.7 to 3.1
-25 to +85
56P
2.7 to 3.1
-25 to +85
56P
2.7 to 3.1
-25 to +85
56P
2.7 to 3.1
-25 to +85
56P
2.7 to 3.1
-25 to +85
64P
2.7 to 3.1
-25 to +85
84P
2.7 to 3.1
-25 to +85
84P
2.7 to 3.1
-25 to +85
84P
Memory
Part Number
Package: P-Plastic
Consult the Sales representatives for other products.
71
MCP (Multi Chip Package)
Supply
Voltage
3-Chip MCP
72
Single
3V
Organization
Part Number
Code
Flash memory
Data
Flash memory
PSRAM
8 M × 16
8 M × 16
2 M × 16
Code
Flash memory
Data
Flash memory
PSRAM
8 M × 16
16 M × 16
2 M × 16
Code
Flash memory
Data
Flash memory
PSRAM
8 M × 16
32 M × 16
2 M × 16
Code
Flash memory
Data
Flash memory
PSRAM
8 M × 16
8 M × 16
4 M × 16
Code
Flash memory
Data
Flash memory
PSRAM
8 M × 16
16 M × 16
4 M × 16
Code
Flash memory
Data
Flash memory
PSRAM
8 M × 16
32 M × 16
4 M × 16
Access
Features
Time
S75PL127JBDBxW
65
−
S75PL127JBEBxW
65
−
S75PL127JBFBxW
65
−
S75PL127JCDBxW
65
−
S75PL127JCEBxW
65
−
S75PL127JCFBxW
65
−
MCP (Multi Chip Package)
■ 3-Chip MCP (Single 3 V)
Organization
(W × b)
Access
Time
Max. (ns)
Read
(mA)
Standby
Mode (µA)
30
(f = 5 MHz)
5
50
(f = 5 MHz)
5
PSRAM
2 M × 16
35
100
Code Flash
8 M × 16
30
(f = 5 MHz)
5
50
(f = 5 MHz)
5
PSRAM
2 M × 16
35
100
Code Flash
8 M × 16
30
(f = 5 MHz)
5
50
(f = 5 MHz)
5
PSRAM
2 M × 16
45
120
Code Flash
8 M × 16
30
(f = 5 MHz)
5
50
(f = 5 MHz)
5
PSRAM
4 M × 16
45
120
Code Flash
8 M × 16
30
(f = 5 MHz)
5
50
(f = 5 MHz)
5
PSRAM
4 M × 16
45
120
Code Flash
8 M × 16
30
(f = 5 MHz)
5
50
(f = 5 MHz)
5
45
120
Code Flash
8 M × 16
S75PL127JBDBxW
S75PL127JBEBxW
S75PL127JBFBxW
S75PL127JCDBxW
S75PL127JCEBxW
S75PL127JCFBxW
VCC Current
Data Flash
8 M × 16
Data Flash
16M × 16
Data Flash
32 M × 16
Data Flash
8 M × 16
Data Flash
16 M × 16
Data Flash
32 M × 16
PSRAM
4 M × 16
65
65
65
65
65
65
Supply
Voltage
(V)
Operating Packages
Temperature
(° C)
BGA
2.7 to 3.1
-25 to +85
84P
2.7 to 3.1
-25 to +85
84P
2.7 to 3.1
-25 to +85
84P
2.7 to 3.1
-25 to +85
84P
2.7 to 3.1
-25 to +85
84P
2.7 to 3.1
-25 to +85
84P
Memory
Part Number
Package: P-Plastic
Consult the Sales representatives for other products.
73
MCP (Multi Chip Package)
Supply
Voltage
2-Chip MCP
(Continued)
Single
1.8 V
Organization
Part Number
Flash memory
PSRAM
4 M × 16
1 M × 16
Flash memory
PSRAM
4 M × 16
2 M × 16
Flash memory
PSRAM
8 M × 16
2 M × 16
Flash memory
PSRAM
8 M × 16
4 M × 16
Flash memory
PSRAM
8 M × 16
2 M × 16
Flash memory
PSRAM
8 M × 16
4 M × 16
Flash memory
PSRAM
16 M × 16
4 M × 16
Flash memory
PSRAM
16 M × 16
8 M × 16
S71WS064JA0BxW
S71WS064JB0BxW
S71WS128JB0BxW
S71WS128JC0BxW
S71WS128NB0BxW
S71WS128NC0BxW
S71WS256NC0BxW
S71WS256ND0BxW
(Continued)
*1 : Asynchronous access time
*2 : Synchronous delay time/burst access time
74
Access
Time
55 *1
56/11.2 ns *2
55 *1
56/11.2 ns *2
55 *1
56/11.2 ns *2
55 *1
56/11.2 ns *2
80 *1
80/9 ns *2
80 *1
80/9 ns *2
80 *1
80/9 ns *2
80 *1
80/9 ns *2
Features
−
−
−
−
−
−
−
−
MCP (Multi Chip Package)
■ 2-Chip MCP (Single 1.8 V)
S71WS064JA0BxW
S71WS064JB0BxW
S71WS128JB0BxW
S71WS128JC0BxW
(W × b)
Access
Time
Max. (ns)
Flash memory
4 M × 16
55 *1
Organization
PSRAM
1 M × 16
Flash memory
4 M × 16
PSRAM
2 M × 16
Flash memory
8 M × 16
PSRAM
2 M × 16
Flash memory
8 M × 16
PSRAM
4 M × 16
Flash memory
8 M × 16
S71WS128NB0BxW
56/11.2 *
2
55 *1
56/11.2 *2
55 *1
56/11.2 *2
55 *1
56/11.2
80 *
*2
80/9 *2
80/11.2 *2
80 *1
VCC Current
Read
(mA)
Standby
Mode (µA)
30 *3
50
30*4
110
30 *3
50
30*4
110
30 *3
50
30*4
110
30 *3
50
66
66
66
66
30*
1
80 *1
PSRAM
2 M × 16
Burst
speed
(MHz)
80
66
54
4
Supply
Voltage
(V)
Operating Packages
Temperature
(° C)
BGA
1.7 to 1.95
-25 to +85
80P
1.7 to 1.95
-25 to +85
80P
1.7 to 1.95
-25 to +85
84P
1.7 to 1.95
-25 to +85
84P
1.7 to 1.95
-25 to +85
84P
1.7 to 1.95
-25 to +85
84P
1.7 to 1.95
-25 to +85
84P
1.7 to 1.95
-25 to +85
84P
Memory
Part Number
120
48 *3
40
35 *4
110
48 *3
40
80/13.5 *2
Flash memory
8 M × 16
S71WS128NC0BxW
80 *1
80/9 *2
80 *1
PSRAM
4 M × 16
80/11.2 *
80 *1
80/13.5
Flash memory
16 M × 16
S71WS256NC0BxW
2
35 *
4
120
*2
80 *1
80/9 *2
80 *1
PSRAM
4 M × 16
80
66
54
80/11.2*2
80* 1
80
66
54
48 *3
40
35 *4
120
48 *3
40
40
120
80/13.5 *2
Flash memory
16 M × 16
S71WS256ND0BxW
80* 1
80/9 *2
80 *1
PSRAM
8 M × 16
80/11.2*
2
80 *1
80
66
54
80/13.5 *2
*1 : Asynchronous access time
*2 : Synchronous delay time/burst access time
*3 : Burst read - at continuous mode
*4 : Initial Access - at burst read
Package: P-Plastic
Consult the Sales representatives for other products.
75
MCP (Multi Chip Package)
(Continued)
(Continued)
Supply
Voltage
Single
1.8 V
Organization
Flash memory
Part Number
1 M × 16
Flash memory
PSRAM
8 M × 16
1 M × 16
Flash memory
PSRAM
8 M × 16
4 M × 16
Flash memory
PSRAM
8 M × 16
1 M × 16
Flash memory
PSRAM
8 M × 16
4 M × 16
Flash memory
SDRAM
16 M × 16
8 M × 16
Flash memory
SDRAM
16 M × 16
8 M × 16
S71NS064JA0BxFW
65
71/11 ns *2
70*1
87.5/13.5 *2
−
S71NS128JA0BxFW
65 *1
71/11 ns *2
70 *1
87.5/13.5 *2
−
S71NS128JC0BxFW
65 *1
71/11 ns *2
70 *1
87.5/13.5 *2
−
S71NS128NA0BxFW
80 *1
80/9 ns *2
80 *1
80/11 *2
−
S71NS128NC0BxFW
80 *1
80/9 ns *2
80 *1
80/11 *2
−
S72WS256ND0BxW
80 *1
80/13.5 *2
−
S73WS256ND0BxW
80 *1
80/13.5 *2
−
*1 : Asynchronous access time
*2 : Synchronous delay time/burst access time
76
Features
*1
PSRAM
4 M × 16
Access
Time
MCP (Multi Chip Package)
■ 2-Chip MCP (Single 1.8 V)
Organization
(W × b)
Flash memory
4 M × 16
S71NS064JA0BxFW
PSRAM
1 M × 16
Flash memory
8 M × 16
S71NS128JA0BxFW
PSRAM
1 M × 16
Flash memory
8 M × 16
S71NS128JC0BxFW
PSRAM
4 M × 16
Flash memory
8 M × 16
S71NS128NA0BxFW
PSRAM
1 M × 16
Flash memory
8 M × 16
S71NS128NC0BxFW
Access
Time
Max. (ns)
65 *1
71/11 *2
70 *1
66
54
87.5/13.5 *2
65 *1
71/11 *2
70 *1
66
54
87.5/13.5 *2
65 *1
71/11 *2
70 *1
66
54
87.5/13.5 *2
80 *1
80/9 *2
80 *1
80
66
80/11 *2
80 *1
80/9 *2
80 *1
PSRAM
4 M × 16
Burst
speed
(MHz)
80/11 *2
80 *1
80
66
54
VCC Current
Read
(mA)
Standby
Mode (µA)
30
40
25
60
30
40
25
60
30
40
35 *4
120
42 *3
70
25
60
42 *3
70
35 *4
120
36 *3
40
50
300
36 *3
40
50
300
Supply
Voltage
(V)
Operating Packages
Temperature
(° C)
BGA
1.7 to 1.95
-25 to +85
44P
1.7 to 1.95
-25 to +85
48P
1.7 to 1.95
-25 to +85
60P
1.7 to 1.95
-25 to +85
44P
1.7 to 1.95
-25 to +85
56P
1.7 to 1.95
-25 to +85
137P
1.7 to 1.95
-25 to +85
137P
Memory
Part Number
80/13.5 *2
S72WS256ND0BxW
S73WS256ND0BxW
Flash memory
16 M × 16
SDRAM
8 M × 16
Flash memory
16 M × 16
SDRAM
8 M × 16
80 *1
80/13.5 *2
80 *1
80/13.5 *2
54
54
*1 : Asynchronous access time
*2 : Synchronous delay time/burst access time
*3 : At continuous mode
*4 : At initial Access
Package: P-Plastic
Consult the Sales representatives for other products.
77
MCP (Multi Chip Package)
Supply
Voltage
3-Chip MCP
Single
1.8V
Organization
Flash memory Flash memory
16 M × 16
16 M × 16
Flash memory Flash memory
16 M × 16
16 M × 16
Flash memory Flash memory
16 M × 16
16 M × 16
Part Number
PSRAM
4 M × 16
PSRAM
8 M × 16
SDRAM
8 M × 16
S71WS512NC0BxW
S71WS512ND0BxW
S72WS256NDEBxW
S73WS256NDEBxW
Flash memory Flash memory
16 M × 16
16 M × 16
SDRAM
16 M × 16
S72WS256NEEBxW
S73WS256NEEBxW
*1 : Asynchronous access time
*2 : Synchronous delay time/burst access time
78
Access
Time
80 *1
80/9 ns *2
80 *1
80/9 ns *2
80 *1
80/13.5 *2
80 *1
80/13.5 *2
80 *1
80/13.5 *2
80 *1
80/13.5 *2
Features
−
−
−
−
−
−
MCP (Multi Chip Package)
■ 3-Chip MCP (Single 1.8 V)
Organization
(W × b)
Flash memory
16 M × 16
S71WS512NC0BxW
Burst
speed
(MHz)
80 *1
48 *3
40
35 *4
120
48 *3
40
48 *3
40
40
120
36 *3
40
36 *3
40
SDRAM
8 M × 16
30*4
110
Flash memory
16 M × 16
36 *3
40
36 *3
40
SDRAM
8 M × 16
30*4
110
Flash memory
16 M × 16
36 *3
40
36 *3
40
SDRAM
16 M × 16
35 *4
120
Flash memory
16 M × 16
36 *3
40
36 *3
40
35 *4
120
Flash memory
16 M × 16
Flash memory
16 M × 16
PSRAM
8 M × 16
80/ 9 *2
80 *1
80/11. 2 *
2
80 *1
80
66
54
80/13.5 *2
80 *1
80/9 *2
80 *1
80/11.2
*2
80 *1
80
66
54
80/13.5 *2
Flash memory
16 M × 16
S73WS256NDEBxW
S72WS256NEEBxW
S73WS256NEEBxW
Flash memory
16 M × 16
Flash memory
16 M × 16
Flash memory
16 M × 16
Flash memory
16 M × 16
SDRAM
16 M × 16
80
*1
80/13.5 *2
80 *1
80/13.5 *2
80 *1
80/13.5 *2
80 *1
80/13.5 *2
54
54
54
54
Supply
Voltage
(V)
Read Standby
(mA) Mode (µA)
40
Flash memory
16 M × 16
S72WS256NDEBxW
VCC Current
48 *3
PSRAM
4 M × 16
S71WS512ND0BxW
Access
Time
Max. (ns)
Operating Packages
Temperature
(° C)
BGA
1.7 to 1.95
-25 to +85
84P
1.7 to 1.95
-25 to +85
84P
1.7 to 1.95
-25 to +85
137P
1.7 to 1.95
-25 to +85
137P
1.7 to 1.95
-25 to +85
137P
1.7 to 1.95
-25 to +85
137P
Memory
Part Number
*1 : Asynchronous access time
*2 : Synchronous delay time/burst access time
*3 : At continuous mode
*4 : At initial Access
Package: P-Plastic
79
MCP (Multi Chip Package)
Supply
Voltage
4-Chip MCP
Single
1.8V
Organization
Flash
memory
Flash
memory
Flash
memory
Part Number
PSRAM
S75WS256NDFBxW
16 M × 16 16 M × 16 16 M × 16 8 M × 16
*1 : Asynchronous access time
*2 : Synchronous delay time/burst access time
80
Access
Time
80 *1
80/9 ns *2
Features
−
MCP (Multi Chip Package)
■ 4-Chip MCP (Single 1.8 V)
Organization
(W × b)
Flash memory
16 M × 16
S75WS256NDFBxW
Flash memory
16 M × 16
Access Burst
Time
speed
Max. (ns) (MHz)
VCC Current
Read
(mA)
Standby
Mode (µA)
48 *3
40
Supply
Voltage
(V)
Operating Packages
Temperature
(° C)
BGA
80 *1
80/9 *2
80 *1
2
Flash memory
16 M × 16
80/11.2 *
PSRAM
8 M × 16
80/13.5 *2
80 *1
80
66
54
1.7 to 1.95
35 *4
-25 to +85
84P
Memory
Part Number
120
*1 : Asynchronous access time
*2 : Synchronous delay time/burst access time
*3 : Continuous modeéû
*4 : Initial Accesséû
Package: P-Plastic
81
Products Scheduled to be out of Production
The productions listed below are scheduled to go out of production.
If you are considering the use in the new applications, select the other series of products
■ FCRAM
Part number
■ Flash memory/MCP
Description
MB82D01161-85
MB82D01161-85L
MBM29DL400TC-55
MBM29DL400BC-55
MB82D01161-90
MB82D01161-90L
MBM29DL400TC-70
MBM29DL400BC-70
MB82D01171A-80
MB82D01171A-80L
MB82D01171A-80LL
MBM29DL400TC-90
MBM29DL400BC-90
MB82D01171A-85
MB82D01171A-85L
MB82D01171A-85LL
16Mbit Async. SRAM Type
FCRAM
MB82D04172-65
MB82D04172-65L
MB82D04172-75
MB82D04172-75L
MB82DBS04163B-70
MB82DBS04163B-70L
MB82DP04183B-65
MB82DP04183B-65L
MB82DBR08163-70
MB82DBR08163-70L
MB81E161622-10
MB81E161622-10-X
MB81E161622-12
MB81E161622-12-X
MB811L323229-12
MB811L323229-18
32M/64M/128M/256Mbit
page mod Flash memory
S29GL256M10
S29GL256M11
MB82D01171B-70L
MB82D01171B-70LL
MB82D02172A-80
MB82D02172A-80L
4Mbit simultaneous Read/Write
operation (SRW) Flash memory
S29GL128M90
S29GL128M10
MB82D01171B-60L
MB82D01171B-60LL
MB82D02172A-70
MB82D02172A-70L
Description
S29GL032M90
S29GL032M10
S29GL032M11
S29GL064M90
S29GL064M10
S29GL064M11
MB82D01171A-90
MB82D01171A-90L
MB82D01171A-90LL
82
Part number
MBM29BS32LF-18
MBM29BT32LF-18
32Mbit Async. SRAM Type
FCRAM
64Mbit Async. SRAM Type
FCRAM
64Mbit Async./Sync. SRAM Type
FCRAM
128Mbit Async./Sync. SRAM Type
FCRAM
16Mbit SDR-SDRAM Type
FCRAM
32Mbit SDR-SDRAM Type
FCRAM
MBM29BS32LF-25
MBM29BT32LF-25
S29WS064N0L
S29WS064N0P
S29WS064N0S
32Mbit simultaneous Read/Write
operation (SRW) burst mode
Flash memory
64Mbit simultaneous Read/Write
operation (SRW) burst mode
Flash memory
S71WS256JD0BFW
3-Stacked MCP (Single 1.8 V)
S71WS512NE0BFW
4-Stacked MCP (Single 1.8 V)
Semicustom Product Line-up
■ FUJITSU Semicustom Products
Standard cell
Macro-embedded
type cell arrays
Gate arrays
CMOS
CMOS
Sea-of-Gate
CMOS
CS101 series
More than 91,000,000 (on-chip) gates
with on-chip RAM, ROM, ADC/DAC
84
CS91 series
More than 48,000,000 (on-chip) gates
with on-chip RAM, ROM, Multipliers, ADC/DAC
85
CS86 series
More than 40,000,000 (on-chip) gates
with on-chip RAM, ROM, FIFO, Delay Line, ADC/DAC
86
CS81 series
More than 40,000,000 (on-chip) gates, 11 ps/gate
with on-chip RAM, ROM, Multipliers, ADC/DAC
87
CS71 series
More than 10,000,000 gates (on chip), 29 ps/gate
with on-chip RAM, ROM, Multipliers, ADC/DAC
88
CS66 series
More than 1,700,000 (on-chip) gates, 98 ps/gate
with on-chip RAM, ROM, Multipliers, ADC/DAC
89
CE81 series
Maximum of 34,000,000 (on chip) gates, 12 ps/gate
with on-chip RAM, ROM, Multipliers, ADC/DAC
91
CE77 series
Maximum of 10,000,000 (on chip) gates, 33 ps/gate
with on-chip RAM, ROM, FIFO, Delay Line
92
CE71 series
Maximum of 8,096,000 (on chip) gates, 29 ps/gate
with on-chip RAM, ROM, Multipliers, ADC/DAC
94
CE66 series
Maximum of 1,138,000 (on-chip) gates, 98 ps/gate
with on-chip RAM, ROM, Multipliers, ADC/DAC.
96
CE61 series
Maximum of 2,025,000 (on chip) gates, 85 ps/gate
with on-chip RAM/ROM, Multipliers, ADC/DAC
98
CE46 series
Maximum of 198,000 (on chip) gates, 300 ps/gate
with on-chip RAM, ROM, FIFO
101
Maximum of 1,568,000 (on chip) gates, 85 ps/gate
CG61 series with on-chip RAM, Analog PLL embedment is possible in
some frames
102
CG47 series
Maximum of 55,000 (on chip) gates, 300 ps/gate
with on-chip RAM, FIFO
104
CG46 series
Maximum of 198,000 (on chip) gates, 300 ps/gate
with on-chip RAM, FIFO
105
AccelArray ™
CMOS
CA91 series
More than 6,000,000 (on-chip) gates, 4,550,000bit SRAM,
106
3.125 Gbps high-speeds interface macros
IF PLL Frequency
Synthesizer
CMOS
MB15C100
series
For IF PLL frequency synthesizers
Operating frequency: Up to 500 MHz
107
AccelArray is a trademark of Fujitsu Limited, Japan.
83
Semicustom
Page No.
Semicustom
Products
Standard Cell
■ CS101 Series
Features
Optimum gate count
Technology
: Maximum of 91,000,000 gates
: 90 nm Si-gate CMOS
6- to 10-metal layers. Low-k (low permittivity) inter-layer insulation film material is
used for all layers.
3 types of transistors (low leak, standard, high speed) can be mixed on a chip.
The design rules comply with industry standard processes.
Supply voltage
: +1.2 V ± 0.1 V (normal)
Junction temperature range : -40 to +125 ° C (normal)
Gate delay time
: tpd = 12 ps (1.2 V, Inverter, F/O = 1)
Gate power consumption
: Pd = 2.7 nW/MHz/BC (1.2 V, Inverter, F/O = 1)
Reduced chip sized realized by I/O with pad.
Supports a wide range of cell sets (from low power versions to high speed versions)
Compliance with industry standard design rules enables non-Fujitsu commercial macros to be easily incorporated.
Compiled cells (RAM/ROM and others)
Ultra high-speed interface macro (up to 10 GBps)
Special interfaces (LVDS, SSTL_2 and others)
Supports use of industry standard libraries (. LIB)
Uses industry standard tools and supports the optimum tools for the application.
High reliability design estimation in the early stage of physical design realized by physical prototyping tool.
Layout synthesis with optimized timing realized by physical synthesis tools.
Hierarchical design environment for supporting large-scale circuits.
High accuracy design environment considering drop in power supply voltages, signal noise, delay penalty, and
crosstalk.
I/O design environment (power line design, assignment and selection of I/Os, package selection) considering noise.
Support for static timing sign-off
Support for memory (RAM/ROM) BIST
Support for boundary SCAN
Support for LOGIC BIST
Support for transition delay test
Optimum of package lineup : TEBGA, FBGA, PBGA, FC-BGA
Note: Some items are in preparation.
84
Standard Cell
■ CS91 Series
Features
: Maximum of 48,000,000 gates
: 0.11 µm Si-gate CMOS, 5- to 8-layer wiring (Copper is used as wire material) ,
Low-k Inter-layer material
(Inter-layer material that has low permittivity)
Support for 5 types of cell sets that differ in speed, integration, and power consumption.
These cell sets can be mixed on a chip.
Supply voltage
: +1.2 V ± 0.1 V (normal)
Junction temperature range : -40 to +125 ° C
Gate delay time
: tpd = 16 ps (1.2 V, Inverter, F/O = 1)
Gate power consumption
: Pd = 6.6 nW/MHz (1.2 V, Inverter, F/O = 1)
Ultra high-speed interface macro (622 to 780 Mbps, 2.5 to 3.125 Gbps, 10 Gbps)
Special interfaces: P-CML, LVDS, PCI, USB, SSTL, HSTL, T-LVTTL, and others
Buffer cells for crystal oscillation circuits.
IP macros: CPU (ARM9, ARM7TDMI) , DSP, PCI, IEEE1394, USB, IrDA, PLL, ADC, DAC, and others
Compiled cells (RAM/ROM/multiplier and others)
Uses industry standard tools and supports the optimum tools for the application.
Short-term development using a physical prototyping tool.
Hierarchical design environment for supporting large-scale circuits.
Support for Signal Integrity, EMI noise reduction
Support for High resolution RC extraction base delay calcuration environment
Support for optimization environment of power supply wire
Support for static timing sign-off
Support for memory (RAM/ROM) BIST
Support for boundary SCAN
Support for LOGIC BIST
Support for transition delay test
A variety of package options : FC-BGA (Max. 2116 pin), EBGA, HQFP, FBGA and others
Semicustom
Optimum gate count
Technology
Note: Some items are in preparation.
85
Standard Cell
■ CS86 Series
Features
Optimum gate count
Technology
: Maximum of 40,000,000 gates
: 0.18 µm Si-gate CMOS, 4- to 6-layer wiring
Support for three types of internal cell sets (ultra high-speed, standard, low-leak)
Capable of integrating a mixture of standard transistor cell and ultra high-speed process/cell, and mixture of standard transistor cell and low leak process/cell on a single
chip
Supply voltage
: +1.8 V ± 0.15V (normal) to +1.1V ± 0.1V
Gate delay time
: tpd = 88 ps
(standard
: 1.8 V, 2NAND, F/O = 2, standard load)
tpd = 70 ps
(ultra high-speed : 1.8 V, 2NAND, F/O = 2, standard load)
tpd = 136 ps
(low-leak
: 1.8 V, 2NAND, F/O = 2, standard load)
Leakage Current
: 0.023 nW
(standard
: 1.8 V, 2NAND, F/O = 0, no load)
3.922 nW
(ultra high-speed : 1.8 V, 2NAND, F/O = 0, no load)
0.0067 nW
(low-leak
: 1.8 V, 2NAND, F/O = 0, no load)
Gate power consumption
: 40.1 nW/MHz
(standard
: 1.8 V, 2NAND, F/O = 1, 4Grid)
42.7 nW/MHz
(ultra high-speed : 1.8 V, 2NAND, F/O = 1, 4Grid)
38.3 nW/MHz
(low-leak
: 1.8 V, 2NAND, F/O = 1, 4Grid)
Junction temperature range : -40 to +125 ° C
Output buffer cells with noise reduction circuits
Inputs with on-chip input pull-up/pull-down resistors and bidirectional buffer cells.
Buffer cells for crystal oscillation circuits.
Special interfaces
: SSTL2, PCI, P-CML, T-LVTTL, USB2.0, IEEE1394, and others
IP macros
: CPU (FR-V, ARM9,and others), DSP, PCI, IEEE1394, USB2.0, IrDA, PLL, ADC, DAC,
and others
Compiled cells (RAM/ROM/FIFO/Delay line, and others)
Configurable internal bus circuits
Advanced for hardware/software co-design environment
Short-term development using a physical synthesis tool
Low-power dissipation using a low power synthesis tool
Short-term development using a timing driven layout tool
Hierarchical design environment for supporting large-scale circuits
Supprt for signal Integrity
Suppor for memory (RAM, ROM) SCAN
Suppor for memory (RAM) BIST
Suppor for boundary SCAN
Support for path delay test
A variety of package options (QFP, TQFP, LQFP, HQFP, PBGA, FBGA, FLGA, EBGA)
Note: Some items are in preparation.
Packages
The table below lists the available package types.
Type
Pin Count
QFP
176, 208, 240
Plastics
TQFP
100, 120
Plastics
LQFP
144, 176, 208, 256
Plastics
HQFP
208, 240, 256, 304
Plastics
PBGA
256, 352, 420
Plastics
FBGA
112, 144, 168, 176, 192, 224, 272, 288, 240, 304, 368
Plastics
FLGA
144, 176, 208, 224, 288
Plastics
EBGA
660
Plastics
Note: This list contains packages under planning. Contact Fujitsu for the availability.
86
Material
Standard Cell
Features
Optimum gate count
: Maximum of 40,000,000 gates
Technology
: 0.18 µm Si-gate CMOS, 3- to 6-layer wiring
Capable of integrating a mixture of high-speed processes and cells on a single chip
Supply voltage
: +1.8 V ± 0.15V (normal) to +1.1V ± 0.1V
Gate delay time
: tpd = 11 ps (1.8 V, Inverter, F/O = 1)
Gate power consumption
: 5nW/MHz/BC (1.1V, 2NAND, F/O = 1)
Junction temperature range : -40 to +125 ° C
Ultra high-speed interface macro (622 to 780 Mbps, 2.5 to 3.125 Gbps)
Output buffer cells with noise reduction circuits
Inputs with on-chip input pull-up/pull-down resistors (33 kΩ typical) and bidirectional buffer cells.
Buffer cells for crystal oscillation circuits.
Special interfaces: P-CML, LVDS, PCI, AGP, USB, SDRAM-I/F, SSTL, and others
IP macros: CPU, DSP, PCI, IEEE1394, USB, IrDA, PLL, ADC, DAC, and others
Compiled cells (RAM/ROM/multiplier, and others)
Configurable internal bus circuits
Advanced for hardware/software co-design environment
Short-term development using a timing driven layout tool
Support for static timing sign-off
Dramatically reducing the time for generating test vectors for timing verification and the simulation time
Hierarchical design environment for supporting large-scale circuits
Simulation (before layout) considering the input through rate and high resolution RC extraction base delay calculation (after layout), supporting development with minimized timing trouble after trial manufacture.
Supprt for signal Integrity, EMI noise reduction
Suppor for memory (RAM, ROM) SCAN
Suppor for memory (RAM) BIST
Suppor for boundary SCAN
Support for At-Speed test on internal circuits
Support for path delay test
Support for transition delay test
A variety of package options (TQFP, HQFP, EBGA, FBGA, TAB-BGA, FC-BGA, LQFP)
Note: Some items are in preparation.
Packages
The table below lists the available package types.
Type
Pin Count
Material
TAB-BGA
304, 352, 480
560, 660, 720
Plastics
EBGA
576, 660, 672
Plastics
HQFP
208, 240, 256, 304
Plastics
TQFP
100, 120
Plastics
LQFP
144, 176, 208
Plastics
FBGA
288
Plastics
FC-BGA
1089, 1225, 1369, 1681, 1849, 2116
Plastics, Ceramic
Note: This list contains packages under planning. Contact Fujitsu for the availability.
87
Semicustom
■ CS81 Series
Standard Cell
■ CS71 Series
Features
Optimum gate count
Technology
Supply voltage
: Maximum of 10,000,000 gates
: 0.25 µm Si-gate CMOS, 3- to 4-layer metal wiring
: +2.5 V ± 0.2 V (normal) to +1.5 V ± 0.1 V
(5 V TTL interface is available if 5 V tolerant I/O is adopted. some frames are under
development.)
Gate delay time
: tpd = 32 ps (Inverter cell high speed type, F/O = 1, No load)
Gate power consumption
: 0.044 µW/MHz (F/O = 1, no load)
Junction temperature range : -40 to +125 ° C
High-load driving capability : IOL = 2 mA/4 mA/8 mA/12 mA mixable.
Output buffer cells with noise reduction circuits
Inputs with on-chip input pull-up/pull-down resistors (25 kΩ typical) and bidirectional buffer cells.
Buffer cells for crystal oscillation circuits.
Special interfaces (P-CML, LVDS, SDRAM-I/F, SSTL, and others)
IP macros (SPARClite, FR40, F2MC16LX, PCI, IEEE1394, USB, IrDA, PLL, ADC/DAC, and others)
Compiled cells (RAM/ROM/multipliers, and others)
Configurable internal bus circuits
Advanced for hardware/software co-design environment
Linking floor plan tools and logic synthesis tools allows automatic optimization of the circuits using the floor plan
information. The Clock Driven Design Method (Cadence "CT-Gen") clock tree synthesis tools using the floor plan
information are also available. Using the floor plan information in the pre-layout stage would eliminate the problems
of setup after layout or timing problems for hold, significantly reducing the time to market.
Supports the static timing sign off using the Synopsys CAD tool PrimeTime. This contributes to the considerable
reduction of time required for test vector creation for timing verification and the simulation time.
Simulation (before layout) considering the input through rate and detailed RC delay calculation (after layout),
supporting development with minimized timing trouble after trial manufacture.
Support for memory (RAM, ROM) SCAN
Support for memory (RAM) BIST
Support for boundary SCAN
A variety of package options (SQFP, LQFP, HQFP, PBGA, EBGA, TAB-BGA, FBGA)
Note: Some items are in preparation.
Packages
The table below lists the available package types.
Type
Pin count
Material
SQFP
176, 208, 240
Plastics
LQFP
144, 176, 208, 256
Plastics
HQFP
208, 240, 256, 304
Plastics
PBGA
256, 352, 420
Plastics
EBGA
352, 420, 576, 660, 672
Plastics
TAB-BGA
304, 352, 480, 560, 660, 720
Plastics
FBGA
144, 176, 224, 288
Plastics
Note: This list contains packages under planning. Contact Fujitsu for the availability.
88
Standard Cell
■ CS66 Series
Features
: Maximum of 1,700,000 gates
: 0.35 µm Si-gate, 3- to 4-layer metal wiring
: +3.3 V ± 0.3 V (normal) to +2.0 V ± 0.1 V
+5.0 V ± 10% (only for external interface; when internal requirements is 3.3 V)
+3.3 V ± 10% (only for external interface; when internal requirements is 3.3 to 2.0 V)
Gate delay time
: tpd = 91 ps (high-speed type, F/O = 2, standard load)
Gate power consumption
: 0.29 µW/MHz (F/O = 2, standard load)
Junction temperature range : -40 to +125° C
High-load driving capability : IOL = 2 mA/4mA/8mA/12mA/24mA mixable.
Output buffer cells with noise reduction circuits
On-chip input pull-up/pull-down resistors (50 kΩ typical)
Buffer cells for crystal oscillation circuits.
Configurable internal bus circuits
Highly integrated RAM/ROM/multipliers mountable; arbitrary words/bits configurable.
Clock skew layout design method (Cadence "CT-Gen") based on the floor plan information minimizes post-layout
circuit modification, reducing turnaround time for development.
Simulation (before layout) considering the input through rate and detailed RC delay calculation (after layout),
supporting development with minimized timing trouble after trial manufacture.
Special interface (T-LVTTL and SDRAM-I/F, and others)
Analog PLL
Analog circuits (ADC, DAC, OPAMP and others)
Macros for system ASICs (CPU core, CPU peripheral, operation macro, and others)
Support for DFF scan test with MUX
Support for memory (RAM/ROM) scan
Support for memory (RAM) BIST
Support for boundary SCAN
Note: Some items are in preparation.
Number of gates used in each package
The table below lists the available package types and athe reference number of gates used.
CS66 (P-frame)
Package and pin
count
0
2000K
4000K
6000K
8000K
10000K
12000K
14000K
16000K
TQFP
100
1579K
LQFP
100
144
176
208
1579K
1579K
1579K
1305K
QFP
120
144
160
176
208
240
256
1579K
1579K
1579K
1579K
1579K
1579K
1579K
HQFP
208
240
256
304
1579K
1579K
1579K
1579K
PBGA
256
352
1579K
1579K
FBGA
112
144
168
176
192
224
288
639K
639K
835K
1305K
1579K
1579K
1579K
Note: This list contains packages under planning.
89
Semicustom
Optimum gate count
Technology
Supply voltage
Standard Cell
CS66 (S-frame)
Package and pin
count
0
100K
200K
TQFP
100
158K
LQFP
100
144
208
158K
158K
120
144
160
176
208
240
158K
158K
QFP
HQFP
208
240
256
PBGA
256
352
FBGA
112
144
168
176
192
224
288
300K
500K
600K
700K
800K
433K
228K
228K
358K
545K
358K
545K
545K
545K
807K
192K
228K
433K
228K
289K
Note: This list contains packages under planning.
90
400K
433K
807K
900K
Macro-Embedded Type Cell Arrays
■ CE81 Series
High Integration
: Maximum of 34,000,000 BCs
Technology
: 0.18 µm Si-gate CMOS, 4- to 5-layer wiring
Supply voltage
: +1.8 V ± 0.15 V (normal) to +1.1 V ± 0.1 V
Gate delay time
: tpd = 12 ps (1.8V, Inverter, F/O = 1)
Gate power consumption
: 8nW/MHz/BC (1.1V, 2NAND, F/O = 1)
Junction temperature range : -40 to +125 ° C
Output buffer cells with noise reduction circuits
Inputs with on-chip input pull-up/pull-down resistors (33 kΩ typical) and bidirectional buffer cells.
Buffer cells for crystal oscillation circuits.
Special interfaces: P-CML, LVDS, PCI, AGP, USB, SDRAM-I/F, SSTL, and others
IP macros: CPU, DSP, PCI, IEEE1394, USB, IrDA, PLL, ADC, DAC, and others
Compiled cells (RAM/ROM/multipliers, and others)
Configurable internal bus circuits
Advanced for hardware/software co-design environment
Short-term development using a timing driven layout tool
Support for static timing sign-off
Dramatically reducing the time for generating test vectors for timing verification and the simulation time.
Hierarchical design environment for supporting large-scale circuits
Support for optimization environment of power supply wire
Simulation (before layout) considering of the input through rate and high resolution RC extraction base delay calculation (after layout), supporting development with minimized timing trouble after trial manufacture.
Support for Signal Integrity
Support for memory (RAM, ROM) SCAN
Support for memory (RAM) BIST
Support for boundary SCAN
Support for At-Speed test on internal circuits
Support for path delay test
Support for transition delay test
A variety of package options (TQFP, HQFP, EBGA, FBGA, TAB-BGA, LQFP)
Note: Some items are in preparation.
Number of gates used in package
The table below lists the available package types and athe reference number of gates used.
Package
and
pin count
TAB-BGA
EBGA
HQFP
304
352
480
560
660
720
0
2000K
4000K
6000K
TQFP
100
120
LQFP
144
176
208
FBGA
288
10000K
12000K
14000K
16000K
891K
1254K
1905K
2689K
3609K
9129K
576
660
672
208
240
256
304
304
8000K
5982K
9805K
7952K
1098K
2085K
3764K
15158K
4712K
514K
514K
722K
722K
1098K
4712K
Note: This list contains packages under planning.
91
Semicustom
Features
Macro-Embedded Type Cell Arrays
■ CE77 Series
Features
High integration
: Maximum of 10,000,000 BCs
Technology
: 0.25 µm Si-gate CMOS, 3- to 4-layer wiring
Supply voltage
: +2.5 V ± 0.2 V (normal) to +1.5 V ± 0.1 V
Junction temperature range : -40 to +125° C
Gate delay time
: tpd = 33 ps (2.5 V, Inverter, F/O = 1, No load)
Gate power consumption
: 0.02 µW/MHz (1.5 V, Inverter, F/O = 1, No load)
High-load driving capability : IOL = 2mA/4mA/8mA/12mA mixable.
Output buffer cells with noise reduction circuits
Inputs with on-chip input pull-up/pull-down resistors (25 kΩ typical) and bidirectional buffer cells.
Buffer cells for crystal oscillation circuits.
Special interfaces (P-CML, LVDS, T-LVTTL, SSTL, PCI, USB, GTL+, and others)
IP macros (CPU, PCI, USB, IrDA, PLL, DAC, ADC, and others)
Compiled cells (RAM/ROM/FIFO/DelayLine, and others)
Configurable internal bus circuits
Advanced for hardware/software co-design environment
Short-term development using a timing driven layout tool
Hierarchical design environment for supporting large-scale circuits
Support for static timing sign-off
Dramatically reducing the time for generating test vectors for timing verification and the simulation time.
Simulation (before layout) considering the input through rate and detailed RC delay calculation (after layout),
supporting development with minimized timing trouble after trial manufacture.
Support for memory (RAM, ROM) SCAN
Support for memory (RAM) BIST
Support for boundary SCAN
Support for path delay test
A variety of package options (SQFP, LQFP, HQFP, FBGA, PBGA)
Note: Some items are in preparation.
Number of gates used in each package
The table below lists the available package types and athe reference number of gates used.
CE77 (V-Frame)
Package and
pin count
SQFP
176
208
240
HQFP
208
240
256
304
PBGA
256
0
1000k
2000k
3000k
5000k
6000k
7000k
8000k
9000k
Material
P
P
P
274k
803k
965k
1776k
2276k
1776k
7128k
618k
P: Plastic
Note: This list contains packages under planning.
92
4000k
P
P
P
P
P
Macro-Embedded Type Cell Arrays
CE77 (T-Frame)
LQFP
HQFP
FBGA
PBGA
144
176
208
256
0
500K
1000K
2000K
2500K
3000K
3500K
4000K
4500K
5000K
1375 K
1841 K
1375 K
1609 K
2109 K
4538 K
P
P
P
P
P
P
P
P
461 K
646 K
1375 K
256
352
420
Material
P
P
P
P
976 K
744 K
208
240
256
304
144
176
224
288
1500K
2109 K
1841 K
2678 K
3789 K
P
P
P
Semicustom
Package and
pin count
P: Plastic
Note: This list contains packages under planning.
93
Macro-Embedded Type Cell Arrays
■ CE71 Series
Features
High integration
Technology
Supply voltage
: Maximum of 8,000,000 BCs
: 0.25 µm Si-gate CMOS, 3- to 4-layer metal wiring
: +2.5 V ± 0.2 V (normal) to +1.5 V ± 0.1 V
(5 V TTL interface is available if 5 V tolerant I/O is adopted. Some frames are under
development.)
Gate delay time
: tpd = 29 ps (2.5 V, Inverter, F/O = 1, No load)
Gate power consumption
: 0.060 µW/MHz (F/O = 1, No load)
Junction temperature range : -40 to +125° C
High-load driving capability : IOL = 2 mA/4 mA/8 mA/12 mA mixable.
Output buffer cells with noise reduction circuits
Inputs with on-chip input pull-up/pull-down resistors (25 kΩ typical) and bidirectional buffer cells.
Buffer cells for crystal oscillation circuits.
Special interfaces (P-CML, LVDS, SDRAM-I/F, SSTL, and others)
IP macros (SPARClite, FR40, F2MC16LX, PCI, IEEE1394, USB, IrDA, PLL, ADC/DAC, and others)
Compiled cells (RAM/ROM/multipliers, and others)
Configurable internal bus circuits
Advanced for hardware/software co-design environment
Linking floor plan tools and logic synthesis tools allows automatic optimization of the circuits using the floor plan
information. The Clock Driven Design Method (CDDM) clock tree synthesis tools using the floor plan information are
also available. Using the floor plan information in the pre-layout stage would eliminate the problems of setup after
layout or timing problems for hold, significantly reducing the time to market.
Supports the static timing sign off using the Synopsys CAD tool Prime Time. This contributes to the considerable
reduction of time required for test vector creation for timing verification and the simulation time.
Simulation (before layout) considering the input through rate and detailed RC delay calculation (after layout),
supporting development with minimized timing trouble after trial manufacture.
Suppor for memory (RAM, ROM) SCAN
Support for memory (RAM) BIST
Support for boundary SCAN
A variety of package options (SQFP, LQFP, HQFP, PBGA, EBGA, TAB-BGA, FBGA)
Note: Some items are in preparation.
Number of gates used in each package
The table below lists the available package types and athe reference number of gates used.
CE71 (J-Frame)
Package and
pin count
176
SQFP
208
240
0
1000 K
3000 K
P
P
714 K
P
1313 K
P
1681 K
P
1313 K
304
352
420
EBGA
576
5345 K
P
P
457 K
P
991 K
P
1313 K
P
1986 K
660
672
P: Plastic
Note: This list contains packages under planning.
94
Material
P
240
256
5000 K
592 K
256
PBGA
4000 K
203 K
208
HQFP
2000 K
5345 K
2673 K
P
P
Macro-Embedded Type Cell Arrays
CE71 (L-Frame)
Package and
pin count
0
304
TAB-BGA
1000 K
2000 K
3000 K
4000 K
5000 K
Material
P
310 K
352
672 K
480
672 K
P
P
560
P
2279 K
660
P
1284 K
720
P
3278 K
Note: This list contains packages under planning.
P: Plastic
CE71 (T-Frame)
144
LQFP
176
0
1000 K
3000 K
P
P
1358 K
P
1014 K
240
P
1188 K
256
P
1559 K
304
FBGA
176
224
288
256
PBGA
352
Material
P
1014 K
208
5000 K
P
477 K
208
144
4000 K
341 K
256
HQFP
2000 K
Semicustom
Package and
pin count
3349 K
P
P
341 K
P
477 K
P
1014 K
P
1559 K
P
1358 K
P
1976 K
420
2794 K
P
Note: This list contains packages under planning.
P: Plastic
95
Macro-Embedded Type Cell Arrays
■ CE66 Series
Features
High integration
Technology
Supply voltage
: Maximum of 1,138,000 BCs
: 0.35 µm Si-gate, 3- to 4-layer metal wiring
: +3.3 V ± 0.3 V (normal) to +2.0 V ± 0.1 V
+5.0 V ± 10% (only for external interface; when internal requirements is 3.3 V)
+3.3 V ± 10% (only for external interface; when internal requirements is 3.3 to 2.0 V)
Gate delay time
: tpd = 98 ps (high-speed type, F/O = 2, standard load)
Gate power consumption
: 0.29 µW/MHz (F/O = 2, standard load)
Junction temperature range : - 40 to 125° C
High-load driving capability : IOL = 2 mA/4mA/8mA/12mA/24mA mixable.
Output buffer cells with noise reduction circuits
On-chip input pull-up/pull-down resistors (50 kΩ typical)
Buffer cells dedicated to crystal oscillator
Configurable internal bus circuits
Highly integrated RAM/ROM/multipliers mountable; arbitrary words/bits configurable.
Clock skew layout design method (CDDM) based on the floor plan information minimizes post-layout circuit modification, reducing turnaround time for development.
Simulation (before layout) considering the input through rate and detailed RC delay calculation (after layout),
supporting development with minimized timing trouble after trial manufacture.
Special interfaces (T-LVTTL and SDRAM-I/F, and others)
Analog PLL
Analog circuits (ADC, DAC, OPAMP and others)
Macros for system ASICs (CPU core, CPU peripheral, operational macros, and others)
Support for DFF scan test with MUX
Support for memory (RAM/ROM) SCAN
Support for memory (RAM) BIST
Support for boundary SCAN
Note: Some items are in preparation.
96
Macro-Embedded Type Cell Arrays
Number of gates used in each package
The table below lists the available package types and athe reference number of gates used.
CE66 (P-frame)
0
100K
200K
300K
400K
500K
600K
700K
800K
900K 1000K
1100K
1200K
TQFP
100
1138K
LQFP
100
144
176
208
1138K
1138K
1138K
939K
QFP
120
144
160
176
208
240
256
1138K
1138K
1138K
1138K
1138K
1138K
1138K
HQFP
208
240
256
304
1138K
1138K
1138K
1138K
PBGA
256
352
1138K
1138K
FBGA
112
144
168
176
192
224
288
459K
459K
601K
939K
1138K
1138K
1138K
Note: This list contains packages under planning.
CE66 (S-frame)
Package and pin
count
0
50K
100K
150K
TQFP
100
112K
LQFP
100
144
208
112K
112K
112K
112K
QFP
120
144
160
176
208
240
HQFP
208
240
256
PBGA
256
352
FBGA
112
144
168
176
192
224
288
200K
250K
300K
350K
400K
450K
500K
550K
600K
311K
163K
163K
256K
390K
256K
390K
390K
390K
579K
136K
163K
311K
163K
206K
311K
579K
Note: This list contains packages under planning.
97
Semicustom
Package and pin
count
Macro-Embedded Type Cell Arrays
■ CE61 Series
Features
High Integration
Technology
Basic circuit (basic cell)
Supply voltage
: Maximum of 2,000,000 BCs
: 0. 35 µm Si-gate 3-layer metal wiring/4-layer metal wiring
(There are restrictions applicable frames)
: 2-input NAND/2-input NOR gates
: +3.3 V ± 0.3 V (normal) to +2.0 V ± 0.1 V
High voltage tolerant transistor for I/O; interface provided for 5 V devices
(Also requiring a 5 V power supply for interface with 5 V devices)
Gate delay time
: High-speed type, tpd = 85 ps (2-input NAND, F/O = 2, standard load)
Junction temperature range : 0 to +100° C
High-load driving capability : IOL = 2 mA/4 mA/8 mA/12 mA/24 mA mixable.
Power consumption
: Reduced to 50% to 20% (over the Fujitsu CE51 Series)
Output buffer cells with noise reduction circuits
On-chip input pull-up/pull-down resistors (Typ. 50kΩ)
Buffer cells for crystal oscillation circuits.
Configurable internal bus circuits
Super high-integration RAM and ROM available. Compilable bit/word configuration
Clock skew reduction layout design technique (CDDM) employed to minimize circuit modification after layout, reducing TAT
Simulation (before layout) considering the input through rate and detailed RC delay calculation (after layout),
supporting development with minimized timing trouble after trial manufacture.
Supporting high speed interfaces [P-CML (200 MHz transmission), LVDS (250 MHz transmission), and SDRAM I/F,
PCI,5 V tolerant, USB, IEEE 1284]
PLL circuits
Analog circuits (ADC, DAC)
Macros for system ASICs (CPU core and CPU peripheral and operational macros, and others)
Supporting tests (for function/DC) using DFF scan with MUX
Supporting the test for RAM BIST, RAM SCAN and ROM SCAN
Supporting the Boundary SCAN
Now under preparation on for a narrow-pitch pad technology and high-pin count BGA packages to be added to the
current lineup
Variety of package options to optimize any gate size
Note: Some items are in preparation.
98
Macro-Embedded Type Cell Arrays
Number of gates used in each package)
The table below lists the available package types and athe reference number of gates used."
CE61 (F10 to F80)
0
100K 200K 300K 400K 500K 600K 700K 800K 900K 1000K1100K1200K1300K
64
80
100
120
144
160
160
176
176
208
208
240
240
256
256
304
86K
86K
86K
86K
LQFP
64
80
100
86K
86K
86K
HQFP
208
240
256
304
QFP
BGA
256
352
420
PGA
256
299
361
401
593K
1317K
981K
593K
1317K
1317K
1317K
981K
981K
1317K
593K
1317K
Material
P
P
P
P
P
P
C
P
C
P
C
P
C
C
P
C
Semicustom
Package and
pin count
P
P
P
1317K
981K
P
P
P
P
981K
981K
P
P
P
981K
1317K
593K
1317K
1317K
981K
1317K
C
C
C
C
P : Plastic C : Ceramic
Note: This list contains packages under planning.
99
Macro-Embedded Type Cell Arrays
CE61 (E7 to E71)
Package and
pin count
QFP
0
100K 200K 300K 400K 500K 600K 700K 800K 900K 1000K 1100K
509K
509K
120
144
160
176
208
240
256
LQFP
64
80
100
HQFP
208
240
256
304
BGA
256
352
420
576
672
P
P
P
P
P
P
P
747K
509K
747K
747K
747K
P
P
P
78K
128K
128K
1029K
1029K
1029K
1029K
P
P
P
P
1029K
P
P
P
P
P
391K
391K
P : Plastic
Note: This list contains packages under planning.
100
Material
509K
747K
Macro-Embedded Type Cell Arrays
■ CE46 Series
Features
High integration
Technology
Basic circuit (Basic cell)
Gate delay time
:
:
:
:
Maximum of 198,000 BCs
0.65 µm Si-gate CMOS, 2-layer metal wiring
2-input NAND/2-input NOR gates
Standard gate
tpd = 360 ps (2-input NAND, standard load, VDD = 5 V)
tpd = 520 ps (2-input NAND, standard load, VDD = 3.3 V)
Power gate
tdp = 300 ps (2-input NAND, standard load, VDD = 5 V)
tpd = 430 ps (2-input NAND, standard load, VDD = 3.3 V)
: IOL = 2 mA/4 mA/6 mA/12 mA mixable (3.3 V output buffer)
IOL = 3.2 mA/8 mA/12 mA/24 mA mixable (5.0 V output buffer)
: [Single power supply]
+5 V ± 5% (normal), +3.3 V ± 0.3 V (optional)
[Dual power supply]
Internal domain: +3.3 V ± 0.3 V, +5 V ± 5% (cannot be
Output driving capability
Supply voltage
mixed)
Semicustom
I/O: +3.3 V ± 0.3 V, +5 V ± 5% (mixable)
Interface can be provided between the two power supplies.
Can be configured for 3 V systems or 5 V systems (mixable)
Using 3.3 V internal supply voltage allows low-power consumption
Detailed RC delay calculation minimized timing trouble after trial manufacture.
On-chip input pull-up/pull-down resistor
Output buffer cells with noise reduction circuits, buffer cells for crystal oscillation circuits
Internal bus circuit configurable
Standard cell macros:
RAM, ROM, 1H delay line, FIFO memory
Using the clock skew reduction layout design method (CDDM) minimized the circuit modification after layout,
reducing the time to market
Support for ATG (Automatic Test Generation) based on scan design
Support for HISCAN (automatic scan generation)
(Note that mixture of dual power supply and HISCAN is not allowed)
Simplified interface: CAD-to-CAD interface uses special language for logic data(FLDL) and test data(FTDL).
Integrated development tools
Number of gates used in each package
The table below lists the available package types and athe reference number of gates used.
Number of gates used (BC)
Package and pin
count
SSOP
30
LQFP
48
64
80
100
120
144
176
208
0
10K
20K
30K
40K
50K
60K
70K
80K
90K
100K
5K
10K
42K
42K
71K
71K
71K
54K
54K
TQFP
64
100
5K
5K
QFP
44
64
80
100
120
144
160
176
208
240
256
71K
71K
71K
71K
89K
89K
89K
89K
89K
89K
89K
Note: This list contains packages under planning.
101
Sea-of-Gate Type CMOS Gate Arrays
■ CG61 Series (Analog PLL embedment is possible in some frames)
Features
High Integration
Technology
Basic circuit (basic cell)
Supply voltage
1,560,000 BCs
0. 35 µm Si-gate CMOS, 3-layer metal wiring
2-input NAND/2-input NOR gates
+3.3 V ± 0.3 V (normal) to +2.0 V ± 0.1 V
(5 V TTL interface is possible when 5 V tolerant I/Os are used.)
Gate delay time
: tpd = 85 ps (3.3 V, 2-input NAND, F/O = 2, standard load)
Gate power dissipation
: 0.24 µW/MHz (2.0 V, 2-input NAND, F/O = 2, standard load)
Junction temperature range : 0 to +100 ° C
High-load driving capability : IOL = 2 mA/4 mA/8 mA/12 mA/24 mA mixable
Output buffer cells with noise reduction circuits
On-chip input pull-up/pull-down resistors (Typ. 50 kΩ )
Buffer cells for crystal oscillation circuits
Configurable internal bus circuits
Compiled RAM can be embedded. Compilable bit/word configuration
An analog PLL can be embedded in CG61P only.
Clock skew reduction layout design technique (CDDM) employed to minimize circuit modification after layout, reducing TAT
Simulation (before layout) considering the input through rate and detailed RC delay calculation (after layout),
supporting development with minimized timing trouble after trial manufacture.
Supporting high speed interfaces (T-LVTTL, P-CML, LVDS, SDRAM I/F)
Supporting tests using DFF scan with MUX
Supporting the test for RAM BIST and RAM SCAN
102
:
:
:
:
Sea-of-Gate Type CMOS Gate Arrays
Number of gates used in each package
The table below lists the available package types and athe reference number of gates used.
LQFP
120
144
QFP
120
144
160
176
208
240
256
HQFP
BGA
0
100K
200K
300K
400K
500K
600K
700K
800K
900K
Material
P
P
222K
222K
395K
395K
P
P
P
P
P
P
P
580K
395K
580K
580K
580K
802K
208
240
256
304
802K
P
P
P
P
802K
P
P
P
580K
580K
395K
420
576
672
580K
P: plastic
Note: This list contains packages under planning.
CG 61P (The frame which can use Analog PLL) )
Package
and
pin count
48
64
80
100
LQFP
120
144
176
208
0
20K
40K
60K
80K
100K
120K
140K
160K
180K
200K
Material
188K
188K
188K
188K
188K
188K
P
P
P
P
P
P
P
P
240
256
188K
188K
P
P
TQFP 120
188K
P
QFP
BCC
48K
48
64
88K
88K
88K
P
P
P: plastic
Note: This list contains packages under planning.
103
Semicustom
Package and
pin count
Sea-of-Gate Type CMOS Gate Arrays
■ CG47 Series
Features
High integration
Technology
Gate delay time
Supply voltage
:
:
:
:
Maximum 55,000 BCs (on chip)
0.65 µm Si-gate CMOS, 2-layer metal wiring
300ps (power type 2-input NAND, standard load)
[Single power supply]
+5 V ± 5%(normal), +3.3 V ± 0.3 V (normal)
[Dual power supply]
Internal domain: +3.3 V ± 0.3 V, +5 V ± 5% (cannot be
mixed)
I/O: +3.3 V ± 0.3 V, +5 V ± 5% (can be mixed)
Interface enabled between dual power sources
Low power consumption enabled by operating internal supply voltage at 3.3V.
Delay time estimation by detailed time equations
Detailed time equations can be used for the estimation of delay time closer to that of actual devices.
Buffer cells for crystal oscillations circuits
Supports separate low frequency (32 kHz), and high frequency (1 to 40MHz) buffers, and oscillator stop function.
Supporting output open drain cell and input fail safe cells
Compiled cells include single port RAM, dual port RAM, and FIFO memory.
Note: The type of the RAM that can be used is specified depending on the internal power supply when the
RAM is a single-port RAM.
HISCAN (scan circuit automatic generation function)
HISCAN is supported with single power supply, but dual power supply specifications and HISCAN are mutually
exclusive.
Simple interface
CAD-to-CAD interface uses special language for logic data (FLDL) and test data (FTDL).
Integrated development tools
Number of gates used in each package
The table below lists the available package types and athe reference number of gates used.
Package and pin
count
SSOP
30
LQFP
48
64
80
100
120
144
176
208
QFP
64
80
100
120
240
TQFP
100
BCC
48
64
80
0
5K
10K
15K
25K
30K
35K
2K
11K
Note: This list contains packages under planning.
104
20K
21K
33K
33K
33K
33K
33K
33K
21K
21K
21K
21K
33K
33K
21K
31K
31K
40K
45K
50K
Sea-of-Gate Type CMOS Gate Arrays
■ CG46 Series
Features
:
:
:
:
:
Maximum 198,084 BCs (on chip)
0.65 µm Si-gate CMOS, 2-layer metal wiring
2-input NAND/2-input NOR gates
TTL/CMOS level mixable
+5 V ± 5% (normal)
+3.3 V ± 0.3 V (optional)
Gate delay time
: Standard gate
tpd = 360 ps (2-input NAND, standard load)
Power gate
tpd = 300 ps (2-input NAND, standard load)
Operating temperature
: 0 to +70° C
High-load driving capability : IOL = 3.2 mA/8 mA/12 mA/24 mA mixable
Output buffer cells with noise reduction circuits
On-chip input pull-up/pull-down resistors (Typ. 50 kΩ)
Buffer cells for crystal oscillations circuits
Configurable internal bus circuits
RAM and FIFO memory allowing arbitrary bit/word configuration
Clock skew reduction layout design technique (CDDM) employed to minimize circuit modification after layout, reducing the period of time for development
Delailed RC delay calculation minimized timing trouble after trial manufacture.
Support for ATG (Automatic Test Generation) based on scan design
Support for HISCAN (automatic scan generation)
Simplified interface: CAD-to-CAD interface uses special language for logic data (FLDL) and test data (FTDL) .
Integrated development tools
Number of gates used in each package
The table below lists the available package types and the reference number of gates used.
Number of gates used (BC)
Package and pin
count
SSOP
30
LQFP
48
64
80
100
120
144
176
208
0
10K
20K
30K
40K
50K
60K
70K
80K
90K
100K
5K
10K
42K
42K
65K
65K
65K
50K
50K
TQFP
64
100
5K
5K
QFP
44
64
80
100
120
144
160
176
208
240
256
65K
65K
65K
65K
89K
89K
89K
89K
89K
89K
89K
Note: This list contains packages under planning.
105
Semicustom
High integration
Technology
Basic circuit (basic cell)
Input level
Supply voltage
AccelArray ™
■ CA91 Series
Features
Optimum gate Count
Technology
: Maximum of 6,000,000 gates
: 0.11 µm Si-gate CMOS, 6- to 7-metal layers (Copper is used as wire material ),
Low-k inter-layer material (inter-layer material that has low permittivity) ,area bump.
Supply voltage
:1.2 V ± 0.1 V/2.5 V ± 0.2 V
(Dual power supply. Needs 1.5 V power supply during using HTSL. )
Junction temperature range : -40 to +125 ° C
Maximum operating frequency : 333 MHz (internal circuit)
High-speed, large scale ASIC produced in short development time :TAT = One third compared with Standard Cell
ASIC (target value) .
Higher precision of layaout/timing estimation achieved by introduction of physical synthesis tools (Amplify® AccelArray™).
Uses an architecture that simplifies physical design tasks.
Pre-designed common masters with IR-drop free.
Pre-designed test circuit insertion to reduce test synthesis tasks.
Uses a dedicated timing-driven layout tool to reduce development time.
Support for Signal Integrity (Verification is unnecessary for global clock trees.)
Internal cells support high-speed operation
High-speed interface/macro (200 Mbps/400 Mbps DDR interface, 2.5 Gbps PCI-Express, 3.125 Gbps XAUI, etc.)
Special interfaces
: P-CML, LVDS, PCI, HSTL, SSTL-2, etc.
IP macros
: PLL, SRAM (maximum of 4,550,000bits) , ARM9
8channel clock supply system incorporating a PLL.
Support for Memory-BIST/Bounday-SCAN
Package
: FC-BGA (729 pin to 1681 pin)
Note : Some items are in preparation
AccelArray is a trademark of Fujitsu Limited, Japan.
Amplify is a registered trademark of Synplicity, Inc.
106
IF PLL Frequency Synthesizer
■ MB15C100 Series
Features
n (constant) in the divide-by-n counter can be any integer by customizing mask in accordance with applications.
Fixed value of n allows the elimination of external setting of values.
Low supply current: 1.2 mA (Vcc = 3 V, 300 MHz in looking state)
Allows versatile selection of charge pumps to meet wide applications (high-speed sync charge pump, output current
± 6 mA, low sensitivity charge pump, output current ±1.5 mA)
Mountable on super-miniature package
Time-to-market 4 weeks (normal)
Product line-up
Part
number
MB15C100
Vcc
Icc
2.4 to 3.6 V 1.2 mA*1
Operating
Prescaler
Maximum
divide ratio
frequency
Comparison
main counter
divide ratio (N)
380MHz*2
(2.4 to 3.0V)
300MHz*2
(2.4 to 3.6V)
500MHz*3
(2.4 to 3.6V)
Any value between Any value between Any value between
divide-by-5 and
divide-by-0 and
divide-by-5 and
divide-by-4095
divide-by-31
divide-by-4095
8/9, 16/17 or
32/33
Swallow
counter divide
ratio (A)
Reference
counter divide
ratio (R)
Semicustom
*1: 300 MHz in looking state, Vcc = 3 V
*2: Input sensitivity: -10 to +2 dBm
*3: Input sensitivity: -5 to +2 dBm
Package
MB15C100 series: SSOP-8, BCC-16 (S-Type)
107
Package Line-up
■ Package Line-up
The packages are classified as follows, according to form, material, and the mounting methods for
which they are suited.
Packages
Lead inserted type
Matrix type
Standard
PGA
Surface mounted type
Flat type
Dual lead
SOP
TSOP I
TSOP II
LSSOP
TSSOP
Quad lead
QFP
LQFP
TQFP
UQFP
HQFP
Leadless chip carrier
Quad lead
Matrix type
QFN
BGA
FBGA
SPGA
Tape carrier
108
Dual lead
DTP
Quad lead
QTP
Package Line-up
Name of package
Description
Lead pitch (mm)
PGA
Pin Grid Array Package
SOP
Small Outline Package (straight lead)
Small Outline L-Leaded Package
1.27
SOL*2
Small Outline L-Leaded Package (JEDEC*1)
1.27
SSOP
Shrink Small Outline L-Leaded Package
0.65/0.80/1.00
TSOP (I)
Thin Small Outline L-Leaded Package (I)
0.50/0.55/0.60
TSOP (II)
Thin Small Outline L-Leaded Package (II)
0.50/0.80/1.00/1.27
SON
Small Outline Non-Leaded Package
QFP
Quad Flat Package (straight lead)
Quad Flat L-Leaded Package
LQFP*2
Low-Profile Quad Flat L-Leaded Package
TQFP
Thin Quad Flat L-Leaded Package
HQFP
QFP with Heat Sink
LCC*2
Leadless Chip Carrier
1.27/2.54
0.50/1.00
0.40/0.50/0.65/0.80/1.00
0.40/0.50/0.65/0.80
0.40/0.50
0.40/0.50/0.65
1.016/1.27
QFN
Quad Flat Non-Leaded Package
BGA
Ball Grid Array
FBGA
Fine pitch Ball Grid Array
1.27/1.0
0.8/0.75/0.65/0.5
DTP
Dual Tape Carrier Package
—
QTP
Quad Tape Carrier Package
—
*1: Joint Electron Device Engineering Council
*2: Package name used by Fujitsu
109