DS1647P-120+

19-5596; Rev 10/10 DS1647/DS1647P Nonvolatile Timekeeping RAM www.maxim-ic.com FEATURES        Integrates NV SRAM, Real-Time Clock, Crystal, Power-Fail Control Circuit, and Lithium Energy Source Clock Registers Are Accessed Identically to the Static RAM. These Registers are Resident in the Eight Top RAM Locations. Totally Nonvolatile with Over 10 Years of Operation in the Absence of Power BCD Coded Year, Month, Date, Day, Hours, Minutes, and Seconds with Leap Year Compensation Valid Through 2099 Power-Fail Write Protection Allows for ±10% VCC Power-Supply Tolerance DS1647 Only (DIP Module): Standard JEDEC Byte-Wide 128k x 8 RAM Pinout DS1647P Only (PowerCap Module Board): Surface Mountable Package for Direct Connection to PowerCap Containing Battery and Crystal Replaceable Battery (PowerCap) Power-Fail Output Pin-for-Pin Compatible with Other Densities of DS164XP Timekeeping RAM ORDERING INFORMATION PART DS1647-120+ DS1647P-120+ TEMP RANGE 0°C to +70°C 0°C to +70°C PINPACKAGE 32 EDIP (0.740a) 34 PowerCap* PIN CONFIGURATIONS TOP VIEW A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 1 2 3 DS1647 4 5 6 7 8 9 10 11 12 32 31 30 29 28 27 26 25 24 23 22 21 VCC A15 A17 WE A13 A8 A9 A11 OE A10 CE DQ0 13 20 DQ6 DQ1 DQ2 14 19 DQ5 15 18 DQ4 GND 16 17 DQ3 A0 DQ7 32-Pin Encapsulated DIP Package (32 Pin 740) N.C. A15 A16 PFO VCC WE OE CE DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 GND TOP MARK** 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 DS1647P X1 GND VBAT X2 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 A18 A17 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 34-Pin PowerCap Module Board (Uses DS9034PCX+ or DS9034I-PCX+ PowerCap) DS1647+120 DS1647P+120 +Denotes a lead(Pb)-free/RoHS-compliant package. *DS9034PCX+ or DS9034I-PCX+ required (must be ordered separately). **A “+” indicates lead(Pb)-free. The top mark includes a “+” symbol on lead(Pb)-free devices. 1 of 12 DS1647/DS1647P PIN DESCRIPTION PDIP 1 2 3 4 5 6 7 8 9 10 11 12 23 25 26 27 28 30 31 13 14 15 17 18 19 20 21 16 22 24 29 32 PIN PowerCap 34 3 32 30 25 24 23 22 21 20 19 18 28 29 27 26 31 33 2 16 15 14 13 12 11 10 9 17 8 7 6 5 NAME A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 A10 A11 A9 A8 A13 A17 A15 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 GND CE OE WE VCC — 4 PFO — 1 N.C. X1, X2, VBAT — FUNCTION Address Input Data Input/Output Data Input/Output Ground Active-Low Chip Enable Active-Low Output Enable Active-Low Write Enable Power-Supply Input Active-Low Power-Fail Output, Open Drain. This pin requires a pullup resistor for proper operation. No Connection Crystal Connections and Battery Connection 2 of 12 DS1647/DS1647P DESCRIPTION The DS1647 is a 512k x 8 nonvolatile static RAM with a full-function real-time clock, which are both accessible in a byte-wide format. The nonvolatile timekeeping RAM is functionally equivalent to any JEDEC standard 512k x 8 SRAM. The device can also be easily substituted for ROM, EPROM and EEPROM, providing read/write nonvolatility and the addition of the real-time clock function. The realtime clock information resides in the eight uppermost RAM locations. The RTC registers contain year, month, date, day, hours, minutes, and seconds data in 24-hour BCD format. Corrections for the day of the month and leap year are made automatically. The RTC clock registers are double-buffered to avoid access of incorrect data that can occur during clock update cycles. The double-buffered system also prevents time loss as the timekeeping countdown continues unabated by access to time register data. The DS1647 also contains its own power-fail circuitry, which deselects the device when the VCC supply is in an out-oftolerance condition. This feature prevents loss of data from unpredictable system operation brought on by low VCC as errant access and update cycles are avoided. PACKAGES The DS1647 is available in two packages: 32-pin DIP and 34-pin PowerCap module. The 32-pin DIP style module integrates the crystal, lithium energy source, and silicon all in one package. The 34-pin PowerCap Module Board is designed with contacts for connection to a separate PowerCap (DS9034PCX) that contains the crystal and battery. This design allows the PowerCap to be mounted on top of the DS1647P after the completion of the surface mount process. Mounting the PowerCap after the surface mount process prevents damage to the crystal and battery due to the high temperatures required for solder reflow. The PowerCap is keyed to prevent reverse insertion. The PowerCap Module Board and PowerCap are ordered separately and shipped in separate containers. The part number for the PowerCap is DS9034PCX. CLOCK OPERATIONS—READING THE CLOCK While the double-buffered register structure reduces the chance of reading incorrect data, internal updates to the DS1647 clock registers should be halted before clock data is read to prevent reading of data in transition. However, halting the internal clock register updating process does not affect clock accuracy. Updating is halted when a 1 is written into the read bit, the 7th most significant bit in the control register. As long as 1 remains in that position, updating is halted. After a halt is issued, the registers reflect the count, that is day, date, and time that was present at the moment the halt command was issued. However, the internal clock registers of the double-buffered system continue to update so that clock accuracy is not affected by the access of data. All of the DS1647 registers are updated simultaneously after the clock status is reset. Updating is within a second after the read bit is written to 0. The read bit must be a zero for a minimum of 500µs to ensure that the external registers are updated. 3 of 12 DS1647/DS1647P Figure 1. Block Diagram DS1647 Table 1. Truth Table VCC 5V ±10% VBAT 4.5V) the DS1647 can be accessed as described above with read or write cycles. However, when VCC is below the power-fail point VPF (point at which write protection occurs) the internal clock registers and RAM are blocked from all access. This is accomplished internally by inhibiting access via the CE signal. At this time the power-fail output signal (PFO) will be driven active low and will remain active until VCC returns to nominal levels. When VCC falls below the level of the internal battery supply, power input is switched from the VCC pin to the internal battery and clock activity, RAM, and clock data are maintained from the battery until VCC is returned to nominal level. BATTERY LONGEVITY The DS1647 has a lithium power source that is designed to provide energy for clock activity and clock and RAM data retention when the VCC supply is not present. The capability of this internal power supply is sufficient to power the DS1647 continuously for the life of the equipment in which it is installed. For specification purposes, the life expectancy is 10 years at +25°C with the internal clock oscillator running in the absence of VCC power. Each DS1647 is shipped from Dallas Semiconductor with its lithium energy source disconnected, guaranteeing full energy capacity. When VCC is first applied at a level greater than VPF, the lithium energy source is enabled for battery backup operation. Actual life expectancy of the DS1647 will be longer than 10 years since no lithium battery energy is consumed when VCC is present. 6 of 12 DS1647/DS1647P ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground…………………………….…………….…-0.3V to +6.0V Operating Temperature Range (Noncondensing)………………………………………….….0°C to +70°C Storage Temperature Range EDIP .......................…………………………….…………………………………..-40°C to +85°C PowerCap .............................................................................................................. -55°C to +125°C Lead Temperature (soldering, 10s) …..………………….…….........................................................+260°C Note: EDIP is wave or hand soldered only. Soldering Temperature (reflow, PowerCap) ......................................................................................+260°C This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect device reliability. RECOMMENDED DC OPERATING CONDITIONS (TA = 0°C to +70°C) PARAMETER Supply Voltage SYMBOL VCC MIN 4.5 Logic 1 Voltage, All Inputs VIH Logic 0 Voltage, All Inputs VIL TYP 5.0 MAX 5.5 UNITS V NOTES 1 2.2 VCC + 0.3 V -0.3 +0.8 V 3 MAX 85 6 UNITS mA mA NOTES 2, 3 2, 3 2 4.0 mA 2, 3 -1 +1 µA -1 +1 µA DC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ±10%, TA = 0°C to +70°C.) PARAMETER SYMBOL Average VCC Power Supply Current ICC1 TTL Standby Current (CE = VIH) ICC2 CMOS Standby Current ICC3 (CE = VCC - 0.2V) Input Leakage Current (Any Input) IIL Output Leakage Current IOL Output Logic 1 Voltage (IOUT = -1.0mA) (DQ0–DQ7) Output Logic 0 Voltage (IOUT = +2.1mA) (DQ0–DQ7, PFO) Write-Protection Voltage VOH MIN TYP 2.4 V VOL VPF 4.0 SYMBOL CI CDQ MIN 0.4 V 4.5 V MAX 7 10 UNITS pF pF CAPACITANCE (TA = +25°C) PARAMETER Capacitance on All Pins (Except DQ) Capacitance on DQ Pins 7 of 12 TYP NOTES DS1647/DS1647P AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ±10%, TA = 0°C to +70°C.) PARAMETER SYMBOL Read Cycle Time tRC Address Access Time tAA tCEA CE Access Time tCEZ CE Data Off Time tOEA OE Access Time tOEZ OE Data Off Time OE to DQ Low-Z tOEL tCEL CE to DQ Low-Z Output Hold from Address tOH Write Cycle Time tWC Address Setup Time tAS tCEW CE Pulse Width tAH1 Address Hold from End of Write tAH2 Write Pulse Width tWEW tWEZ WE Data Off Time tWR WE or CE Inactive Time Data Setup Time tDS tDH1 Data Hold Time High tDH2 MIN 120 TYP MAX 120 120 40 100 40 5 5 5 120 0 100 5 30 75 ns 40 10 85 0 25 8 of 12 UNITS ns ns ns ns ns ns ns ns ns ns ns ns NOTES 5 6 ns ns ns ns ns 5 6 DS1647/DS1647P READ CYCLE TIMING WRITE CYCLE TIMING 9 of 12 DS1647/DS1647P AC ELECTRICAL CHARACTERISTICS—POWER-UP/POWER-DOWN TIMING (VCC = 5.0V ±10%, TA = 0°C to +70°C.) PARAMETER SYMBOL tPD CE or WE at VIH before Power-Down VPF (MAX) to VPF (MIN) VCC Fall Time tF VPF (MIN) to VSO VCC Fall Time tFB VSO to VPF (MIN) VCC Rise Time tRB VPF (MIN) to VPF (MAX) VCC Rise Time tR Power-Up tREC Expected Data-Retention Time +25°C tDR (Oscillator On) POWER-DOWN/POWER-UP TIMING OUTPUT LOAD 10 of 12 MIN 0 300 10 1 0 15 10 TYP MAX 35 UNITS µs µs µs µs µs ms NOTES years 4 DS1647/DS1647P AC TEST CONDITIONS Output Load: 50pF + 1TTL Gate Input Levels: 0 to 3V Timing Measurement Reference Levels: Input: 1.5V Output: 1.5V Input Pulse Rise and Fall Times: 5ns NOTES: 1) All voltages are referenced to ground. 2) Typical values are at +25°C and nominal supplies. 3) Outputs are open. 4) Each DS1647 has a built-in switch that disconnects the lithium source until VCC is first applied by the user. The expected tDR is defined for DIP modules as a cumulative time in the absence of VCC starting from the time power is first applied by the user. 5) tAH1, tDH1 are measured from WE going high. 6) tAH2, tDH2 are measured from CE going high. 7) RTC Encapsulated DIP Modules (EDIP) can be successfully processed through conventional wavesoldering techniques as long as temperatures as long as temperature exposure to the lithium energy source contained within does not exceed +85°C. Post-solder cleaning with water washing techniques is acceptable, provided that ultrasonic vibration is not used. See the PowerCap package drawing for details regarding the PowerCap package. PACKAGE INFORMATION For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. LAND PACKAGE TYPE PACKAGE CODE OUTLINE NO. PATTERN NO. 32 EDIP MDT32+4 — 21-0245 34 PCAP 21-0246 PC2+1 11 of 12 — DS1647/DS1647P REVISION HISTORY REVISION DESCRIPTION DATE Updated the Ordering Information table; updated the storage, lead, 10/10 and soldering information in the Absolute Maximum Ratings section PAGES CHANGED 1, 7 12 of 12 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2010 Maxim Integrated Products Maxim and the Dallas logo are a registered trademark of Maxim Integrated Products, Inc.