ABRIDGED DATA SHEET
EVALUATION KIT AVAILABLE
DS28EL22
DeepCover Secure Authenticator with
1-Wire SHA-256 and 2Kb User EEPROM
General Description
DeepCover® embedded security solutions cloak sensitive
data under multiple layers of advanced physical security to provide the most secure key storage possible. The
DeepCover Secure Authenticator (DS28EL22) combines
crypto-strong, bidirectional, secure challenge-and-response
authentication functionality with an implementation based on
the FIPS 180-3-specified Secure Hash Algorithm (SHA-256).
A 2Kb user-programmable EEPROM array provides nonvolatile storage of application data and additional protected
memory holds a read-protected secret for SHA-256 operations and settings for user memory control. Each device has
its own guaranteed unique 64-bit ROM identification number
(ROM ID) that is factory programmed into the chip. This
unique ROM ID is used as a fundamental input parameter
for cryptographic operations and also serves as an electronic
serial number within the application. A bidirectional security
model enables two-way authentication between a host system and slave-embedded DS28EL22. Slave-to-host authentication is used by a host system to securely validate that an
attached or embedded DS28EL22 is authentic. Host-to-slave
authentication is used to protect DS28EL22 user memory
from being modified by a nonauthentic host. The SHA-256
message authentication code (MAC), which the DS28EL22
generates, is computed from data in the user memory, an
on-chip secret, a host random challenge, and the 64-bit ROM
ID. The DS28EL22 communicates over the single-contact
1-Wire® bus at overdrive speed. The communication follows
the 1-Wire protocol with the ROM ID acting as node address
in the case of a multiple-device 1-Wire network.
Applications
Authentication of Network-Attached Appliances
Features
♦ Symmetric Key-Based Bidirectional Secure
Authentication Model Based on SHA-256
♦ Dedicated Hardware-Accelerated SHA Engine for
Generating SHA-256 MACs
♦ Strong Authentication with a High Bit Count, UserProgrammable Secret, and Input Challenge
♦ 2048 Bits of User EEPROM Partitioned Into 8
Pages of 256 Bits
♦ User-Programmable and Irreversible EEPROM
Protection Modes Including Authentication, Write
and Read Protect, and OTP/EPROM Emulation
♦ Unique, Factory-Programmed 64-Bit Identification
Number
♦ Single-Contact 1-Wire Interface Communicates
with Host at Up to 76.9kbps
♦ Operating Range: 1.8V ±5%, -40°C to +85°C
♦ Low-Power 5µA (typ) Standby
♦ ±8kV Human Body Model ESD Protection (typ)
♦ 6-Pin TDFN Package
Typical Application Circuit
1.8V
RP
(I2C PORT)
SDA
SCL
DS24L65
µC
Printer Cartridge ID/Authentication
RP = 820Ω
MAXIMUM I2C BUS CAPACITANCE 400pF
VCC
SLPZ
IO
1-Wire LINE
Reference Design License Management
System Intellectual Property Protection
DS28EL22
Sensor/Accessory Authentication and Calibration
Secure Feature Setting for Configurable Systems
Key Generation and Exchange for Cryptographic
Systems
Ordering Information appears at end of data sheet.
DeepCover and 1-Wire are registered trademarks of Maxim Integrated Products, Inc.
For related parts and recommended products to use with this part, refer to: www.maximintegrated.com/DS28EL22.related
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
219-0023; Rev 2; 5/21
ABRIDGED DATA SHEET
DS28EL22
DeepCover Secure Authenticator with
1-Wire SHA-256 and 2Kb User EEPROM
ABSOLUTE MAXIMUM RATINGS
IO Voltage Range to GND.......................................-0.5V to 4.0V
IO Sink Current...................................................................20mA
Operating Temperature Range............................ -40°C to +85°C
Junction Temperature.......................................................+150°C
Storage Temperature Range............................. -55°C to +125°C
Lead Temperature (soldering, 10s).................................. +300°C
Soldering Temperature (reflow)........................................ +260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(TA = -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
IO PIN: GENERAL DATA
1-Wire Pullup Voltage
VPUP
(Note 2)
1.71
1.89
V
1-Wire Pullup Resistance
RPUP
VPUP = 1.8V ± 5% (Note 3)
300
750
Ω
Input Capacitance
Input Load Current
High-to-Low Switching Threshold
CIO
IL
(Notes 4, 5)
1500
IO pin at VPUP
5
pF
19.5
μA
VTL
(Notes 6, 7)
Input Low Voltage
VIL
(Notes 2, 8)
Low-to-High Switching Threshold
VTH
(Notes 6, 9)
0.75 x VPUP
V
Switching Hysteresis
VHY
(Notes 6, 10)
0.3
V
Output Low Voltage
VOL
IOL = 4mA (Note 11)
Recovery Time
tREC
RPUP = 750Ω (Notes 2, 12)
5
μs
Time-Slot Duration
tSLOT
(Notes 2, 13)
13
μs
0.65 x VPUP
V
0.3
0.4
V
V
IO PIN: 1-Wire RESET, PRESENCE-DETECT CYCLE
Reset Low Time
tRSTL
(Note 2)
48
Reset High Time
tRSTH
(Note 14)
48
80
μs
Presence-Detect Sample Time
tMSP
(Notes 2, 15)
8
10
μs
Write-Zero Low Time
tW0L
(Notes 2, 16)
8
16
μs
Write-One Low Time
tW1L
(Notes 2, 16)
0.25
2
μs
tRL
(Notes 2, 17)
0.25
2-d
μs
tMSR
(Notes 2, 17)
tRL + d
2
μs
1
mA
μs
IO PIN: 1-Wire WRITE
IO PIN: 1-Wire READ
Read Low Time
Read Sample Time
EEPROM
Programming Current
IPROG
VPUP = 1.89V (Notes 5, 18)
Programming Time for a 32-Bit
Segment or Page Protection
tPRD
Programming Time for the Secret
tPRS
Write/Erase Cycling Endurance
NCY
TA = +85°C (Notes 21, 22)
Data Retention
tDR
TA = +85°C (Notes 23, 24, 25)
Maxim Integrated
ms
Refer to the full data sheet.
ms
100k
—
10
Years
2
ABRIDGED DATA SHEET
DS28EL22
DeepCover Secure Authenticator with
1-Wire SHA-256 and 2Kb User EEPROM
ELECTRICAL CHARACTERISTICS (continued)
(TA = -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SHA-256 ENGINE
Computation Current
ICSHA
Computation Time
tCSHA
Refer to the full data sheet.
mA
ms
Note 1: Limits are 100% production tested at TA = +25°C and/or TA = +85°C. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. Typical values are not guaranteed.
Note 2: System requirement.
Note 3: Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery
times. The specified value here applies to systems with only one device and with the minimum 1-Wire recovery times.
Note 4: Typical value represents the internal parasite capacitance when VPUP is first applied. Once the parasite capacitance is
charged, it does not affect normal communication.
Note 5: Guaranteed by design and/or characterization only; not production tested.
Note 6: VTL, VTH, and VHY are a function of the internal supply voltage, which is a function of VPUP, RPUP, 1-Wire timing, and
capacitive loading on IO. Lower VPUP, higher RPUP, shorter tREC, and heavier capacitive loading all lead to lower values of
VTL, VTH, and VHY.
Note 7: Voltage below which, during a falling edge on IO, a logic-zero is detected.
Note 8: The voltage on IO must be less than or equal to VILMAX at all times when the master is driving IO to a logic-zero level.
Note 9: Voltage above which, during a rising edge on IO, a logic-one is detected.
Note 10: After VTH is crossed during a rising edge on IO, the voltage on IO must drop by at least VHY to be detected as logic-zero.
Note 11: The I-V characteristic is linear for voltages less than 1V.
Note 12: Applies to a single device attached to a 1-Wire line.
Note 13: Defines maximum possible bit rate. Equal to 1/(tW0LMIN + tRECMIN).
Note 14: An additional reset or communication sequence cannot begin until the reset high time has expired.
Note 15: Interval after tRSTL during which a bus master can read a logic 0 on IO if there is a DS28EL22 present. The power-up presence detect pulse could be outside this interval. See the Typical Operating Characteristics for details.
Note 16: ε in Figure 11 represents the time required for the pullup circuitry to pull the voltage on IO up from VIL to VTH. The actual
maximum duration for the master to pull the line low is tW1LMAX + tF - ε and tW0LMAX + tF - ε, respectively.
Note 17: δ in Figure 11 represents the time required for the pullup circuitry to pull the voltage on IO up from VIL to the input-high
threshold of the bus master. The actual maximum duration for the master to pull the line low is tRLMAX + tF.
Note 18: Current drawn from IO during the EEPROM programming interval or SHA-256 computation. The pullup circuit on IO during the programming and computation interval should be such that the voltage at IO is greater than or equal to VPUPMIN.
A low-impedence bypass of RPUP activated during programming and computation is the recommended way to meet this
requirement.
Note 19: Refer to the full data sheet.
Note 20: Refer to the full data sheet.
Note 21: Write-cycle endurance is tested in compliance with JESD47G.
Note 22: Not 100% production tested; guaranteed by reliability monitor sampling.
Note 23: Data retention is tested in compliance with JESD47G.
Note 24: Guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to the
data sheet limit at operating temperature range is established by reliability testing.
Note 25: EEPROM writes can become nonfunctional after the data retention time is exceeded. Long-term storage at elevated temperatures is not recommended.
Maxim Integrated
3
ABRIDGED DATA SHEET
DS28EL22
DeepCover Secure Authenticator with
1-Wire SHA-256 and 2Kb User EEPROM
ELECTRICAL CHARACTERISTICS (continued)
(TA = -40°C to +85°C, unless otherwise noted.) (Note 1)
Note 26: Refer to the full data sheet.
Typical Operating Characteristics
Pin Configuration
(VPUP = 1.71V, VIL = 0.3V, unless otherwise noted.)
TOP VIEW
POWER-UP TIME
DS28EL22
DS28EL22 toc01
180
160
140
TIME (ms)
100
80
1
IO
2
GND
3
60
28L22
ymrrF
120
N.C.
+
EP
6
N.C.
5
N.C.
4
N.C.
40
20
TDFN
(3mm × 3mm)
0
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
Pin Description
PIN
NAME
1, 4,
5, 6
N.C.
2
IO
3
GND
—
Maxim Integrated
EP
FUNCTION
Not Connected
1-Wire Bus Interface. Open-drain signal
that requires an external pullup resistor.
Ground Reference
Exposed Pad. Solder evenly to the
board’s ground plane for proper
operation. Refer to Application Note
3273: Exposed Pads: A Brief Introduction
for additional information.
4
ABRIDGED DATA SHEET
DS28EL22
DeepCover Secure Authenticator with
1-Wire SHA-256 and 2Kb User EEPROM
Note to readers: This document is an abridged version of the full data sheet. Additional device information is available
only in the full version of the data sheet. To request the full data sheet, go to www.maximintegrated.com/DS28EL22
and click on Request Full Data Sheet.
Ordering Information
PART
DS28EL22Q+T
TEMP RANGE
PIN-PACKAGE
-40°C to +85°C
6 TDFN-EP* (2.5k pcs)
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
*EP = Exposed pad.
Maxim Integrated
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
6 TDFN-EP
T633+2
21-0137
90-0058
43