19-4146; Rev 1; 9/08
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
Features
The MAX15018A/MAX15018B/MAX15019A/MAX15019B
high-frequency, 125V half-bridge, n-channel MOSFET
drivers drive high- and low-side MOSFETs in high-voltage applications. These drivers are independently controlled, and their 35ns (typ) propagation delay, from input
to output, are matched to within 2ns (typ). The high-voltage operation with very low and matched propagation
delay between drivers, and high source-/sink-current
capabilities in a thermally enhanced package make
these devices suitable for high-power, high-frequency
telecom power converters. The 125V maximum input
voltage provides plenty of margin over the 100V input
transient requirement of telecom standards. A reliable
on-chip bootstrap diode connected between VDD and
BST eliminates the need for an external discrete diode.
The MAX15018A/MAX15019A both offer noninverting drivers. The MAX15018B/MAX15019B offer a noninverting
high-side driver and an inverting low-side driver (see the
Selector Guide.) The MAX15018_ feature CMOS (VDD/2)
logic inputs. The MAX15019_ feature TTL-logic inputs.
The drivers are available in the industry-standard 8-pin
SO footprint and pin configuration with a thermally
enhanced 8-pin SO package. All devices operate over
the -40°C to +125°C automotive temperature range.
o HIP2100IB/HIP2101IB Pin Compatible
(MAX15018A/MAX15019A)
o Up to 125V VIN Operation
o 8V to 12.6V VDD Input Supply Range
o 3A Peak Source and Sink Current
o 35ns Propagation Delay
o Guaranteed 8ns or Less Propagation Delay
Matching Between High- and Low-Side Drivers
o Both Noninverting/Noninverting and
Noninverting/Inverting Logic-Input Versions
Available
o Up to 15V Logic Inputs, Independent of VDD
Supply Voltage
o Low 8pF Input Capacitance
o Available in CMOS (VDD/2) or TTL Logic-Level
Inputs with Hysteresis
o Available in a Space-Saving, Thermally Enhanced
8-Pin SO-EP Package
Ordering Information
PART
TEMP RANGE
MAX15018AASA+
-40°C to +125°C
8 SO-EP*
MAX15018BASA+
-40°C to +125°C
8 SO-EP*
Telecom Power Supplies
MAX15019AASA+
-40°C to +125°C
8 SO-EP*
Synchronous Buck DC-to-DC Converters
MAX15019BASA+
-40°C to +125°C
8 SO-EP*
Applications
Half-Bridge, Full-Bridge, and Two-Switch
Forward Converters
PIN-PACKAGE
+Denotes a lead-free/RoHS-compliant package.
*EP = Exposed pad. Internally connected to GND.
Typical Operating Circuit
Power-Supply Modules
Motor Control
VIN = 0 TO 125V
Pin Configuration
VDD = 8V TO
12.6V
MAX15018A
MAX15019A
TOP VIEW
BST
PWM1
IN_H
+
VDD 1
BST 2
DH 3
HS 4
8 DL
MAX15018A
MAX15018B
MAX15019A
MAX15019B
7 GND
6 IN_L
5 IN_H
CBST
DH
N
VOUT
HS
VDD
PWM2
IN_L
DL
CVDD
N
GND
SO-EP
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX15018/MAX15019
General Description
MAX15018/MAX15019
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
ABSOLUTE MAXIMUM RATINGS
VDD to GND ............................................................-0.3V to +15V
IN_H, IN_L to GND .................................................-0.3V to +15V
DL to GND ..................................................-0.3V to (VDD + 0.3V)
DH to HS.....................................................-0.3V to (VDD + 0.3V)
BST to HS ...............................................................-0.3V to +15V
HS to GND (repetitive transient)..............................-5V to +130V
HS dv/dt to GND................................................................50V/ns
Continuous Power Dissipation (TA = +70°C)
Single and Multilayer Board
8-Pin SO-EP (derate 23.8mW/°C above +70°C)*..........1.904W
θJC ...................................................................................6°C/W
Operating Temperature .....................................-40°C to +125°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
*As per JEDEC Standard 51 (Single-Layer Board).
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = VBST = 8V to 12.6V, VHS = VGND = 0V, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at VDD = VBST
= 12V and TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
12.6
V
POWER SUPPLY
Operating Supply Voltage
VDD Quiescent Supply Current
VVDD
IDDQ
8.0
IN_H and IN_L are
unconnected (no
switching)
MAX15018A/
MAX15018B
65
130
MAX15019A/
MAX15019B
95
190
2.75
3.75
mA
µA
VDD Operating Supply Current
IDDO
fSW = 500kHz, VDD = 12V,
no capacitive load
BST Quiescent Supply Current
IBSTQ
IN_H and IN_L are unconnected (no
switching)
95
190
µA
BST Operating Supply Current
IBSTO
fSW = 500kHz, VBST - VHS = 12V, no
capacitive load
2.75
3.75
mA
7.3
8
V
6.9
7.6
UVLO (VDD to GND)
VDD_UVLO
VDD rising
UVLO (BST to HS)
VBST_UVLO VBST rising
6.5
6.2
UVLO Hysteresis
0.5
V
V
LOGIC INPUT
Input-Logic High
VIH
MAX15018A/MAX15018B (CMOS)
MAX15019A/MAX15019B (TTL)
Input-Logic Low
VIL
0.67 x
VDD
V
2
0.33 x
VDD
MAX15018A/MAX15018B (CMOS)
MAX15019A/MAX15019B (TTL)
Logic-Input Hysteresis
2
VHYS
V
0.8
MAX15018A/MAX15018B (CMOS)
1.65
MAX15019A/MAX15019B (TTL)
0.4
_______________________________________________________________________________________
V
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
(VDD = VBST = 8V to 12.6V, VHS = VGND = 0V, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at VDD = VBST
= 12V and TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
+1
µA
IN_H = IN_L = GND
(MAX15018A/MAX15019A)
Logic-Input Current
IIN_
-1
IN_H = GND, IN_L = VDD
(MAX15018B/MAX15019B)
IN_L to GND (MAX15018A/MAX15019A)
Input Resistance
RIN_
IN_L to VDD (MAX15018B/MAX15019B)
5001
kΩ
8
pF
IN_H to GND
Input Capacitance
CIN_
HIGH-SIDE GATE DRIVER
HS Maximum Voltage
VHS_MAX
BST Maximum Voltage
VBST_MAX
V
140
V
RON_HP
(VBST - VHS) = 12V,
IDH = 100mA (sourcing)
TA = +25°C
1.75
2.4
TA = +125°C
2.3
3.0
RON_HN
(VBST - VHS) = 12V, IDH =
100mA (sinking)
TA = +25°C
1.1
1.75
TA = +125°C
1.6
2.25
0.88
1.2
Driver Output Resistance
Power-Off Pulldown Clamp
Voltage
Peak Output Current
125
VBST = 0V or unconnected, IDH = 1mA
(sinking)
IPK_HP
VDH = 0V
3
IPK_HN
VDH = 12V
3
RON_LP
VDD = 12V,
IDL = 100mA (sourcing)
RON_LN
VDD = 12V,
IDL = 100mA (sinking)
Ω
V
A
LOW-SIDE GATE DRIVER
Driver Output Resistance
Power-Off Pulldown Clamp
Voltage
Peak Output Current
TA = +25°C
1.75
2.4
TA = +125°C
2.3
3.0
TA = +25°C
1.1
1.75
TA = +125°C
1.6
2.25
0.88
1.2
VDD = 0V or unconnected, IDL = 1mA
(sinking)
IPK_LP
VDL = 0V
3
IPK_LN
VDL = 12V
3
Ω
V
A
INTERNAL BOOTSTRAP DIODE
Forward Voltage Drop
VF
IBST = 100mA
0.9
Turn-On and Turn-Off Time
tRR
IBST = 100mA
40
1.1
V
ns
_______________________________________________________________________________________
3
MAX15018/MAX15019
ELECTRICAL CHARACTERISTICS (continued)
MAX15018/MAX15019
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
ELECTRICAL CHARACTERISTICS (continued)
(VDD = VBST = 8V to 12.6V, VHS = VGND = 0V, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at VDD = VBST
= 12V and TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SWITCHING CHARACTERISTICS FOR HIGH- AND LOW-SIDE DRIVERS (VDD = VBST = +12V)
No CL
Rise Time
Fall Time
Turn-On Propagation Delay Time
Turn-Off Propagation Delay Time
Delay Matching Between High-Side
Turn-On to Low-Side Turn-On
Delay Matching Between High-Side
Turn-Off to Low-Side Turn-Off
Delay Matching Between High-Side
Turn-Off to Low-Side Turn-On
Delay Matching Between High-Side
Turn-On to Low-Side Turn-Off
Minimum Input Pulse Width for
Output Change
tR
tF
tD_ON
tD_OFF
tMATCH1
tMATCH2
tMATCH3
tMATCH4
tPW
1
CL = 1000pF
5
CL = 5000pF
25
CL = 10,000pF
50
No CL
1
CL = 1000pF
5
CL = 5000pF
20
CL = 10,000pF
40
Figure 1,
CL = 1000pF
(Note 2)
Figure 1,
CL = 1000pF
(Note 2)
CL = 1000pF
(Note 2)
CL = 1000pF
(Note 2)
CL = 1000pF
(Note 2)
CL = 1000pF
(Note 2)
MAX15018A/
MAX15018B (CMOS)
33
ns
ns
60
ns
MAX15019A/
MAX15019B (TTL)
36
66
MAX15018A/
MAX15018B (CMOS)
30
55
ns
MAX15019A/
MAX15019B (TTL)
36
66
MAX15018A/
MAX15018B (CMOS)
1
5
MAX15019A/
MAX15019B (TTL)
1
6
MAX15018A/
MAX15018B (CMOS)
1
5
ns
ns
MAX15019A/
MAX15019B (TTL)
1
6
MAX15018A/
MAX15018B (CMOS)
2
8
MAX15019A/
MAX15019B (TTL)
1
6
MAX15018A/
MAX15018B (CMOS)
2
8
MAX15019A/
MAX15019B (TTL)
1
6
ns
ns
20
ns
Note 1: All devices are 100% production tested at TA = TJ = +125°C. Limits over temperature are guaranteed by design and characterization.
Note 2: Guaranteed by design, not production tested.
4
_______________________________________________________________________________________
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
VDD AND BST UNDERVOLTAGE LOCKOUT
vs. TEMPERATURE
7.3
7.1
7.0
VBST - VHS RISING
6.9
0.58
0.56
HYSTERESIS (V)
7.3V
0.54
VDD
0.52
0.48
0.46
6.7
0.44
6.6
0.42
VDL
5V/div
VBST - VHS
0.40
-40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
UNDERVOLTAGE LOCKOUT RESPONSE
(VDD FALLING)
MAX15018A IDDO + IBSTO CURRENT
vs. VDD (250kHz SWITCHING)
4.5
VDD = VBST
4V
VDH
5V/div
3.5
IDD + IBST (mA)
6.8V
3.0
2.5
2.0
1.5
1.0
VDL
5V/div
200
DIODE CURRENT (mA)
4.0
VDD
2V/div
INTERNAL BOOTSTRAP
DIODE I-V CHARACTERISTICS
VDD FALLING
VDD RISING
TA = +25°C
120
80
0.5
0.6
0.7
0.9
0.8
MAX15018A IDD AND IBST
vs. SWITCHING FREQUENCY
6
MAX15018 toc08
VBST FALLING
TA = +125°C
100
80
TA = +25°C
60
TA = 0°C
20
0.4
MAX15018A BST QUIESCENT CURRENT
vs. VBST (NO SWITCHING)
40
20
0.3
VDD - VBST (V)
60
40
TA = +150°C
60
VDD (V)
TA = -40°C
1.0
VDD = VBST = 12V
NO LOAD
5
SUPPLY CURRENT (mA)
MAX15018 toc07
TA = +125°C
TA = +125°C
100
0
120
TA = +150°C
100
80
140
IBST (µA)
IDD (µA)
120
TA = 0°C
140
0 1 2 3 4 5 6 7 8 9 10 11 12 13
MAX15018A VDD QUIESCENT CURRENT
vs. VDD (NO SWITCHING)
140
TA = -40°C
160
20
0
VDD FALLING
180
40
0.5
40µs/div
MAX15018 toc06
5.0
12V
40µs/div
MAX15018 toc09
MAX15018 toc04
160
VDH
5V/div
4V
0.50
6.8
6.5
VDD
2V/div
12V
MAX15018 toc05
VUVLO (V)
7.2
MAX15018 toc02
VDD RISING
7.4
UNDERVOLTAGE LOCKOUT RESPONSE
(VDD RISING)
MAX15018 toc03
0.60
MAX15018 toc01
7.5
VDD AND BST UNDERVOLTAGE LOCKOUT
HYSTERESIS vs. TEMPERATURE
IDD
4
3
2
IBST
1
TA = -40°C, 0°C, +25°C
0
0
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
VDD (V)
VBST (V)
0
200
400
600
800
1000
SWITCHING FREQUENCY (kHz)
_______________________________________________________________________________________
5
MAX15018/MAX15019
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
DH AND DL OUTPUT HIGH VOLTAGE
vs. TEMPERATURE
260
OUTPUT VOLTAGE (mV)
160
140
120
100
SOURCING 100mA
4.0
3.5
3.0
240
VDD - VDL
220
2.5
200
180
VBST - VDH
0.5
100
0
-40 -25 -10 5 20 35 50 65 80 95 110 125
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
VDH OR VDH (V)
DH OR DL OUTPUT RISE TIME
vs. TEMPERATURE
DH OR DL OUTPUT FALL TIME
vs. TEMPERATURE
DH OR DL RISING PROPAGATION DELAY
vs. TEMPERATURE
80
90
10,000pF LOAD
80
70
FALL TIME (ns)
70
60
50
40
60
50
40
30
30
20
20
10
10
3 4
5
7
8
9 10 11 12
60
50
MAX15019
40
30
MAX15018
20
0
-40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
DH OR DL FALLING PROPAGATION DELAY
vs. TEMPERATURE
MAX15019
MAX15018 toc16
PROPAGATION DELAY (ns)
50
DELAY MATCHING (DH AND DL RISING)
MAX15018 toc17
60
VIN_
10V/div
40
30
20
MAX15018
VDH AND VDL
10V/div
10
CL = 0pF
0
-40 -25 -10 5 20 35 50 65 80 95 110 125
10ns/div
AMBIENT TEMPERATURE (°C)
6
6
10
0
0
2
MAX15018 toc15
100
0 1
PROPAGATION DELAY (ns)
10,000pF LOAD
MAX15018 toc14
90
SINK (NMOS)
-40 -25 -10 5 20 35 50 65 80 95 110 125
MAX15018 toc13
100
SOURCE (PMOS)
1.0
120
60
2.0
1.5
160
140
80
MAX15018 toc12
280
IOUT (A)
SINKING 100mA
180
OUTPUT VOLTAGE (mV)
300
MAX15018 toc10
200
PEAK OUTPUT CURRENT
vs. OUTPUT VOLTAGE
MAX15018 toc11
DH OR DL OUTPUT LOW VOLTAGE
vs. TEMPERATURE
RISE TIME (ns)
MAX15018/MAX15019
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
_______________________________________________________________________________________
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
RESPONSE TO VDD GLITCH
DELAY MATCHING (DH AND DL RISING)
MAX15018 toc19
MAX15018 toc18
VIN_
10V/div
10V/div
VDH_
10V/div
VDL
VDH AND VDL
10V/div
CL = 0pF
10V/div
VDD
10V/div
VIN_
40µs/div
10ns/div
Pin Description
PIN
NAME
FUNCTION
1
VDD
Input Supply Voltage. Valid supply voltage ranges from 8V to 12.6V. Bypass VDD to GND with a parallel
combination of 0.1µF and 1µF ceramic capacitors as close to the IC as possible.
2
BST
Boost Flying Capacitor Connection. Connect a 0.22µF ceramic capacitor from BST to HS as close to the IC
as possible for the high-side MOSFET driver supply.
3
DH
High-Side Gate Driver Output. Driver output for the high-side MOSFET gate.
4
HS
Source Connection for High-Side MOSFET. Also serves as the return for the high-side driver.
5
IN_H
High-Side Noninverting Logic Input
6
IN_L
Low-Side Noninverting (MAX15018A/MAX15019A) or Low-Side Inverting (MAX15018B/MAX15019B) Input
7
GND
Ground. Use GND as a return path to the DL driver output and the IN_H, IN_L inputs. Must be connected to
ground.
8
DL
Low-Side Gate Driver Output. Driver output for the low-side MOSFET gate.
—
EP
Exposed Pad. Internally connected to GND. Externally connect the exposed pad to a large ground plane to
aid in heat dissipation. Grounding EP does not substitute the requirement to connect GND to ground.
_______________________________________________________________________________________
7
MAX15018/MAX15019
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MAX15018/MAX15019
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
Detailed Description
The MAX15018A/MAX15018B/MAX15019A/MAX15019B
half-bridge, n-channel MOSFET drivers control highand low-side MOSFETs in high-voltage, high peak-current applications and offer a high 125V voltage range
that allows ample margin above the 100V transient
specification of telecom standards. These drivers operate with an IC supply voltage of 8V to 12.6V, and consume only 2.75mA of supply current during typical
switching operations. The MAX15018_/MAX15019_ provide 3A (typ) sink/source peak current per output and
are capable of operating with large capacitive loads
and with switching frequencies near 1MHz.
These drivers are intended to be used to drive the
high-side MOSFET without requiring an isolation device
such as an optocoupler or a drive transformer. The
high-side driver is controlled by a TTL/CMOS logic signal referenced to ground and is powered by a bootstrap circuit formed by an integrated diode and an
external capacitor. Undervoltage lockout (UVLO) protection is provided for both the high- and low-side driver supplies (BST and V DD ) and includes a UVLO
hysteresis of 0.5V (typ).
The drivers are independently controlled and feature
exceptionally fast switching times, very short propagation delays (35ns typ), and matched propagation delaytimes (2ns typ) between drivers, making them ideally
suited for high-frequency applications. Internal logic circuitry prevents shoot-through during output state
changes and minimizes package power dissipation.
These devices are available with CMOS (VDD/2) or TTL
logic-level inputs. The MAX15018A/MAX15018B accept
CMOS input logic levels, while the MAX15019A/
MAX15019B accept TTL input logic levels. For both versions, the logic inputs are protected against voltage
spikes up to +15V, regardless of VDD. See the Driver
Logic Inputs (IN_H, IN_L) section.
The MAX15018_/MAX15019_ are available with both
high-side and low-side noninverting logic inputs or with
noninverting high-side and inverting low-side logic inputs.
See the Functional Diagrams and Selector Guide. The
MAX15018A and MAX15019A are pin-for-pin replacements for the HIP2100IB and HIP2101IB, respectively.
8
The MAX15018_/MAX15019_ are available in a spacesaving, high-power, 8-pin SO-EP package that can dissipate up to 1.95W at +70°C. All devices operate over the
-40°C to +125°C automotive temperature range.
Undervoltage Lockout
Both the high- and low-side drivers feature separate
UVLO protection that monitors each driver’s input supply voltage (BST and VDD). The low-side driver UVLO
threshold (VDD_UVLO) is referenced to GND and pulls
both driver outputs low when VDD falls below 7.3V (typ).
The high-side driver UVLO threshold (VBST_UVLO) is referenced to HS, and only pulls DH low when VBST falls
below 6.9V (typ) with respect to HS. After the IC is first
energized, and once VDD rises above its UVLO threshold, DL starts switching and either follows the IN_L logic
input (MAX15018A/MAX15019A) or is inverted with reference to the IN_L logic input (MAX15018B/
MAX15019B). At this time, the bootstrap capacitor is not
charged, and DH does not switch since the BST-to-HS
voltage is below VBST_UVLO. Within a short time following engagement of low-side switching, CBST charges
through VDD and causes VBST to exceed VBST_UVLO.
DH then starts switching and follows IN_H. For synchronous buck and half-bridge converter topologies, the
bootstrap capacitor can charge up in one cycle. Normal
operation then begins in a few microseconds after the
BST-to-HS voltage exceeds V BST_UVLO. In the twoswitch forward topology, CBST takes more time (a few
hundred microseconds) to charge and increase its voltage above VBST_UVLO. The typical hysteresis for both
UVLO thresholds is 0.5V. The bootstrap capacitor value
should be selected carefully to avoid oscillations during
turn-on and turn-off at the DH output. Choose a capacitor value 20 times greater than the total gate capacitance of the MOSFET. Use a low ESR-type X7R
dielectric ceramic capacitor at BST (typically a 0.1µF
ceramic is adequate) and a parallel combination of 1µF
and 0.1µF ceramic capacitors from VDD to GND. The
high-side MOSFET’s continuous on-time is limited due
to the charge loss from the high-side driver’s quiescent
current. The maximum on-time is dependent on the size
of CBST, IBST (190µA, max), and VBST_UVLO.
_______________________________________________________________________________________
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
Propagation delay from the logic inputs to the driver
outputs is matched to within 8ns (max) between the
low-side and high-side drivers. Turn-on and turn-off
propagation delays are typically 35ns and 36ns. See
Figure 1. The internal drivers also contain break-beforemake logic to eliminate shoot-through conditions that
would cause unnecessarily high operating supply currents, efficiency reduction, and voltage spikes at VDD.
Voltage at DL is approximately equal to VDD when in a
high state, and zero when in a low state. Voltage from
DH to HS is approximately equal to V DD minus the
diode drop of the integrated bootstrap diode when in a
high state, and zero when in a low state. The high-side
MOSFET’s continuous on-time is limited due to the
charge loss from the high-side driver’s quiescent current. The maximum on-time is dependent on the size of
the bootstrap capacitor (CBST), IBST (190µA max), and
VBST_UVLO.
Integrated Bootstrap Diode
An integrated diode between VDD and BST is used in
conjunction with an external bootstrap capacitor (CBST)
to provide the voltage required to turn on the high-side
MOSFET (see the Typical Operating Circuit). The internal diode charges the bootstrap capacitor from VDD
when the low-side switch is on, and isolates VDD when
HS is pulled high when the high-side driver turns on.
The internal bootstrap diode has a typical forward voltage drop of 0.9V and has a 40ns (typ) turn-off/-on time.
The turn-off time (reverse recovery time) depends on
the reverse-recovery current and can be as low as
10ns. If a lower diode voltage-drop between VDD and
BST is needed, connect an external Schottky diode
between VDD and BST.
VIH
IN_L
VIL
90%
DL
10%
tD_OFF1
tD_ON1
tR
tF
VIH
IN_H
VIL
90%
DH
tD_OFF1
10%
tF
tD_ON2
tR
tMATCH = (tD_ON2 - tD_ON1) OR (tD_OFF2 - tD_OFF1)
Figure 1. Timing Characteristics of Logic Inputs (MAX15018A/MAX15019A)
_______________________________________________________________________________________
9
MAX15018/MAX15019
Output Driver
The MAX15018_/MAX15019_ drivers contain low onresistance p-channel and n-channel devices in a totem
pole configuration for the driver output stage. This
allows for rapid turn-on and turn-off of high gate-charge
(Qg) external switching MOSFETs.
The drivers exhibit low drain-to-source resistance
(RDS_ON), which decreases for higher values of VDD
and for lower operating temperatures. Lower RDS_ON
means higher source and sink currents from the IC,
and results in faster switching speeds, since the external MOSFET gate capacitance will charge and discharge at a quicker rate. The peak source and sink
current provided by the drivers is typically 3A.
MAX15018/MAX15019
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
Bootstrap Capacitor
The bootstrap capacitor is used to ensure adequate
charge is available to switch the high-side MOSFET.
This capacitor is charged from VDD through the internal
bootstrap diode when the low-side MOSFET is on. The
bootstrap capacitor value should be selected carefully
to avoid oscillations during turn-on and turn-off at the
DH output. Choose a capacitor value approximately 20
times greater than the total gate capacitance of the
MOSFET being switched. Use a low-ESR, X7R-type
dielectric ceramic capacitor (typically a 0.1µF ceramic
is adequate). The high-side MOSFET’s continuous ontime is limited due to the charge loss from the high-side
driver’s quiescent current. The maximum on-time is
dependent on the size of CBST, IBST (190µA max), and
VBST_UVLO. Note that the bootstrap capacitor requires
time to charge up to VDD, according to the time constant of the charging loop through the lower MOSFET
(see the Typical Operating Circuit ). Ensure that the
lower MOSFET is on for at least the minimum time
required to charge CBST.
Driver Logic Inputs (IN_H, IN_L)
The MAX15018_ are CMOS (VDD/2) logic-input drivers,
and the MAX15019_ are TTL-compatible logic-input drivers. The required logic-input levels are independent of
VDD. For example, the IC can be powered by a 10V supply while the logic inputs are provided from 12V CMOS
logic. Additionally, the logic inputs are protected against
voltage spikes up to 15V, regardless of VDD voltage. The
TTL and CMOS logic inputs have 400mV and 1.6V hysteresis, respectively, to avoid double pulsing during signal transition. The logic inputs are high-impedance pins
(500kΩ typ) and should not be left unconnected to
ensure the input logic state is at a known level. With the
logic inputs unconnected, the DH and DL outputs pull
low as VDD rises up above the UVLO threshold. The
PWM output from the controller must assume a proper
state while powering up the device.
Applications Information
Supply Bypassing and Grounding
Careful attention is required when choosing the bypassing and grounding scheme of the MAX15018_/
MAX15019_. Peak supply and output currents may
10
exceed 6A when both drivers are simultaneously driving
large external capacitive loads in phase. Supply drops
and ground shifts create forms of negative feedback for
inverterting topologies and may degrade the delay and
transition times. Ground shifts due to insufficient device
grounding may also disturb other circuits sharing the
same AC ground return path. Any series inductance in
the VDD, DH, DL, and/or GND paths can cause oscillations due to the very high di/dt when switching the
MAX15018_/MAX15019_ with any capacitive load. Place
one or more 0.1µF ceramic capacitors in parallel from
V DD to GND as close as possible to the device to
bypass the input supply. Use a ground plane to minimize
ground return resistance and series inductance. Place
the external MOSFETs as close as possible to the
MAX15018_/MAX15019_ to reduce trace length and further minimize board inductance and AC path resistance.
Power Dissipation
Power dissipation in the MAX15018_/MAX15019_ is primarily due to power loss in the internal boost diode and
the internal nMOS and pMOS FETS. For capacitive
loads, the total power dissipation for the device is:
PD = (CL x VDD2 x fSW) + (IVDDO + IBSTO) x VDD
where CL is the combined capacitive load at DH and
DL, VDD is the supply voltage, and fSW is the switching
frequency of the IC. PD includes the power dissipated in
the internal bootstrap diode (P DIODE ). The internal
power dissipation reduces by PDIODE, if an external
bootstrap Schottky diode is used. The power dissipation
in the internal boost diode (when driving a capacitive
load) will be the charge through the diode per switching
period multiplied by the maximum diode forward voltage
drop (VF = 1V) as given in the following equation.
PDIODE = CDH x (VDD - 1) x fSW x VF
where CDH is the capacitive load at DH, VDD is the supply voltage, fSW is the switching frequency of the converter, VF is the maximum diode forward voltage drop.
The total power dissipation when using the internal
boost diode will be PD and, when using an external
Schottky diode, will be PD - PDIODE. The total power
dissipated in the device must be kept below the maximum of 1.95W for the 8-pin SO with exposed pad at TA
= +70°C ambient.
______________________________________________________________________________________
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
• There are two AC current loops formed between the
IC and the gate of the MOSFET being driven. The
MOSFET looks like a large capacitance from gate to
source when the gate is being pulled low. The active
current loop is from the MOSFET driver output (DL or
DH) to the MOSFET gate, to the MOSFET source, and
to the return terminal of the MOSFET driver (either
GND or HS). When the gate of the MOSFET is being
pulled high, the active current loop is from the MOSFET driver output, (DL or DH), to the MOSFET gate, to
the MOSFET source, to the return terminal of the drivers decoupling capacitor, to the positive terminal of
the decoupling capacitor, and to the supply connection of the MOSFET driver. The decoupling capacitor
will be either CBST for the high-side MOSFET or the
VDD decoupling capacitor for the low-side MOSFET.
Care must be taken to minimize the physical distance
and the impedance of these AC current paths.
• Solder the exposed pad of the 8-pin SO-EP package
to a large copper plane to achieve the rated power
dissipation.
Typical Application Circuits
VDD = 8V TO 12.6V
VIN = 0 TO 125V
BST
VDD
DH
PWM1
N
MAX15018A
IN_H
HS
VOUT
N
PWM2
IN_L
DL
N
N
GND
Figure 2. Half-Bridge Converter Application with Secondary-Side Synchronous Rectification
______________________________________________________________________________________
11
MAX15018/MAX15019
Layout Information
The MAX15018_/MAX15019_ drivers source and sink
large currents to create very fast rise and fall edges at
the gates of the switching MOSFETs. The high di/dt can
cause unacceptable ringing if the trace lengths and
impedances are not well controlled. Use the following
PCB layout guidelines when designing with the
MAX15018_/MAX15019_:
• It is important that the VDD voltage (with respect to
ground) or BST voltage (with respect to HS) does not
exceed 15V. Voltage spikes higher than 15V from
V DD to GND or from BST to HS can damage the
device. Place one or more low-ESL 0.1µF decoupling
ceramic capacitors from VDD to GND and from BST
to HS as close as possible to the part. The ceramic
decoupling capacitors should be at least 20 times
the gate capacitance being driven.
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
MAX15018/MAX15019
Typical Application Circuits (continued)
VDD = 8V TO 12.6V
VIN = 0 TO 125V
BST
VDD
DH
N
HS
IN_H
VOUT
MAX15018A
MAX15019A
PWM
IN_L
DL
N
GND
Figure 3. Two-Switch Forward Application
12
______________________________________________________________________________________
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
MAX15018A
MAX15018B
MAX15019A
VDD/2 CMOS
VDD/2 CMOS
TTL
DH
IN_H
IN_L
BST
DH
IN_H
DH
IN_H
DH
IN_H
TTL
BST
BST
BST
MAX15019B
HS
HS
HS
HS
VDD
VDD
VDD
VDD
DL
IN_L
IN_L
DL
SO-EP
DL
GND
GND
GND
GND
IN_L
DL
SO-EP
SO-EP
SO-EP
Selector Guide
HIGH-SIDE DRIVER
LOW-SIDE DRIVER
LOGIC LEVEL
PIN COMPATIBLE
MAX15018AASA+
PART
Noninverting
Noninverting
CMOS (VDD/2)
HIP 2100IB
MAX15018BASA+
Noninverting
Inverting
CMOS (VDD/2)
—
MAX15019AASA+
Noninverting
Noninverting
TTL
HIP 2101IB
MAX15019BASA+
Noninverting
Inverting
TTL
—
Package Information
Chip Information
PROCESS: BiCMOS
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
8 SO
S8E-14
21-0111
______________________________________________________________________________________
13
MAX15018/MAX15019
Functional Diagrams
MAX15018/MAX15019
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
0
5/08
Initial release
—
1
9/08
Removed future product asterisk for the MAX15018B.
1
DESCRIPTION
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
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is a registered trademark of Maxim Integrated Products, Inc.
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