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MAX25615
General Description
The MAX25615 is a high-speed MOSFET driver IC for
automotive applications. The driver is capable of sinking
7A and sourcing 3A peak currents. The IC, which is an
enhancement over MAX5048 devices, has inverting and
noninverting inputs that provide greater flexibility in controlling the MOSFET. It also features two separate outputs
working in complementary mode, offering flexibility in controlling both turn-on and turn-off switching speeds.
The IC has internal logic circuitry that prevents shootthrough during output-state changes. The logic inputs are
protected against voltage spikes up to +16V, regardless
of V+ voltage. Propagation delay time is minimized and
matched between the inverting and noninverting inputs.
The IC has a very fast switching time, combined with short
propagation delays (12ns typ), making it ideal for highfrequency circuits. The IC operates from a +4V to +15.5V
single power supply and typically consumes 0.5mA of
supply current. The MAX25615 has standard TTL input
logic levels.
7A Sink, 3A Source,
12ns, SOT23 MOSFET Driver
Features
●● Automotive Ready: AEC-Q100 Qualified
●● Independent Source and Sink Outputs
●● +4V to +15.5V Single Power-Supply Range
●● 7A Peak Sink Current
●● 3A Peak Source Current
●● Inputs Rated to +15.5V, Regardless of V+ Voltage
●● 12ns Propagation Delay
●● Matched Delays Between Inverting and
Noninverting Inputs Within 500ps
●● TTL Logic-Level Inputs
●● Low-Input Capacitance: 10pF (typ)
●● Thermal-Shutdown Protection
●● Small SOT23 Package Allows Routing PCB Traces
Underneath
●● -40°C to +125°C Operating Temperature Range
The MAX25615 is available in a 6-pin SOT23 package and
operates over the -40°C to +125°C temperature range.
Ordering Information appears at end of data sheet.
Applications
Typical Operating Circuit
●●
●●
●●
●●
●●
Power MOSFET Switching
Switch-Mode Power Supplies
DC-DC Converters
Motor Control
Time-of-Flight Cameras
V+
V+
P_OUT
MAX25615
IN+
IN-
19-100387; Rev 2; 11/18
N_OUT
GND
N
MAX25615
7A Sink, 3A Source,
12ns, SOT23 MOSFET Driver
Absolute Maximum Ratings
(Voltages referenced to GND.)
V+.......................................................................... -0.3V to +18V
IN+, IN-....................................................................-0.3V to +16V
N_OUT, P_OUT............................................-0.3V to (V+ + 0.3V)
N_OUT Continuous Output Current (Note 1).................. -200mA
P_OUT Continuous Output Current (Note 1)................. +125mA
Continuous Power Dissipation (TA = +70°C)
SOT23 (derate 8.7mW/°C above +70°C)................... 696mW*
Operating Temperature Range.......................... -40°C to +125°C
Junction Temperature.......................................................+150°C
Storage Temperature Range............................. -65°C to +150°C
Lead Temperature (soldering, 10s).................................. +300°C
Soldering Temperature (reflow)........................................+260°C
*As per JEDEC 51 standard.
Note 1: Continuous output current is limited by the power dissipation of the package.
Package Thermal Characteristics (Note 2)
SOT23
Junction-to-Ambient Thermal Resistance (θJA).........115°C/W
Junction-to-Case Thermal Resistance (θJC)................80°C/W
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to http://www.maximintegrated.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(V+ = +12V, CL = 0F, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. see Figure 1.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
15.5
V
3.6
V
POWER SUPPLY (V+)
Input Voltage Range
Undervoltage Lockout
4
VUVLO
V+ rising
3.3
Undervoltage-Lockout
Hysteresis
3.45
200
mV
Undervoltage Lockout to Output
Rising Delay
V+ rising
100
µs
Undervoltage Lockout to Output
Falling Delay
V+ falling
2
µs
Supply Current
IV+
V+ = +15.5V, no switching
0.5
V+ = +15.5V, switching at 1MHz
2.3
1.1
mA
n-CHANNEL OUTPUT (N_OUT)
N_OUT Resistance
RN_OUT
Power-Off Pulldown Resistance
V+ = +12V,
IN_OUT = -100mA
V+ = +4.5V,
IN_OUT = -100mA
0.256
TA = +25°C
0.268
IBIASN
VN_OUT = V+
Peak Output Current
IPEAKN
CL = 22nF
0.32
0.45
TA = +125°C
V+ = unconnected, IN_OUT = -1mA, TA = +25°C
Output Bias Current
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TA = +25°C
TA = +125°C
0.34
Ω
0.465
1.3
1.9
kΩ
6
11
µA
7.0
A
Maxim Integrated │ 2
MAX25615
7A Sink, 3A Source,
12ns, SOT23 MOSFET Driver
Electrical Characteristics (continued)
(V+ = +12V, CL = 0F, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. see Figure 1.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
TA = +25°C
0.88
1.40
TA = +25°C
0.91
UNITS
p-CHANNEL OUTPUT (P_OUT)
P_OUT Resistance
RP_OUT
V+ = +12V,
IP_OUT = 100mA
V+ = +4.5V,
IP_OUT = 100mA
TA = +125°C
1.80
TA = +125°C
ILEAKP
VP_OUT = 0V
0.01
Peak Output Current
IPEAKN
CL = 22nF
3.0
Logic-High Input Voltage
VIH
Logic-Low Input Voltage
VIL
Logic-Input Hysteresis
1
V
0.8
VIN+ = VIN- = 0V or V+
Input Capacitance
µA
A
2.0
VHYS
Logic-Input Leakage Current
Ω
1.85
Output Leakage Current
LOGIC INPUTS (IN+, IN-)
1.45
V
0.2
V
0.02
µA
10
pF
SWITCHING CHARACTERISTICS FOR V+ = +12V (Figure 1)
Rise Time
Fall Time
tR
tF
CL = 1nF
6
CL = 5nF
22
CL = 10nF
36
CL = 1nF
4
CL = 5nF
11
CL = 10nF
17
ns
ns
Turn-On Delay Time
tD-ON
CL = 1nF (Note 4)
7
12
18
ns
Turn-Off Delay Time
tD-OFF
CL = 1nF (Note 4)
7
12
18
ns
Break-Before-Make Time
tBBM
2
ns
SWITCHING CHARACTERISTICS FOR V+ = +4.5V (Figure 1)
Rise Time
Fall Time
tR
tF
CL = 1nF
5
CL = 5nF
16
CL = 10nF
25
CL = 1nF
4
CL = 5nF
10
CL = 10nF
14
ns
ns
Turn-On Delay Time
tD-ON
CL = 1nF (Note 4)
7
13
21
ns
Turn-Off Delay Time
tD-OFF
CL = 1nF (Note 4)
7
14
22
ns
Break-Before-Make Time
THERMAL CHARACTERISTICS
tBBM
2
ns
Thermal Shutdown
Temperature rising (Note 4)
166
°C
Thermal-Shutdown Hysteresis
(Note 4)
13
°C
Note 3: Limits are 100% tested at TA = +25°C. Limits over operating temperature range are guaranteed through correlation using the
statistical quality control (SQC) method.
Note 4: Design guaranteed by bench characterization. Limits are not production tested.
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Maxim Integrated │ 3
MAX25615
7A Sink, 3A Source,
12ns, SOT23 MOSFET Driver
Typical Operating Characteristics
(CL = 1000pF, TA = +25°C, unless otherwise noted. See Figure 1.)
TA = +25ºC
6.5
6
5.5
4.5
TA = +25ºC
4.5
4
TA = -40ºC
3.5
TA = 0ºC
4
6
8
10
12
14
3
16
TA = 0ºC
4
6
SUPPLY VOLTAGE (V)
14
12
8
10
12
14
16
1.50
100kHz
40kHz
4
6
8
10
12
0.8
0.6
14
6
8
10
12
14
V+ = 12V
f = 100kHz
DUTY CYCLE = 50%
3.0
16
2.5
2.0
1.5
1.0
0
16
400
0
800
1200
1600
2000
LOAD CAPACITANCE (pF)
toc08
SUPPLY CURRENT
vs. INPUT VOLTAGE
1.00
toc09
V+ = 12V
3.50
0.90
3.00
2.50
RISING
2.00
1.50
1.00
0.50
0.00
-40 -25 -10 5 20 35 50 65 80 95 110 125
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4
0.5
INPUT THRESHOLD
VOLTAGE vs. SUPPLY VOLTAGE
4.00
TA = -40ºC
TA = 0ºC
4.0
75kHz
SUPPLY CURRENT vs. TEMPERATURE
TEMPERATURE (°C)
10
3.5
SUPPLY VOLTAGE (V)
1.0
0.4
12
SUPPLY CURRENT vs. LOAD CAPACITANCE
toc05
SUPPLY VOLTAGE (V)
V+ = 12V
f = 100kHz, CL = 0
DUTY CYCLE = 50%
14
SUPPLY VOLTAGE (V)
500kHz
1.00
TA = +85ºC
TA = +25ºC
16
8
16
SUPPLY CURRENT (mA)
1.2
6
14
1MHz
2.00
0.00
INPUT THRESHOLD VOLTAGE (V)
1.4
TA = -40ºC
TA = 0ºC
12
DUTY CYCLE = 50%
CL = 0
0.50
10
4
10
TA = +85ºC
TA = +25ºC
16
3.00
SUPPLY CURRENT (mA)
18
8
SUPPLY CURRENT (mA)
TA = +125ºC
8
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
2.50
MAX25615 toc07
PROPAGATION DELAY (ns)
20
TA = +125ºC
SUPPLY VOLTAGE (V)
PROPAGATION DELAY (HIGH TO LOW)
vs. SUPPLY VOLTAGE
toc04
22
20
18
TA = -40ºC
5
PROPAGATION DELAY (LOW TO HIGH)
vs. SUPPLY VOLTAGE
toc03
TA = +85ºC
TA = +125ºC
5
toc02
MAX25615 toc06
TA = +125ºC
FALL TIME (ns)
RISE TIME (ns)
5.5
TA = +85ºC
7
4
FALL TIME vs. SUPPLY VOLTAGE
SUPPLY CURRENT (mA)
7.5
toc01
PROPAGATION DELAY (ns)
RISE TIME vs. SUPPLY VOLTAGE
6
8
10
0.70
INPUT HIGH TO LOW
0.60
0.50
FALLING
4
INPUT LOW TO HIGH
0.80
12
SUPPLY VOLTAGE (V)
14
16
0.40
0
2
4
6
8
10
12
14
16
INPUT VOLTAGE (V)
Maxim Integrated │ 4
MAX25615
7A Sink, 3A Source,
12ns, SOT23 MOSFET Driver
Typical Operating Characteristics (continued)
(CL = 1000pF, TA = +25°C, unless otherwise noted. See Figure 1.)
INPUT VOLTAGE vs. OUTPUT VOLTAGE
(V+ = +4V, CL = 5000pF)
INPUT VOLTAGE vs. OUTPUT VOLTAGE
(V+ = +4V, CL = 10,000pF)
MAX25615 toc10
INPUT VOLTAGE vs. OUTPUT VOLTAGE
(V+ = +4V, CL = 5000pF)
MAX25615 toc11
VIN+
2V/div
MAX25615 toc12
VIN+
2V/div
VIN+
2V/div
VOUTPUT
2V/div
VOUTPUT
2V/div
VOUTPUT
2V/div
20ns/div
20ns/div
INPUT VOLTAGE vs. OUTPUT VOLTAGE
(V+ = +4V, CL = 10,000pF)
20ns/div
INPUT VOLTAGE vs. OUTPUT VOLTAGE
(V+ = +16V, CL = 5000pF)
INPUT VOLTAGE vs. OUTPUT VOLTAGE
(V+ = +16V, CL = 10,000pF)
toc14
MAX25615 toc13
toc15
VIN+
5V/div
VIN+
2V/div
0V
VOUTPUT
2V/div
0V
VIN+
5V/div
0V
VOUTPUT
5V/div
VOUTPUT
5V/div
0V
20ns/div
20ns/div
20ns/div
INPUT VOLTAGE vs. OUTPUT VOLTAGE
(V+ = +16V, CL = 5000pF)
INPUT VOLTAGE vs. OUTPUT VOLTAGE
(V+ = +16V, CL = 10,000pF)
toc16
toc17
0V
VIN+
5V/div
0V
VIN+
5V/div
0V
VOUTPUT
5V/div
0V
VOUTPUT
5V/div
20ns/div
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20ns/div
Maxim Integrated │ 5
MAX25615
7A Sink, 3A Source,
12ns, SOT23 MOSFET Driver
Pin Configuration
TOP VIEW
IN+
1
GND
2
IN-
3
+
MAX25615
6
V+
5
P_OUT
4
N_OUT
SOT23
Pin Description
PIN
NAME
1
IN+
2
GND
FUNCTION
Noninverting Logic Input. Connect IN+ to V+ when not used.
Ground
3
IN-
4
N_OUT
Inverting Logic Input. Connect IN- to GND when not used.
Driver Sink Output. Open-drain n-channel output. Sinks current for power MOSFET turn-off.
5
P_OUT
Driver Source Output. Open-drain p-channel output. Sources current for power MOSFET turn-on.
6
V+
Power-Supply Input. Bypass V+ to GND with a 1µF low-ESR ceramic capacitor.
Functional Diagram
V+
MAX25615
P
ININ+
P_OUT
BREAKBEFOREMAKE
CONTROL
N_OUT
N
GND
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Maxim Integrated │ 6
MAX25615
7A Sink, 3A Source,
12ns, SOT23 MOSFET Driver
IN+
VIH
VIL
P_OUT AND
N_OUT
CONNECTED
TOGETHER
90%
10%
tD-OFF
tF
V+
tD-ON
TIMING DIAGRAM
tR
V+
MAX25615
INPUT
IN+
P_OUT
IN-
N_OUT
GND
OUTPUT
CL
TEST CIRCUIT
Figure 1. Timing Diagram and Test Circuit
Detailed Description
Alternatively, the unused input can be used as an on/off
control input (Table 1).
Logic Inputs
The MAX25615's logic input is protected against voltage
spikes up to +16V, regardless of the V+ voltage. The
low 10pF input capacitance of the inputs reduces loading and increases switching speed. This device has two
inputs that give the user greater flexibility in controlling
the MOSFET. Table 1 shows all possible input combinations. Connect IN+ to V+ or IN- to GND when not used.
Undervoltage Lockout (UVLO)
Table 1. Truth Table
Driver Outputs
IN+
IN-
p-CHANNEL
n-CHANNEL
L
L
Off
On
L
H
Off
On
H
L
On
Off
H
H
Off
On
L = Logic-low, H = Logic-high.
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When V+ is below the UVLO threshold, the n-channel is
on and the p-channel is off, independent of the state of the
inputs. The UVLO is typically 3.45V with 200mV typical
hysteresis to avoid chattering. A typical falling delay of 2µs
makes the UVLO immune to narrow negative transients in
noisy environments.
The IC provides two separate outputs. One is an opendrain p-channel, the other an open-drain n-channel. They
have distinct current sourcing/sinking capabilities to independently control the rise and fall times of the MOSFET
gate. Add a resistor in series with P_OUT/N_OUT to slow
the corresponding rise/fall time of the MOSFET gate.
Maxim Integrated │ 7
MAX25615
Applications Information
Supply Bypassing, Device
Grounding, and Placement
Ample supply bypassing and device grounding are
extremely important because when large external capacitive loads are driven, the peak current at the V+ pin can
approach 3A, while at the GND pin, the peak current can
approach 7A. VCC drops and ground shifts are forms of
negative feedback for inverters and, if excessive, can
cause multiple switching when the IN- input is used and
the input slew rate is low. The device driving the input
should be referenced to the IC's GND pin, especially when
the IN- input is used. Ground shifts due to insufficient
device grounding can disturb other circuits sharing the
same AC ground return path. Any series inductance in the
V+, P_OUT, N_OUT, and/or GND paths can cause oscillations due to the very high di/dt that results when the IC
is switched with any capacitive load. A 1µF or larger value
ceramic capacitor is recommended, bypassing V+ to GND
and placed as close as possible to the pins. When driving
very large loads (e.g., 10nF) at minimum rise time, 10µF or
more of parallel storage capacitance is recommended. A
ground plane is highly recommended to minimize ground
return resistance and series inductance. Care should be
taken to place the IC as close as possible to the external
MOSFET being driven to further minimize board inductance and AC path resistance.
Power Dissipation
Power dissipation of the IC consists of three components,
caused by the quiescent current, capacitive charge and
discharge of internal nodes, and the output current (either
capacitive or resistive load). The sum of these components must be kept below the maximum power-dissipation
limit of the package at the operating temperature.
The quiescent current is 0.5mA typical. The current
required to charge and discharge the internal nodes
is frequency dependent (see the Typical Operating
Characteristics).
For capacitive loads, the total power dissipation is
approximately:
P = CLOAD x (V+) 2 x FREQ
where CLOAD is the capacitive load, V+ is the supply
voltage, and FREQ is the switching frequency.
Layout Information
The IC's MOSFET drivers source and sink large currents
to create very fast rise and fall edges at the gate of the
switching MOSFET. The high di/dt can cause unacceptable
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7A Sink, 3A Source,
12ns, SOT23 MOSFET Driver
ringing if the trace lengths and impedances are not well
controlled. The following PCB layout guidelines are recommended when designing with the IC:
●● Place one or more 1µF decoupling ceramic capacitor(s)
from V+ to GND as close as possible to the IC. At least
one storage capacitor of 10µF (min) should be located
on the PCB with a low resistance path to the V+ pin
of the IC. There are two AC current loops formed
between the IC and the gate of the MOSFET being
driven. The MOSFET looks like a large capacitance
from gate to source when the gate is being pulled low.
The active current loop is from N_OUT of the IC to the
MOSFET gate to the MOSFET source and to GND of
the IC. When the gate of the MOSFET is being pulled
high, the active current loop is from P_OUT of the IC
to the MOSFET gate to the MOSFET source to the
GND terminal of the decoupling capacitor to the V+
terminal of the decoupling capacitor and to the
V+ terminal of the IC. While the charging current
loop is important, the discharging current loop is
critical. It is important to minimize the physical distance and the impedance in these AC current paths.
●● In a multilayer PCB, the component surface layer
surrounding the IC should consist of a GND plane
containing the discharging and charging current loops.
Ordering Information
PART
INPUT LOGIC
LEVELS
MAX25615AUT/V+
TTL
PIN-PACKAGE
6 SOT23
Note: All devices are specified over the -40°C to +125°C
operating temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
/V Denotes an automotive-qualified part.
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
6 SOT23
U6+1
21-0058
90-0175
Maxim Integrated │ 8
MAX25615
7A Sink, 3A Source,
12ns, SOT23 MOSFET Driver
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
0
8/18
Initial release
1
11/18
Updated maximum operating voltage and absolute maximum ratings
—
2
11/18
Updated Typical Operating Circuit figure
1, 2, 7
1
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
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