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MAX3640UCM

MAX3640UCM

  • 厂商:

    AD(亚德诺)

  • 封装:

    LQFP48

  • 描述:

    LVDS, DUAL 4:2 XPOINT SWITCH

  • 数据手册
  • 价格&库存
MAX3640UCM 数据手册
19-4800; Rev 0; 3/00 3.3V, 622Mbps LVDS, Dual 4:2 Crosspoint Switch Features The MAX3640 has a unique power-saving feature. When a set of four output channels has been de-selected, the output drivers are powered down to reduce power consumption by 165mW. The fully differential architecture ensures low crosstalk, jitter accumulation, and signal skew. The MAX3640 is available in a 48-pin TQFP package and operates from a +3.3V supply over the 0°C to +85°C temperature range. ♦ Single +3.3V Supply ♦ 257mW Power Consumption (four output channels enabled) ♦ 2.8psRMS Output Random Jitter ♦ 42ps Output Deterministic Jitter ♦ Power-Down Feature for Deselected Outputs ♦ 110ps Channel-to-Channel Skew ♦ 240ps Output Edge Speed ♦ LVDS Inputs/Outputs ♦ LVDS Output 3-State Enable Ordering Information Applications SONET/SDH Backplanes PART TEMP. RANGE High-Speed Parallel Links MAX3640UCM 0°C to +85°C Digital Cross-Connects PIN-PACKAGE 48 TQFP Pin Configuration appears at end of data sheet. System Interconnects ATM Switch Cores Typical Operating Circuit SONET SOURCE A MAX3869 LASER DRIVER OPTICAL TRANSCEIVER 2.5Gbps MAX3831 4-CHANNEL INTERCONNECT MUX/DEMUX MAX3640 CROSSPOINT SWITCH SONET SOURCE B 622Mbps 622Mbps MAX3866 TIA AND LA MAX3876 CDR PARALLEL DATA OUTPUT ________________________________________________________________ Maxim Integrated Products 1 For free samples and the latest literature, visit www.maxim-ic.com or phone 1-800-998-8800. For small orders, phone 1-800-835-8769. MAX3640 General Description The MAX3640 is a dual-path crosspoint switch for use at OC-12 data rates. The MAX3640 can be used to receive and transmit 622Mbps low-voltage differential signals (LVDS) across a backplane with minimum jitter accumulation. Each path incorporates input buffers, multiplexers, a crosspoint switch, and output drivers. The four output channels have a redundant set of outputs for test or fanning purposes. The device offers signal-path redundancy for critical data streams. MAX3640 3.3V, 622Mbps LVDS, Dual 4:2 Crosspoint Switch ABSOLUTE MAXIMUM RATINGS Supply Voltage, VCC ................................................-0.5V to 5.0V Input Voltage (LVDS, TTL)..........................-0.5V to (VCC + 0.5V) Output Voltage (LVDS) ...............................-0.5V to (VCC + 0.5V) Continuous Power Dissipation (TA = +85°C) 48-Pin TQFP (derate 12.5mW/°C) .................................813mW Operating Temperature Range...............................0°C to +85°C Storage Temperature Range ............................ -55°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (VCC = +3.0V to 3.6V, LVDS differential load = 100Ω ±1%, TA = 0°C to +85°C. Typical values are at VCC = +3.3V, TA = +25°C, unless otherwise noted.) PARAMETER Supply Current SYMBOL ICC TYP MAX Eight outputs enabled CONDITIONS MIN 130 175 Four outputs enabled 78 UNITS mA LVDS INPUTS AND OUTPUTS Input Voltage Range VIN 0 2400 mV Differential Input Threshold VIDTH -100 100 mV Threshold Hysteresis VHYST Differential Input Impedance 90 RIN 85 Input Common-Mode Current IOS LVDS input, VOS = 1.2V Output Voltage High VOH Figure 1 Output Voltage Low VOL Figure 1 0.925 Output Voltage Swing |VOD| Figure 1 250 Change in Magnitude of Differential Output for Complementary States Offset Output Voltage Change in Magnitude of Output Offset Voltage for Complementary States 100 Figure 1 1.125 ENA, ENB = GND ENA, ENB = VCC Output Current 1.475 V 400 mV 25 mV 1.275 mV 25 mV V |∆VOS| Differential Output Impedance Ω µA 245 |∆VOD| VOS mV 115 1 80 Shorted together MΩ 120 Ω 12 mA TTL INPUTS Input Voltage High VIH Input Voltage Low VIL Input Current High IIH VIH = 2.0V -250 µA Input Current Low IIL VIL = 0.8V -550 µA 2 2.0 V 0.8 _______________________________________________________________________________________ V 3.3V, 622Mbps LVDS, Dual 4:2 Crosspoint Switch (VCC = +3.0V to 3.6V, LVDS differential load = 100Ω ±1%, TA = 0°C to +85°C. Typical values are at VCC = +3.3V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN Parallel Input/Output Data Rate TYP MAX 622 Output Rise/Fall Time tr, tf Output Random Jitter RJ Output Deterministic Jitter DJ 20% to 80% 150 (Note 2) LVDS Output Differential Skew tSKEW1 LVDS Output Channel-toChannel Skew tSKEW2 UNITS Mbps 240 350 ps 2.8 4 psRMS 42 200 ps 24 50 ps 110 ps LVDS Output Enable Time 266 ns LVDS Output Disable Time 66 ns LVDS Propagation Delay from Input to Output 2.5 tD ns Note 1: AC characteristics are guaranteed by design and characterization. Note 2: Deterministic jitter (DJ) is the arithmetic sum of pattern-dependent jitter and pulse-width distortion. DJ is measured while applying 100mVp-p noise (f ≤ 2MHz) to the power supply. VOH LVDS+ SINGLE ENDED 125mV MIN 200mV MAX VOS = 1.2V ±75mV 250mV MIN 400mV MAX VOL VOH VOS = 1.2V ±75mV 125mV MIN 200mV MAX LVDSSINGLE ENDED 250mV MIN 400mV MAX VOL VOD 250mV MIN 400mV MAX 0 500mV MIN 800mV MAX (LVDS+) - (LVDS-) DIFFERENTIAL OUTPUT VOLTAGE Figure 1. LVDS Output Levels _______________________________________________________________________________________ 3 MAX3640 AC ELECTRICAL CHARACTERISTICS Typical Operating Characteristics (VCC = +3.3V, TA = +25°C, unless otherwise noted.) DIFFERENTIAL OUTPUT VOLTAGE vs. TEMPERATURE SUPPLY CURRENT vs. TEMPERATURE 130 8 OUTPUTS ENABLED 120 110 100 90 80 4 OUTPUTS ENABLED 70 60 50 630 620 610 600 590 580 570 560 20 30 40 50 60 70 80 0 20 40 60 TEMPERATURE (°C) TEMPERATURE (°C) 622Mbps EYE DIAGRAM 1.25Gbps EYE DIAGRAM INPUT = 213 - 1 PRBS CONTAINS 100 ZEROS 100mV/div INPUT = 213 - 1 PRBS CONTAINS 100 ZEROS 100mV/div 200ps/div 100ps/div _______________________________________________________________________________________ 80 MAX3640 toc04 10 MAX3640 toc03 0 4 640 MAX3640 toc02 140 DIFFERENTIAL OUTPUT VOLTAGE (mVp-p) MAX3640 toc01 150 SUPPLY CURRENT (mA) MAX3640 3.3V, 622Mbps LVDS, Dual 4:2 Crosspoint Switch 3.3V, 622Mbps LVDS, Dual 4:2 Crosspoint Switch PIN NAME FUNCTION 1, 12, 25, 36, 41 VCC Positive Supply Voltage 2, 11, 26, 35 GND Supply Ground 3, 5, 45, 47 DIA3+, DIA4+, DIA1+, DIA2+ Positive LVDS, Channel-A Data Input 4, 6, 46, 48 DIA3-, DIA4-, DIA1-, DIA2- Negative LVDS, Channel-A Data Input 7, 9, 13, 15 DIB1+, DIB2+, DIB3+, DIB4+ Positive LVDS, Channel-B Data Input 8, 10, 14, 16 DIB1-, DIB2-, DIB3-, DIB4- Negative LVDS, Channel-B Data Input 17–20 SEL1–SEL4 21, 23, 27, 29 DOB4-, DOB3-, DOB2-, DOB1- Negative LVDS, Channel-B Data Output 22, 24, 28, 30 DOB4+, DOB3+, DOB2+, DOB1+ Positive LVDS, Channel-B Data Output 31, 33, 37, 39 DOA4-, DOA3-, DOA2-, DOA1- Negative LVDS, Channel-A Data Output 32, 34, 38, 40 DOA4+, DOA3+, DOA2+, DOA1+ Positive LVDS, Channel-A Data Output 42 ENB Channel-B Output Enable, TTL Input. ENB = high enables DOB1−DOB4. ENB = low powers down DOB1−DOB4 and sets them to a high-impedance state. 43 ENA Channel-A Output Enable, TTL Input. ENA = high enables DOA1−DOA4. ENA = low powers down DOA1−DOA4 and sets them to a high-impedance state. 44 IN_SEL Crosspoint Switch Select, TTL Input. (Table 1) Input Select Pin, TTL Input. Connect to logic high (or VCC) to select DIA1−DIA4. Connect to logic low (or GND) to select DIB1−DIB4. Detailed Description Figure 2 shows the MAX3640’s architecture. It consists of two data paths; each data path begins with four differential input buffers. The IN_SEL pin selects whether the A or B channels are passed to the 2x2 crosspoint switch that follows. The SEL_ pins control the routing of the crosspoint switch. Each crosspoint switch output drives a pair of LVDS output drivers. This provides a redundant set of outputs that can be used for fan-out or test purposes. Each set of outputs, DOA_ and DOB_, is enabled or disabled by the ENA and ENB pins. See Table 1 for routing controls. LVDS Inputs and Outputs The MAX3640 features LVDS inputs and outputs for interfacing with high-speed digital circuitry. The LVDS standard is based on the IEEE 1596.3 LVDS specification. This technology uses 500mV to 800mV differential low-voltage swings to achieve fast transition times, low power dissipation, and improved noise immunity. For proper operation, the data outputs require 100Ω differential termination between the inverting and noninverting pins. Do not terminate these outputs to ground. See Figure 1 for LVDS output voltage specifications. The data inputs are internally terminated with 100Ω differential and therefore do not require external termination. _______________________________________________________________________________________ 5 MAX3640 Pin Description MAX3640 3.3V, 622Mbps LVDS, Dual 4:2 Crosspoint Switch 2x2 CROSSPOINT SWITCH DIA1+ 1 MAX3640 DOA1+ 0 DIA1- DOA1DIB1+ DOB1+ 1 0 DIB1- DOB1SEL1 DIA2+ DOA2+ 1 0 DIA2- DOA2- DIB2+ DOB2+ 1 0 DIB2- DOB2- SEL2 2x2 CROSSPOINT SWITCH DIA3+ 1 DIA3- DOA3+ 0 DOA3- DIB3+ 0 DOB3+ 1 DIB3DOB3SEL3 DIA4+ DOA4+ 1 DIA4- 0 DOA4- DIB4+ 0 1 DOB4+ DIB4DOB4SEL4 IN_SEL ENA ENB Figure 2. Functional Diagram 6 _______________________________________________________________________________________ 3.3V, 622Mbps LVDS, Dual 4:2 Crosspoint Switch MAX3640 Table 1. Output Routing ROUTING CONTROLS IN_SEL SEL1 SEL2 OUTPUT SIGNALS Signal at DOA1/DOB1 Signal at DOA2/DOB2 0 0 0 DIB1 DIB1 0 0 1 DIB1 DIB2 0 1 0 DIB2 DIB1 0 1 1 DIB2 DIB2 1 0 0 DIA1 DIA1 1 0 1 DIA1 DIA2 1 1 0 DIA2 DIA1 1 1 1 DIA2 DIA2 IN_SEL SEL3 SEL4 Signal at DOA3/DOB3 Signal at DOA4/DOB4 0 0 0 DIB3 DIB3 0 0 1 DIB3 DIB4 0 1 0 DIB4 DIB3 0 1 1 DIB4 DIB4 1 0 0 DIA3 DIA3 1 0 1 DIA3 DIA4 1 1 0 DIA4 DIA3 1 1 1 DIA4 DIA4 Note: Disabling the outputs by using ENA or ENB will drive the DOA_ or DOB_ data outputs to a high-impedance state. +3.3V 182Ω 48Ω 48Ω Zo = 50Ω LVPECL DRIVER MAX3640 Zo = 50Ω 48Ω 182Ω 48Ω +3.3V Figure 3. LVPECL to LVDS Interface _______________________________________________________________________________________ 7 MAX3640 3.3V, 622Mbps LVDS, Dual 4:2 Crosspoint Switch Applications Information Interfacing LVPECL Outputs to MAX3640 LVDS Inputs To DC-couple between LVPECL and LVDS, use the resistor network shown in Figure 3. Note that the LVPECL output is optimized for a 50Ω load to VCC - 2V, so an equivalent network is used. Also, the network attenuation should be such that the LVPECL output signal after attenuation is well within the LVDS input range. Note that the LVDS input impedance is a true 100Ω between the inputs. The differential impedance does not contribute to the DC termination impedance, but does contribute to the AC termination impedance. This means that AC and DC impedance will always be different. Layout Techniques For best performance, use good high-frequency layout techniques. Filter voltage supplies, and keep ground connections short. Use multiple vias where possible. Also, use controlled-impedance transmission lines to interface with the MAX3640 data inputs and outputs. Interface Models Figure 4 shows the interface model for the LVDS inputs, while Figure 5 shows the model for the LVDS outputs. VCC VCC 25k MAX3640 1.5k DIA1+ 5k 50Ω VCC 50Ω DIA11.5k Figure 4. LVDS Input Model 8 _______________________________________________________________________________________ 3.3V, 622Mbps LVDS, Dual 4:2 Crosspoint Switch TRANSISTOR COUNT: 2453 VCC DOA1+ 45Ω 45Ω VCC DOA1- MAX3640 Figure 5. LVDS Output Model DIA2+ DIA1- DIA1+ IN_SEL ENA ENB VCC DOA1+ DOA1- DOA2+ DOA2- 47 46 45 44 43 42 40 39 38 37 41 DIA248 Pin Configuration VCC 1 36 VCC GND 2 35 GND DIA3+ 3 34 DOA3+ DIA3- 4 33 DOA3- DIA4+ 5 32 DOA4+ DIA4- 6 31 DOA4- DIB1+ 7 30 DOB1+ DIB1- 8 29 DOB1- DIB2+ 9 28 DOB2+ DIB2- 10 27 DOB2- GND VCC 11 26 12 25 GND VCC 24 23 22 21 20 19 18 17 16 15 14 DIB3+ DIB3DIB4+ DIB4SEL1 SEL2 SEL3 SEL4 DOB4DOB4+ DOB3DOB3+ 13 MAX3640 _______________________________________________________________________________________ 9 MAX3640 Chip Information VCC MAX3640 3.3V, 622Mbps LVDS, Dual 4:2 Crosspoint Switch 32L/48L,TQFP.EPS Package Information 10 ______________________________________________________________________________________ 3.3V, 622Mbps LVDS, Dual 4:2 Crosspoint Switch MAX3640 NOTES ______________________________________________________________________________________ 11 MAX3640 3.3V, 622Mbps LVDS, Dual 4:2 Crosspoint Switch NOTES Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
MAX3640UCM 价格&库存

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