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MAX6831SDUT

MAX6831SDUT

  • 厂商:

    AD(亚德诺)

  • 封装:

    SOT23-6

  • 描述:

    IC SUPERVISOR 2 CHANNEL SOT23-6

  • 数据手册
  • 价格&库存
MAX6831SDUT 数据手册
19-1867; Rev 2; 12/05 Dual Ultra-Low-Voltage SOT23 µP Supervisors with Manual Reset and Watchdog Timer The MAX6826–MAX6831 are ultra-low-voltage microprocessor (µP) supervisory circuits designed to monitor two power supplies and have manual reset and watchdog input functions. These devices assert a system reset if any of the monitored supplies fall below the preprogrammed thresholds, and maintain reset for a minimum timeout period after the supplies rise above the threshold. Microprocessor supervisors significantly improve system reliability and accuracy compared to separate ICs or discrete components. These devices monitor primary voltages from +1.8V to +5.0V and secondary voltages from +0.9V to +2.5V. These devices are guaranteed to be in the correct state for VCC down to +1.0V. A variety of preprogrammed reset threshold voltages are available (see the Threshold Suffix Guide). The devices include manual reset and watchdog inputs. The MAX6829/MAX6830/MAX6831 provide a factorytrimmed threshold to monitor a 2nd voltage down to +0.9V. The MAX6826/MAX6829 have a push-pull RESET, the MAX6827/MAX6830 have a push-pull RESET and the MAX6828/MAX6831 have an open-drain RESET. The MAX6826/MAX6827/MAX6828 have an auxiliary monitor that allows user adjustable input to monitor voltages down to +0.6V. See Selector Guide for functions available. ________________________Applications Portable/BatteryPowered Equipment Embedded Controllers Intelligent Instruments Automotive Systems Critical µP Monitoring Multivoltage Systems Features ♦ Monitor Primary VCC Supplies from +1.8V to +5.0V and Secondary VCC2 Supplies from +0.9V to +2.5V ♦ User Adjustable RESET IN Down to +0.63V (MAX6826/MAX6827/MAX6828) ♦ 140ms (min) Reset Timeout Delay ♦ 1.6s Watchdog Timeout Period ♦ Manual Reset Input ♦ Three Reset Output Options Push-Pull RESET Push-Pull RESET Open-Drain RESET ♦ Guaranteed Reset Valid Down to VCC = +1.0V ♦ Immune to Short Negative VCC Transients ♦ No External Components ♦ Small 6-pin SOT23 Packages Ordering Information PART† TEMP RANGE PIN-PACKAGE MAX6826_UT-T -40°C to +125°C 6 SOT23-6 MAX6827_UT-T -40°C to +125°C 6 SOT23-6 MAX6828_UT-T -40°C to +125°C 6 SOT23-6 MAX6829_ _UT-T -40°C to +125°C 6 SOT23-6 MAX6830_ _UT-T -40°C to +125°C 6 SOT23-6 MAX6831_ _UT-T -40°C to +125°C 6 SOT23-6 †Insert the desired suffix letter (from Standard Versions table) into Pin Configuration the blanks to complete the part number. Devices are available in both leaded and lead-free packaging. Specify lead-free by replacing “-T” with “+T” when ordering. TOP VIEW RESET(RESET) 1 GND 2 6 MAX6826– MAX6831 VCC Standard Versions Table* MAX6826/MAX6827/MAX6828 5 RESET IN/VCC2 L S MR 3 4 WDI R Z SOT23-6 (RESET) MAX6827/MAX6830 ONLY RESET IN FOR MAX6826/MAX6827/MAX6828 ONLY VCC2 FOR MAX6829/MAX6830/MAX6831 ONLY Typical Operating Circuit, Threshold Suffix Guide, and Selector Guide appear at end of data sheet. V *Samples are typically available for standard versions only. The MAX6826/MAX6827/MAX6828 require a 2.5k minimum order increment for all versions. Contact factory for availability. Standard Versions Table continued at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX6826–MAX6831 General Description MAX6826–MAX6831 Dual Ultra-Low-Voltage SOT23 µP Supervisors with Manual Reset and Watchdog Timer ABSOLUTE MAXIMUM RATINGS Operating Temperature Range .........................-40°C to +125°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C VCC, VCC2 to GND.................................................-0.3V to +6.0V Open-Drain RESET................................................-0.3V to +6.0V Push-Pull RESET, RESET............................-0.3V to (VCC + 0.3V) MR, WDI, RESET IN....................................-0.3V to (VCC + 0.3V) Input Current (VCC) .............................................................20mA Output Current (RESET, RESET).........................................20mA Continuous Power Dissipation (TA = +70°C) 6-Pin SOT23 (derate 8.7mW/°C above +70°C)..............696mW Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +4.5V to +5.5V for MAX68_ _L/M, VCC = +2.7V to +3.6V for MAX68_ _T/S/R, VCC = +2.1V to +2.75V for MAX68_ _Z/Y, VCC = +1.53V to +2.0V for MAX68_ _W/V; TA = -40°C to +125°C, unless otherwise specified. Typical values are at TA = +25°C.) (Note 1) PARAMETER Operating Voltage Range VCC Supply Current MR and WDI Unconnected SYMBOL VCC CONDITIONS 1.0 5.5 1.2 5.5 VCC = +3.6V, no load MAX68_ _L MAX68_ _M MAX68_ _T MAX68_ _S VTH MAX68_ _R MAX68_ _Z MAX68_ _Y MAX68_ _W MAX68_ _V 2 MAX TA = -40°C to +125°C TA = -40°C to +85°C 10 TA = -40°C to +125°C 7 TA = -40°C to +125°C UNITS V 20 30 TA = -40°C to +85°C 16 µA 25 VCC2 ≤ +2.5V VCC2 Supply Current VCC Reset Threshold (VCC Falling) TYP TA = 0°C to +85°C VCC = +5.5V, no load ICC MIN 2 TA = -40°C to +85°C 4.50 4.63 4.75 TA = -40°C to +125°C 4.47 4.63 4.78 TA = -40°C to +85°C 4.25 4.38 4.50 TA = -40°C to +125°C 4.22 4.38 4.53 TA = -40°C to +85°C 3.00 3.08 3.15 TA = -40°C to +125°C 2.97 3.08 3.17 TA = -40°C to +85°C 2.85 2.93 3.00 TA = -40°C to +125°C 2.83 2.93 3.02 TA = -40°C to +85°C 2.55 2.63 2.70 TA = -40°C to +125°C 2.53 2.63 2.72 TA = -40°C to +85°C 2.25 2.32 2.38 TA = -40°C to +125°C 2.24 2.32 2.40 TA = -40°C to +85°C 2.12 2.19 2.25 TA = -40°C to +125°C 2.11 2.19 2.26 TA = -40°C to +85°C 1.62 1.67 1.71 TA = -40°C to +125°C 1.61 1.67 1.72 TA = -40°C to +85°C 1.52 1.58 1.62 _______________________________________________________________________________________ µA V Dual Ultra-Low-Voltage SOT23 µP Supervisors with Manual Reset and Watchdog Timer (VCC = +4.5V to +5.5V for MAX68_ _L/M, VCC = +2.7V to +3.6V for MAX68_ _T/S/R, VCC = +2.1V to +2.75V for MAX68_ _Z/Y, VCC = +1.53V to +2.0V for MAX68_ _W/V; TA = -40°C to +125°C, unless otherwise specified. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS Z Y W V I VCC2 Reset Threshold VTH2 H G F E D MIN TYP MAX TA = -40°C to +85°C 2.244 2.313 2.381 TA = -40°C to +125°C 2.238 2.313 2.388 TA = -40°C to +85°C 2.119 2.188 2.257 TA = -40°C to +125°C 2.113 2.188 2.263 TA = -40°C to +85°C 1.615 1.665 1.715 TA = -40°C to +125°C 1.611 1.665 1.719 TA = -40°C to +85°C 1.525 1.575 1.625 TA = -40°C to +125°C 1.521 1.575 1.629 TA = -40°C to +85°C 1.346 1.388 1.429 TA = -40°C to +125°C 1.343 1.388 1.433 TA = -40°C to +85°C 1.271 1.313 1.354 TA = -40°C to +125°C 1.268 1.313 1.358 TA = -40°C to +85°C 1.077 1.110 1.143 TA = -40°C to +125°C 1.074 1.110 1.146 TA = -40°C to +85°C 1.017 1.050 1.083 TA = -40°C to +125°C 1.014 1.050 1.086 TA = -40°C to +85°C 0.808 0.833 0.858 TA = -40°C to +125°C 0.806 0.833 0.860 TA = -40°C to +85°C 0.762 0.788 0.813 TA = -40°C to +125°C 0.761 0.788 0.815 Reset Threshold Temperature Coefficient Reset Threshold Hysteresis RESET IN Threshold VRSTINTH VRSTINTH falling TA = 0°C to +85°C 0.615 TA = -40°C to +125°C 0.610 RESET IN Hysteresis RESET IN Input Current (Note 2) VCC to Reset Output Delay tRD RESET IN to Reset Output Delay Reset Timeout Period RESET Output LOW (Push-Pull or Open-Drain) ppm/°C 2 x VTH mV 0.630 0.645 0.650 -25 +25 TA = -40°C to +125°C -100 +100 20 VRSTIN = VRSTINTH to (VRSTINTH - 30mV) tRP VOL 140 TA = -40°C to +125°C 100 200 nA µs 15 TA = -40°C to +85°C V mV TA = -40°C to +85°C VCC = VTH to (VTH - 100mV) V 60 2.5 IRSTIN UNITS µs 280 320 VCC ≥ 1.0V, ISINK = 50µA, reset asserted, TA = 0°C to +85°C 0.3 VCC ≥ 1.2V, ISINK = 100µA, reset asserted 0.3 VCC ≥ 2.55V, ISINK = 1.2mA, reset asserted 0.3 VCC ≥ 4.25V, ISINK = 3.2mA, reset asserted 0.4 ms V _______________________________________________________________________________________ 3 MAX6826–MAX6831 ELECTRICAL CHARACTERISTICS (continued) MAX6826–MAX6831 Dual Ultra-Low-Voltage SOT23 µP Supervisors with Manual Reset and Watchdog Timer ELECTRICAL CHARACTERISTICS (continued) (VCC = +4.5V to +5.5V for MAX68_ _L/M, VCC = +2.7V to +3.6V for MAX68_ _T/S/R, VCC = +2.1V to +2.75V for MAX68_ _Z/Y, VCC = +1.53V to +2.0V for MAX68_ _W/V; TA = -40°C to +125°C, unless otherwise specified. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL RESET Output HIGH (Push-Pull Only) VOH Open-Drain RESET Output Leakage Current (Note 1) ILKG RESET Output HIGH (Push-Pull Only) RESET Output LOW (Push-Pull Only) CONDITIONS MIN VCC ≥ 1.8V, ISOURCE = 200µA, reset not asserted 0.8 ✕ VCC TYP MAX VCC ≥ 3.15V, ISOURCE = 500µA, reset not asserted 0.8 ✕ VCC UNITS V VCC ≥ 4.75V, ISOURCE = 800µA, reset not asserted 0.8 ✕ VCC VOH VOH RESET not asserted 1.0 VCC ≥ 1.0V, ISOURCE = 1µA, reset asserted, TA = 0°C to +85°C 0.8 ✕ VCC VCC ≥ 1.50V, ISOURCE = 100µA, reset asserted 0.8 ✕ VCC VCC ≥ 2.55V, ISOURCE = 500µA, reset asserted 0.8 ✕ VCC VCC ≥ 4.25V, ISOURCE = 800µA, reset asserted 0.8 ✕ VCC µA V VCC ≥ 1.8V, ISINK = 500µA, reset asserted 0.3 VCC ≥ 3.15V, ISINK = 1.2mA, reset asserted 0.3 VCC ≥ 4.75V, ISINK = 3.2mA, reset asserted 0.3 V MANUAL RESET INPUT MR Input voltage 0.3 ✕ VCC VIL 0.7 ✕ VCC VIH MR Minimum Input Pulse 1 MR Glitch Rejection µs 100 MR to Reset Delay ns 200 MR Pullup Resistance V 25 50 TA = -40°C to +85°C 1.12 1.6 TA = -40°C to +125°C 0.80 ns 75 kΩ WATCHDOG INPUT Watchdog Timeout Period tWD WDI Pulse Width (Note 2) tWDI WDI Input Voltage WDI Input Current 50 0.3 ✕ VCC 0.7 ✕ VCC WDI = VCC, time average WDI = 0, time average 120 -20 -15 Note 1: Over-temperature limits are guaranteed by design and not production tested. Devices tested at +25°C. Note 2: Guaranteed by design and not production tested. 4 s ns VIL VIH IWDI 2.4 2.60 _______________________________________________________________________________________ 160 V µA Dual Ultra-Low-Voltage SOT23 µP Supervisors with Manual Reset and Watchdog Timer RESET TIMEOUT PERIOD vs. TEMPERATURE 9 VCC = +1.8V, V VERSION 5 MAX6826 toc02 200 190 180 -40 -20 0 20 40 60 80 20 15 10 5 150 3 25 170 160 4 0 -40 -20 100 120 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) WATCHDOG TIMEOUT PERIOD vs. TEMPERATURE NORMALIZED RESET THRESHOLD DELAY vs. TEMPERATURE MAXIMUM VCC TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE 1.06 MAX6826 toc04 2.0 1.9 1.04 RESET THRESHOLD (V) 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.02 1.00 0.98 0.96 120 100 80 RESET OCCURS ABOVE CURVE 60 40 20 1.1 0.94 -40 -20 1.0 20 40 60 80 100 120 TEMPERATURE (°C) 0 0 20 40 60 80 100 120 TEMPERATURE (°C) VRSTIN FALLING VRSTIN = VRSTINTH - 30mV 20 15 10 20 40 60 80 100 120 140 160 180 200 RESET THRESHOLD OVERDRIVE (mV), VTH - VCC VRSTIN TO RESET OUTPUT DELAY vs. TEMPERATURE 25 0 MAXIMUM VRSTIN TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE 100 MAX6826 toc08 0 MAX6826 toc07 -40 -20 PROPAGATION DELAY (µs) WATCHDOG TIMEOUT PERIOD (s) 210 MAX6826 toc06 6 VCC = +3.3V, S VERSION 220 VCC FALLING, VCC = VTH - 100mV 30 TRANSIENT DURATION (µs) 7 230 MAX6826 toc05 8 35 PROPAGATION DELAY (µs) 10 90 TRANSIENT DURATION (µs) SUPPLY CURRENT (µA) VCC = +5V, L VERSION 240 RESET TIMEOUT PERIOD (ms) 12 11 250 MAX6826 toc01 13 VCC TO RESET OUTPUT DELAY vs. TEMPERATURE MAX6826 toc03 SUPPLY CURRENT vs. TEMPERATURE 80 70 60 50 40 RESET OCCURS ABOVE CURVE 30 20 5 10 0 0 -40 -20 0 20 40 60 TEMPERATURE (°C) 80 100 120 0 20 40 60 80 100 120 140 160 180 200 RESET THRESHOLD OVERDRIVE (mV), VRSTINTH - VRSTIN _______________________________________________________________________________________ 5 MAX6826–MAX6831 Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted.) MAX6826 toc09 2.92 VCC = +2.9V 0.300 VCC = +2.9V 2.90 2.88 0.250 MAX6826 toc10 VOLTAGE OUTPUT HIGH vs. ISOURCE VOLTAGE OUTPUT LOW vs. ISINK 0.350 2.86 VOUT (V) VOUT (V) MAX6826–MAX6831 Dual Ultra-Low-Voltage SOT23 µP Supervisors with Manual Reset and Watchdog Timer 0.200 0.150 2.84 2.82 2.80 0.010 2.78 0.005 2.76 2.74 0 0 1 2 3 4 5 6 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 7 ISOURCE (mA) ISINK (mA) Pin Description PIN MAX 6826 MAX 6827 1 MAX 6828 1 MAX 6829 1 1 MAX 6831 1 1 NAME FUNCTION RESET Active-Low Open-Drain or Push-Pull Reset Output. RESET changes from high to low when VCC1, VCC2, or RESET IN input drops below the selected reset threshold, MR is pulled low, or the watchdog triggers a reset. RESET remains low for the reset timeout period after all voltages exceed the device reset threshold, MR goes low to high, or the watchdog triggers a reset. RESET Active-High Push-Pull Reset Output. RESET changes from low to high when VCC1, VCC2, or RESET IN input drops below the selected reset threshold, MR is pulled low, or the watchdog triggers a reset. RESET remains HIGH for the reset timeout period after all voltages exceed the device reset threshold, MR goes low to high, or the watchdog triggers a reset. 2 2 2 2 2 2 GND 3 3 3 3 3 3 MR Manual Reset Input, Active-Low, Internal 50kΩ pullup to VCC. Pull low to force a reset. Reset remains active as long as MR is low and for the reset timeout period after MR goes high. Leave unconnected or connect to VCC, if unused. WDI Watchdog Input. If WDI remains high or low for longer than the watchdog timeout period, the internal watchdog timer runs out and a reset is triggered for the reset timeout period. The internal watchdog timer clears whenever reset is asserted, the manual reset is asserted, or WDI sees a rising or falling edge. If WDI is left unconnected or is connected to a three-stated buffer output, the watchdog feature is disabled. 4 6 MAX 6830 4 4 4 4 4 Ground _______________________________________________________________________________________ Dual Ultra-Low-Voltage SOT23 µP Supervisors with Manual Reset and Watchdog Timer PIN MAX 6826 MAX 6827 MAX 6828 5 5 5 6 6 6 MAX 6829 MAX 6830 MAX 6831 NAME FUNCTION RESET IN Input for User Adjustable RESET IN Monitor. High-impedance input for internal reset comparator. Connect this pin to an external resistor-divider network to set the reset threshold voltage. 0.63V (typ) threshold. 5 5 5 VCC2 Factory-Trimmed VCC2 Monitor. Connect this pin to a secondary powersupply voltage. 6 6 6 VCC Supply Voltage. Input for primary reset threshold monitor. VCC MAX6826/MAX6827/MAX6828 RESET TIMEOUT DELAY GENERATOR RESET OR RESET 1.26V 0.63V VCC RESET IN MR WDI WATCHDOG TRANSITION DETECTOR WATCHDOG TIMER Figure 1. Functional Diagram of RESET IN _______________________________________________________________________________________ 7 MAX6826–MAX6831 Pin Description (continued) MAX6826–MAX6831 Dual Ultra-Low-Voltage SOT23 µP Supervisors with Manual Reset and Watchdog Timer VCC MAX6829/MAX6830/MAX6831 RESET OR RESET RESET TIMEOUT DELAY GENERATOR 1.26V 0.63V VCC2 VCC MR WATCHDOG TRANSITION DETECTOR WDI WATCHDOG TIMER Figure 2. Functional Diagram of VCC2 Detailed Description RESET/RESET Output A microprocessor’s (µP’s) reset input starts the µP in a known state. The MAX6826–MAX6831 µP supervisory circuits assert a reset to prevent code-execution errors during power-up, power-down, and brownout conditions. Whenever a monitored voltage falls below the reset threshold, the reset output asserts low for RESET and high for RESET. Once all monitored voltages exceed their reset thresholds, an internal timer keeps the reset output asserted for the specified reset timeout period (tRP); after this interval, reset output returns to its original state (Figure 3). Manual Reset Input Many µP-based products require manual-reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. A logic low on MR 8 asserts a reset. Reset remains asserted while MR is low, and for the timeout period (140ms min) after it returns high. MR has an internal 50kΩ pullup resistor, so it can be left open if not used. This input can be driven with CMOS logic levels or with open-drain/collector VCC 1V VTH VTH 1V RESET tRP tRD RESET tRP tRD GND Figure 3. Reset Timing Diagram _______________________________________________________________________________________ Dual Ultra-Low-Voltage SOT23 µP Supervisors with Manual Reset and Watchdog Timer tRST VCC VCC MAX6828 MAX6831 RESET RESET* tRP tWD RESET tRP RESET GENERATOR WDI GND *RESET IS THE INVERSE OF RESET. µP GND Figure 6. Interfacing Open-Drain RESET to µPs with Bidirectional Reset I/O Figure 4. Watchdog Timing Relationship the maximum allowable leakage current is 10µA and the maximum allowable load capacitance is 200pF. VMONITOR R1 MAX6826 MAX6827 MAX6828 RSTIN R2 VCC ≥ VRSTIN Adjustable Reset Thresholds The MAX6826/MAX6827/MAX6828 provide a user adjustable input to monitor a second voltage. The threshold voltage at RSTIN is typically 0.63V. To monitor a voltage higher than 0.63V, connect a resistordivider to the circuit as shown in Figure 5. The threshold at VMONITOR is:  R1 + R2  VMONITOR _ TRIP = 0.63V    R2  Figure 5. Monitoring a Voltage outputs. Connect a normally open momentary switch from MR to GND to create a manual-reset function; external debounce circuitry is not required. If MR is driven from long cables or the device is used in a noisy environment, connect a 0.1µF capacitor from MR to GND to provide additional noise immunity. Watchdog Input The watchdog circuit monitors the µP’s activity. If the µP does not toggle (low to high or high to low) the watchdog input (WDI) within the watchdog timeout period (1.6s nominal), reset asserts for the reset timeout period. The internal 1.6s timer can be cleared by either a reset pulse or by toggling WDI. The WDI can detect pulses as short as 50ns. While reset is asserted, the timer remains cleared and does not count. As soon as reset is released, the timer starts counting (Figure 4). Disable the watchdog function by leaving WDI unconnected or by three-stating the driver connected to WDI. The watchdog input is internally driven low during the first 7/8 of the watchdog timeout period and high for the last 1/8 of the watchdog timeout period. When WDI is left unconnected, this internal driver clears the 1.6s timer every 1.4s. When WDI is three-stated or unconnected, Note that RSTIN is powered by VCC, and its voltage must therefore remain lower than VCC. Applications Information Watchdog Input Current The WDI inputs are internally driven through a buffer and series resistor from the watchdog timer (Figure 1). When WDI is left unconnected, the watchdog timer is serviced within the watchdog timeout period by a lowhigh-low pulse from the counter chain. For minimum watchdog input current (minimum overall power consumption), leave WDI low for the majority of the watchdog timeout period, pulsing it low-high-low once within the first 7/8 of the watchdog timeout period to reset the watchdog timer. If WDI is externally driven high for the majority of the timeout period, up to 160µA can flow into WDI. Interfacing to µPs with Bidirectional Reset Pins Since the RESET output on the MAX6828/MAX6831 is open drain, these devices interface easily with µPs that have bidirectional reset pins, such as the Motorola 68HC11. Connecting the µP supervisor’s RESET output _______________________________________________________________________________________ 9 MAX6826–MAX6831 VCC MAX6826–MAX6831 Dual Ultra-Low-Voltage SOT23 µP Supervisors with Manual Reset and Watchdog Timer directly to the microcontroller’s RESET pin with a single pullup resistor allows the device to assert a reset (Figure 6). Negative-Going VCC Transients These supervisors are relatively immune to short-duration, negative-going V CC transients (glitches), which usually do not require the entire system to shut down. Resets are issued to the µP during power-up, powerdown, and brownout conditions. The Typical Operating Characteristics show a graph of the Maximum VCC Transient Duration vs. Reset Threshold Overdrive, for which reset pulses are not generated. The graph was produced using negative-going VCC pulses, starting at the standard monitored voltage and ending below the reset threshold by the magnitude indicated (reset threshold overdrive). The graph shows the maximum pulse width that a negative-going VCC transient can typically have without triggering a reset pulse. As the amplitude of the transient increases (i.e., goes farther below the reset threshold), the maximum allowable pulse width decreases. Typically, a VCC transient that goes 100mV below the reset threshold and lasts for 20µs or less will not trigger a reset pulse. Watchdog Software Considerations One way to help the watchdog timer monitor software execution more closely is to set and reset the watchdog input at different points in the program, rather than pulsing the watchdog input high-low-high or low-highlow. This technique avoids a stuck loop, in which the watchdog timer would continue to be reset inside the loop, keeping the watchdog from timing out. Figure 8 shows an example of a flow diagram where the I/O driving the watchdog input is set high at the beginning of the program, set low at the beginning of every subroutine or loop, then set high again when the program returns to the beginning. If the program should hang in any subroutine, the problem would quickly be corrected, since the I/O is continually set low and the watchdog timer is allowed to time out, causing a reset or interrupt to be issued. As described in the Watchdog Input Current section, this scheme results in higher time average WDI input current than does leaving WDI low for the majority of the timeout period and periodically pulsing it low-high-low. Ensuring a Valid RESET Output Down to VCC = 0 The MAX6826–MAX6831 are guaranteed to operate properly down to VCC = 1V. In applications that require valid reset levels down to VCC = 0, a pulldown resistor to active-low outputs (push/pull only, Figure 7) and a pullup resistor to active-high outputs (push/pull only) will ensure that the reset line is valid while the reset output can no longer sink or source current. This scheme does not work with the open-drain outputs of the MAX6828/MAX6831. The resistor value used is not critical, but it must be small enough not to load the reset output when VCC is above the reset threshold. For falling slew rates greater than 1V/s, a 100kΩ is adequate. START SET WDI HIGH PROGRAM CODE SUBROUTINE OR PROGRAM LOOP SET WDI LOW VCC RETURN Figure 8. Watchdog Flow Diagram MAX6826 MAX6829 RESET GND R1 100kΩ Figure 7. RESET Valid to VCC = Ground Circuit 10 ______________________________________________________________________________________ Dual Ultra-Low-Voltage SOT23 µP Supervisors with Manual Reset and Watchdog Timer VCC THRESHOLD RESET THRESHOLD (V) VCC2 THRESHOLD RESET THRESHOLD (V) 2.313 L 4.63 Z M 4.38 Y 2.188 T 3.08 W 1.665 S 2.93 V 1.575 R 2.63 I 1.388 Z 2.32 H 1.313 Y 2.19 G 1.110 W 1.67 F 1.050 E 0.833 D 0.788 V 1.58 Selector Guide ACTIVE-LOW RESET ACTIVE-HIGH RESET OPEN-DRAIN RESET WATCHDOG INPUT MANUAL RESET INPUT FIXED VCC2 MONITOR ADJUSTABLE RESET INPUT MAX6826 ✔ — — ✔ ✔ — ✔ MAX6827 — ✔ — ✔ ✔ — ✔ MAX6828 — — ✔ ✔ ✔ — ✔ MAX6829 ✔ — — ✔ ✔ ✔ — MAX6830 — ✔ — ✔ ✔ ✔ — MAX6831 — — ✔ ✔ ✔ ✔ — FUNCTION Standard Versions Table* (continued) MAX6829/MAX6830/MAX6831 VCC 3.3V Chip Information TRANSISTOR COUNT: 750 PROCESS TECHNOLOGY: BiCMOS VCC2 2.5V 1.8V — TZ — — 2.5V SV ZW — 1.8V SH YH WI 1.5V SF YG VF 1.2V SD YD VD 0.9V *Samples are typically available for standard versions only. For the MAX6829/MAX6830/MAX6831, standard versions require a 2.5k minimum order increment, while nonstandard versions require a 10k minimum order increment and are not typically available in samples. Contact factory for availability. Typical Operating Circuit VCC CORE SUPPLY VCC2 I/O SUPPLY VCC VCC2 RESET MAX6829 MAX6830 MAX6831 WDI MANUAL RESET MR RESET µP I/O GND ______________________________________________________________________________________ 11 MAX6826–MAX6831 Threshold Suffix Guide Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 6LSOT.EPS MAX6826–MAX6831 Dual Ultra-Low-Voltage SOT23 µP Supervisors with Manual Reset and Watchdog Timer PACKAGE OUTLINE, SOT 6L BODY 21-0058 G 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
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