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MAX6846KAZD3+T

MAX6846KAZD3+T

  • 厂商:

    AD(亚德诺)

  • 封装:

    SOT23-8

  • 描述:

    IC BATT MON MULT-CHEM 1C SOT23-8

  • 数据手册
  • 价格&库存
MAX6846KAZD3+T 数据手册
19-2947; Rev 1; 11/05 Low-Power, Adjustable Battery Monitors with Hysteresis and Integrated µP Reset The MAX6846–MAX6849 are a family of ultra-low-power battery monitors with integrated microprocessor (µP) supervisors. The user-adjustable battery monitors are offered with single or dual low-battery output options that can be used to signal when the battery is OK (enabling full system operation), when the battery is low (for lowpower system operation), and when the battery is dead (to disable system operation). These devices also have an independent µP supervisor that monitors VCC and provides an active-low reset output. A manual reset function is available to reset the µP with a pushbutton. The MAX6846–MAX6849 are ideal for single-cell lithiumion (Li+) or multicell alkaline/NiCd/NiMH applications. When the battery voltage drops below each adjusted low threshold, the low-battery outputs are asserted to alert the system. When the voltage rises above the adjusted high thresholds, the outputs are deasserted after a 150ms minimum timeout period, ensuring the voltages have stabilized before power circuitry is activated or providing microprocessor reset timing. These devices have user-adjustable battery threshold voltages, providing a wide hysteresis range to prevent chattering that can result due to battery recovery after load removal. Single low-battery outputs are supplied by the MAX6846/MAX6847 and dual low-battery outputs are supplied by the MAX6848/MAX6849. All battery monitors have open-drain low-battery outputs. The MAX6846–MAX6849 monitor system voltages (VCC) from 1.8V to 3.3V with seven fixed reset threshold options. Each device is offered with two minimum reset timeout periods of 150ms or 1200ms. The MAX6846/ MAX6848 are offered with an open-drain RESET output and the MAX6847/MAX6849 are offered with a pushpull RESET output. The MAX6846–MAX6849 are offered in a SOT23 package and are fully specified over a -40°C to +85°C temperature range. Features ♦ User-Adjustable Thresholds for Monitoring Single-Cell Li+ or Multicell Alkaline/NiCd/NiMH Applications ♦ Single and Dual Low-Battery Output Options ♦ Independent µP Reset with Manual Reset ♦ Factory-Set Reset Thresholds for Monitoring 1.8V to 3.3V Systems ♦ Available with 150ms (min) or 1.2s (min) VCC Reset Timeout Period Options ♦ 150ms (min) LBO Timeout Period ♦ Immune to Short-Battery Voltage Transients ♦ Low Current (2.5µA, typ at 3.6V) ♦ -40°C to +85°C Operating Temperature Range ♦ Small 8-Pin SOT23 Packages Ordering Information TEMP RANGE PIN-PACKAGE MAX6846KA_D_-T PART -40°C to +85°C 8 SOT23-8 MAX6847KA_D_-T -40°C to +85°C 8 SOT23-8 MAX6848KA_D_-T -40°C to +85°C 8 SOT23-8 MAX6849KA_D_-T -40°C to +85°C 8 SOT23-8 Note: The first “_” is the VCC reset threshold level, suffix found in Table 1. The “_” after the D is a placeholder for the reset timeout period suffix found in Table 2. All devices are available in tape-and-reel only. There is a 2500 piece minimum order increment for standard versions (see Standard Versions table). Sample stock is typically held on standard versions only. Nonstandard versions require a minimum order increment of 10,000 pieces. Contact factory for availability. Devices are available in both leaded and lead-free packaging. Specify lead-free by replacing “-T” with “+T” when ordering. Applications Battery-Powered Systems (Single-Cell Li+ or Multicell NiMH, NiCd, Alkaline) Cell Phones/Cordless Phones Portable Medical Devices Digital Cameras Pagers PDAs MP3 Players Electronic Toys Pin Configurations TOP VIEW VDD 1 GND 2 LTHIN 3 MAX6846 MAX6847 LBO 4 SOT23 8 VCC VDD 1 7 HTHIN GND 2 6 MR LTHIN 5 RESET LBOL 4 3 MAX6848 MAX6849 8 VCC 7 HTHIN 6 LBOH 5 RESET SOT23 ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX6846–MAX6849 General Description MAX6846–MAX6849 Low-Power, Adjustable Battery Monitors with Hysteresis and Integrated µP Reset ABSOLUTE MAXIMUM RATINGS VDD, VCC to GND ....................................................-0.3V to +6V* Open-Drain LBO, LBOH, LBOL to GND .................-0.3V to +6V* Open-Drain RESET to GND ....................................-0.3V to +6V* Push-Pull RESET to GND............................-0.3V to (VCC + 0.3V) HTHIN, LTHIN to GND................................-0.3V to (VDD + 0.3V) MR to GND .................................................-0.3V to (VCC + 0.3V) Input/Output Current, All Pins .............................................20mA *Applying 7V for a duration of 1ms does not damage the device. Continuous Power Dissipation (TA = +70°C) 8-Pin SOT23 (derate 8.9mW/°C above +70°C)............714mW Operating Temperature Range .......................... -40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = 1.6V to 5.5V, VCC = 1.2V to 5.5V, TA = -40°C to +85°C, unless otherwise specified. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL VDD Operating Voltage Range VDD VCC Operating Voltage Range VCC VCC + VDD Supply Current ICC + IDD CONDITIONS MIN MAX UNITS 1.6 5.5 V TA = 0°C to +85°C 1.0 5.5 TA = -40°C to +85°C 1.2 5.5 VDD = 3.6V, VCC = 3.3V, no load (Note 2) TYP V 2.5 7 µA MAX6846/MAX6847 VDD THRESHOLDS HTHIN Threshold VHTH HTHIN rising, LBO is deasserted when HTHIN rises above VHTH 600 615 630 mV LTHIN Threshold VLTH LTHIN falling, LBO is asserted when LTHIN falls below VLTH 600 615 630 mV MAX6848/MAX6849 VDD THRESHOLDS HTHIN+ Threshold VHTH+ HTHIN rising, LBOH is deasserted when HTHIN rises above VHTH+ 600 615 630 mV HTHIN- Threshold VHTH- HTHIN falling, LBOH is asserted when HTHIN falls below VHTH- 567 582 597 mV LTHIN+ Threshold VLTH+ LTHIN rising, LBOL is deasserted when LTHIN rises above VLTH+ 600 615 630 mV LTHIN- Threshold VLTH- LTHIN falling, LBOL is asserted when LTHIN falls below VLTH- 567 582 597 mV HTHIN/LTHIN Leakage Current ILKG VHTHIN or VLTHIN ≥ 400mV 20 nA LBO, LBOL, LBOH Timeout Period tLBOP HTHIN/LTHIN rising above threshold 150 225 300 ms LBO, LBOL, LBOH Delay Time tLBOD HTHIN/LTHIN falling below threshold MAX6846–MAX6849 LBO, LBOL, LBOH Output Low 2 VOL 100 µs (VDD or VCC) ≥ 1.2V, ISINK = 50µA, asserted low 0.3 (VDD or VCC) ≥ 1.6V, ISINK = 100µA, asserted low 0.3 (VDD or VCC) ≥ 2.7V, ISINK = 1.2mA, asserted low 0.3 (VDD or VCC) ≥ 4.5V, ISINK = 3.2mA, asserted low 0.3 _______________________________________________________________________________________ V Low-Power, Adjustable Battery Monitors with Hysteresis and Integrated µP Reset MAX6846–MAX6849 ELECTRICAL CHARACTERISTICS (continued) (VDD = 1.6V to 5.5V, VCC = 1.2V to 5.5V, TA = -40°C to +85°C, unless otherwise specified. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL LBO, LBOL, LBOH Output Open-Drain Leakage Current VCC Reset Threshold CONDITIONS MIN TYP Output deasserted VTH tRD VCC to RESET Timeout Period tRP nA 3.000 3.075 3.150 2.850 2.925 3.000 MAX68_ _ _ _ R 2.550 2.625 2.700 MAX68_ _ _ _ Z 2.250 2.313 2.375 MAX68_ _ _ _ Y 2.125 2.188 2.250 MAX68_ _ _ _ W 1.620 1.665 1.710 MAX68_ _ _ _ V 1.530 1.575 1.620 VCC falling at 10mV/µs from (VTH + 100mV) to (VTH - 100mV) % 50 µs 150 225 300 MAX68_ _ _ _ _ D7 1200 1800 2400 0.3 x VCC 0.7 x VCC tMPW V 0.3 MAX68_ _ _ _ _ D3 VIH MR Minimum Pulse Width 500 MAX68_ _ _ _ S VIL MR Input Voltage UNITS MAX68_ _ _ _ T VCC Reset Hysteresis VCC to RESET Delay MAX 1 ms V µs MR Glitch Rejection 100 ns MR to RESET Delay 200 ns MR Reset Timeout Period tMRP MR Pullup Resistance MR Rising Debounce Period RESET Output High (Push-Pull) tDEB VOH RESET Output Low VOL RESET Output Leakage Current (Open Drain) 150 225 300 ms MR to VCC 750 1500 2250 Ω (Note 3) 150 225 300 ms VCC ≥ 1.53V, ISOURCE = 100µA, RESET deasserted 0.8 x VCC VCC ≥ 2.55V, ISOURCE = 500µA, RESET deasserted 0.8 x VCC V VCC ≥ 1.0V, ISINK = 50µA, RESET asserted 0.3 VCC ≥ 1.2V, ISINK = 100µA, RESET asserted 0.3 VCC ≥ 2.12V, ISINK = 1.2mA, RESET asserted 0.3 RESET deasserted 500 V nA Note 1: Production testing done at TA = +25°C; limits over temperature guaranteed by design only. Note 2: The device is powered up by the highest voltage between VDD and VCC. Note 3: MR input ignores falling input pulses, which occur within the MR debounce period (tDEB) after a valid MR reset assertion. This prevents invalid reset assertion due to switch bounce. _______________________________________________________________________________________ 3 Typical Operating Characteristics (VDD = 3.6V, VCC = 3.3V, unless otherwise specified. Typical values are at TA = +25°C.) IDD ICC 1 0 -40 -20 0 20 40 80 60 1.05 1.00 0.95 -40 -20 0 20 40 0.950 -40 80 60 -20 LBO ASSERTS ABOVE THIS LINE 100 90 80 70 60 20 40 MAXIMUM VCC TRANSIENT DURATION vs. THRESHOLD OVERDRIVE 100 MAXIMUM VCC TRANSIENT DURATION (µs) 110 MAX6846-49 toc04 120 0 TEMPERATURE (°C) TEMPERATURE (°C) MAXIMUM VLTH/VHTH TRANSIENT DURATION vs. THRESHOLD OVERDRIVE MAXIMUM VLTH/VHTH TRANSIENT DURATION (µs) 1.000 0.900 0.90 TEMPERATURE (°C) 90 80 RESET OCCURS ABOVE THIS LINE 70 60 50 40 30 20 10 100 THRESHOLD OVERDRIVE (mV) 4 1.050 MAX6846-49 toc05 TOTAL 1.100 NORMALIZED RESET TIMEOUT PERIOD 3 1.10 MAX6846-49 toc02 VCC = 3.3V, VDD = 3.6V NORMALIZED LBO TIMEOUT PERIOD MAX6846-49 toc01 4 2 NORMALIZED RESET TIMEOUT PERIOD vs. TEMPERATURE NORMALIZED LBO TIMEOUT PERIOD vs. TEMPERATURE MAX6846-49 toc03 SUPPLY CURRENT vs. TEMPERATURE SUPPLY CURRENT (µA) MAX6846–MAX6849 Low-Power, Adjustable Battery Monitors with Hysteresis and Integrated µP Reset 1000 10 100 THRESHOLD OVERDRIVE (mV) _______________________________________________________________________________________ 1000 60 80 Low-Power, Adjustable Battery Monitors with Hysteresis and Integrated µP Reset 0.975 0.950 MAX6846-49 toc07 120 1.025 VCC = VDD = 3.3V 100 LBO OUTPUT (mV) 1.000 LBO OUTPUT vs. SINK CURRENT 1.050 NORMALIZED RESET THRESHOLD MAX6846-49 toc06 1.025 1.000 0 20 40 60 80 60 40 20 0 -40 TEMPERATURE (°C) -20 0 20 40 60 80 0 2 TEMPERATURE (°C) 4 6 8 10 ISINK (mA) RESET OUTPUT vs. SOURCE CURRENT RESET OUTPUT vs. SINK CURRENT 3.50 MAX6846-49 toc09 140 VCC = 2.1V, VDD = 3.6V 120 VCC = 3.3V, VDD = 3.6V 3.25 RESET OUTPUT (V) 100 80 60 40 MAX6846-49 toc10 -20 80 0.975 0.950 -40 RESET OUTPUT (mV) NORMALIZED LBO TRIP VOLTAGES 1.050 NORMALIZED RESET THRESHOLD vs. TEMPERATURE MAX6846-49 toc08 NORMALIZED UPPER AND LOWER LBO TRIP VOLTAGES vs. TEMPERATURE 3.00 2.75 20 0 2.50 0 2 4 6 ISINK (mA) 8 10 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 ISOURCE (mA) _______________________________________________________________________________________ 5 MAX6846–MAX6849 Typical Operating Characteristics (continued) (VDD = 3.6V, VCC = 3.3V, unless otherwise specified. Typical values are at TA = +25°C.) MAX6846–MAX6849 Low-Power, Adjustable Battery Monitors with Hysteresis and Integrated µP Reset Pin Description PIN MAX6846/MAX6847 MAX6848/MAX6849 NAME 1 1 VDD 2 2 GND FUNCTION VDD Supply. Device power supply if VDD is greater than VCC. Ground LTH Threshold Monitor Input. A resistor-divider network sets the low threshold associated with LBOL and LBO. 3 3 LTHIN 4 — LBO Low-Battery Output, Active-Low, Open-Drain. LBO is asserted when LTHIN drops below the VLTH specification and remains asserted until HTHIN rises above the VHTH specification for at least 150ms. RESET Reset Output, Active-Low, Push-Pull, or Open-Drain. RESET goes from high to low when the VCC input drops below the selected reset threshold and remains low for the VCC reset timeout period after VCC exceeds the reset threshold. RESET is one-shot edge-trigger pulsed low for the MR reset timeout period when the MR input is pulled low. RESET is an open-drain output for the MAX6846/MAX6848, and a push-pull output for the MAX6847/MAX6849. The push-pull outputs are referenced to VCC. RESET is guaranteed to be in the correct logic state for VDD or VCC ≥ 10V. 5 5 Manual Reset Input, Active-Low, Internal 1.5kΩ Pullup to VCC. Pull MR low to assert a one-shot reset output pulse for the MR reset timeout period. Leave unconnected or connect to VCC if unused. The MR input is debounced for MR rising edges to prevent false reset events. 6 — MR 7 7 HTHIN 8 8 VCC VCC Voltage Input. Input for VCC reset threshold monitor and device power supply if VCC is greater than VDD. — 6 LBOH Low-Battery Output High, Active-Low, Open-Drain. LBOH is asserted when HTHIN drops below the VHTH- specification. LBOH is deasserted when HTHIN rises above the VHTH+ specification for at least 150ms. — 4 LBOL Low-Battery Output Low, Active-Low, Open-Drain. LBOL is asserted when LTHIN drops below the VLTH- specification. LBOL is deasserted when LTHIN rises above the VLTH+ specification for at least 150ms. HTH Threshold Monitor Input. A resistor-divider network sets the high threshold associated with LBOH and LBO. Detailed Description The MAX6846–MAX6849 family is available with several monitoring options. The MAX6846/MAX6847 have single low-battery outputs and the MAX6848/MAX6849 have dual low-battery outputs (see Figures 1a and 1b). The MAX6846–MAX6849 combine a 615mV reference with two comparators, logic, and timing circuitry to provide the user with information about the charge state of the power-supply batteries. The MAX6848/MAX6849 monitor separate high-voltage and low-voltage thresholds to determine battery status. The output(s) can be used to signal when the battery is charged, when the battery is low, and when the battery is empty. User6 adjustable thresholds are ideal for monitoring singlecell Li+ or multicell alkaline/NiCd/NiMH power supplies. When the power-supply voltage drops below the specified low threshold, the low-battery output asserts. When the voltage rises above the specified high threshold following a 150ms (min) timeout period, the low-battery output is deasserted. This ensures the supply voltage has stabilized before power-converter or microprocessor activity is enabled. These devices also have an independent µP supervisor that monitors VCC and provides an active-low reset output. A manual reset function is available to allow the user to reset the µP with a pushbutton. _______________________________________________________________________________________ Low-Power, Adjustable Battery Monitors with Hysteresis and Integrated µP Reset VDD MAX6847 MAX6848 LTHIN LTH DETECT LTH DETECT HTHIN R Q S Q HTHIN LBO TIMEOUT PERIOD LBO HTH DETECT LBOL 5% HYST LBO TIMEOUT PERIOD LBOH HTH DETECT 5% HYST 615mV 615mV VCC VCC VTH DETECT VCC RESET RESET TIMEOUT PERIOD RESET VTH DETECT RESET TIMEOUT PERIOD VCC 1.23V 1.23V MR Figure 1a. MAX6847 Functional Diagram Low-Battery Output The low-battery outputs are available in active-low (LBO, LBOL, LBOH), open-drain configurations. The low-battery outputs can be pulled to a voltage independent of VCC or VDD, up to 5.5V. This allows the device to monitor and operate from direct battery voltage while interfacing to higher voltage microprocessors. The MAX6846/MAX6847 single-output voltage monitors provide a single low-battery output, LBO. LBO asserts when LTHIN drops below VLTH and remains asserted for at least 150ms after HTHIN rises above VHTH (see Figure 2). The MAX6848/MAX6849 dual-output voltage monitors provide two low-battery outputs: LBOH and LBOL. LBOH asserts when HTHIN drops below VHTHand remains asserted for at least 150ms after HTHIN Figure 1b. MAX6848 Functional Diagram rises above VHTH+. LBOL asserts when LTHIN drops below VLTH- and remains asserted for at least 150ms after LTHIN rises above VLTH+ (see Figure 3). For fastrising VDD input, the LBOL timeout period must complete before the LBOH timeout period begins. Reset Output The MAX6846–MAX6849 provide an active-low reset output (RESET). RESET is asserted when the voltage at VCC falls below the reset threshold level. Reset remains asserted for the reset timeout period after VCC exceeds the threshold. If VCC goes below the reset threshold before the reset timeout period is completed, the internal timer restarts (see Figure 4). The MAX6846/ MAX6848 have open-drain reset outputs, while the MAX6847/MAX6849 have push-pull reset outputs. _______________________________________________________________________________________ 7 MAX6846–MAX6849 VDD LTHIN MAX6846–MAX6849 Low-Power, Adjustable Battery Monitors with Hysteresis and Integrated µP Reset VMONITORED HTHIN = 615mV VTRIPHIGH HTH VHYST LTHIN = 615mV VTRIPLOW LTH tLBOP LBO tLBOD tLBOP VHYST = HYSTERESIS Figure 2. Single Low-Battery Output Timing (VTRIPHIGH +5%) HTH+ HTHVTRIPHIGH VMONITORED HTHIN = 615mV VHYST = 5% HTHIN = 582mV LTHIN = 615mV (VTRIPLOW +5%) LTH+ LTHVTRIPLOW VHYST = 5% LTHIN = 582mV LBOL tLBOD tLBOP LBOH tLBOP tLBOP tLBOD tLBOP VHYST = HYSTERESIS Figure 3. Dual Low-Battery Output Timing VCC VTH GND SWITCH BOUNCE MR SWITCH BOUNCE SWITCH BOUNCE SWITCH BOUNCE GND RESET tRP tMRP tMRP GND tDEB tMPW tDEB tMPW Figure 4. RESET Timing Diagram 8 _______________________________________________________________________________________ Low-Power, Adjustable Battery Monitors with Hysteresis and Integrated µP Reset Hysteresis Hysteresis increases the comparator’s noise margin by increasing the upper threshold or decreasing the lower threshold. The hysteresis prevents the output from oscillating (chattering) when monitor input is near the low-battery threshold. This is especially important for applications where the load on the battery creates significant fluctuations in battery voltages (see Figures 2 and 3). For the MAX6846/MAX6847, hysteresis is set using three external resistors (see Figure 5). The MAX6848/MAX6849 have dual, low-battery input levels. Each input level has a 5% (typ) hysteresis. Applications Information Resistor-Value Selection (Programming the Adjustable Thresholds) MAX6846/MAX6847 VLTH = VHTH = 615mV  R1 + R2 + R3  VTRIPLOW = VLTH ×    R2 + R3   R1 + R2 + R3  VTRIPHIGH = VHTH ×     R3 RTOTAL = R1 + R2 + R3 Use the following steps to determine values for R1, R2, and R3 of Figure 5. 1) Choose a value for RTOTAL, the sum of R1, R2, and R3. Because the MAX6846/MAX6847 have very high input impedance, RTOTAL can be up to 500kΩ. VDD MAX6846–MAX6849 Manual Reset Many microprocessor-based products require manual reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset while the monitored supplies remain above their reset thresholds. These devices have a dedicated active-low MR pin. When MR is pulled low, RESET asserts a one-shot low pulse for the MR reset timeout period. The MR input has an internal 1.5kΩ pullup resistor to VCC and can be left unconnected if not used. MR can be driven with CMOSlogic levels, open-drain/open-collector outputs, or a momentary pushbutton switch to GND (the MR function is internally debounced for the tDEB timeout period) to create a manual reset function. If MR is driven from long cables, or if the device is used in a noisy environment, connect a 0.1µF capacitor from MR to GND to provide additional noise immunity (see Figure 4). LBO* VDD R1 LTHIN MAX6846 MAX6847 MAX6848 MAX6849 (LBOH) (LBOL) R2 HTHIN GND R3 * FOR THE MAX6846/MAX6847. ( ) FOR THE MAX6848/MAX6849. Figure 5. Adjustable Threshold Selection 2) Calculate R3 based on R TOTAL and the desired upper trip point: R3 = 615mV × RTOTAL VTRIPHIGH 3) Calculate R2 based on RTOTAL, R3, and the desired lower trip point:  615mV × RTOTAL  R2 =   - R3 VTRIPLOW   4) Calculate R1 based on RTOTAL, R3, and R2: R1 = RTOTAL - R2 - R3 MAX6848/MAX6849 VLTH- = VHTH- = 582mV LBOL low-trip level:  R1 + R2 + R3  VTRIPLOW = VLTH- ×    R2 + R3  LBOH low-trip level:  R1 + R2 + R3  VTRIPHIGH = VHTH- ×     R3 RTOTAL = R1 + R2 + R3 Use the following steps to determine values for R1, R2, and R3 of Figure 5. _______________________________________________________________________________________ 9 MAX6846–MAX6849 Low-Power, Adjustable Battery Monitors with Hysteresis and Integrated µP Reset 1) Choose a value for RTOTAL, the sum of R1, R2, and R3. Because the MAX6848/MAX6849 have very high input impedance, RTOTAL can be up to 500kΩ. 2) Calculate R3 based on R TOTAL and the desired upper trip point: R3 = 582mV × RTOTAL VTRIPHIGH 3) Calculate R2 based on RTOTAL, R3, and the desired lower trip point: to three alkaline/NiCd/NiMH cells. The LBOH output indicates that the battery voltage is weak, and is used to warn the microprocessor of potential problems. Armed with this information, the microprocessor can reduce system power consumption. The LBOL output indicates the battery is empty and system power should be disabled. By connecting LBOL to the SHDN pin of the DC-DC converter, power to the microprocessor is removed. Microprocessor power does not return until the battery has recharged to a voltage greater than VLTH+ (see Figure 7). Table 1. Factory-Trimmed VCC Reset Threshold Levels  582mV × RTOTAL  R2 =   - R3 VTRIPLOW   PART NO. SUFFIX (_) VCC NOMINAL RESET THRESHOLD (V) T 3.075 5) LBOL high-trip level: S 2.925 VTRIPLOW ✕ 1.05 6) LBOH high-trip level: R 2.625 Z 2.313 Y 2.188 4) Calculate R1 based on RTOTAL, R3, and R2: R1 = RTOTAL - R2 - R3 VTRIPHIGH ✕ 1.05 Monitoring Multicell Battery Applications For monitoring multicell Li+ (or a higher number of alkaline/NiCd/NiMH cells), connect VDD to a supply voltage between 1.6V to 5.5V. Figure 6 shows VDD connected directly to VCC. To calculate the values of R1, R2, and R3, see the Resistor-Value Selection section. DC-DC Converter Application VMONITORED LBO* R1 LTHIN R2 MAX6846 MAX6847 MAX6848 MAX6849 1.575 ACTIVE TIMEOUT PERIOD (ms) TIMEOUT PERIOD SUFFIX VCC VCC 1.665 V Table 2. VCC Reset Timeout Period Suffix Guide The MAX6848/MAX6849 dual battery monitors can be used in conjunction with a DC-DC converter to power microprocessor systems using a single Li+ cell or two VDD W MIN D3 150 300 D7 1200 2400 IN DC-DC SHDN OUT VDD LBOL VCC Li+ 3.6V LBOH VCC NMI (LBOL) LTHIN µP (LBOH) HTHIN MAX GND MAX6848 MAX6849 RESET HTHIN RESET R3 GND * FOR THE MAX6846/MAX6847. ( ) FOR THE MAX6848/MAX6849. Figure 6. Monitoring Multicell Li+ Applications 10 Figure 7. DC-DC Converter Application ______________________________________________________________________________________ GND Low-Power, Adjustable Battery Monitors with Hysteresis and Integrated µP Reset OPEN-DRAIN RESET PUSH-PULL RESET SINGLE LOWBATTERY OUTPUT DUAL LOW-BATTERY OUTPUT MAX6846 X — X — MAX6847 — X X — MAX6848 X — — X MAX6849 — X — X PART Typical Application Circuit Standard Versions Table PART TOP MARK MAX6846KARD3 AEJI MAX6846KASD3 AEJD MAX6846KAWD3 AEJK MAX6846KAZD3 AEJJ MAX6847KARD3 AEJE MAX6847KASD3 AEJL MAX6847KAWD3 AEJN MAX6847KAZD3 AEJM MAX6848KARD3 AEJP MAX6848KASD3 AEJO MAX6848KAWD3 AEJR MAX6848KAZD3 AEJQ MAX6849KARD3 AEJT MAX6849KASD3 AEJS MAX6849KAWD3 AEJV MAX6849KAZD3 AEJU DC-DC Li+ 3.6V VCC VCC LBO MR VDD MAX6846 MAX6847 RESET LTHIN NMI µP RESET HTHIN GND GND Chip Information TRANSISTOR COUNT: 1478 PROCESS: BiCMOS ______________________________________________________________________________________ 11 MAX6846–MAX6849 Selector Guide Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) SEE DETAIL "A" b CL CL E MIN MAX A A1 A2 0.90 0.00 0.90 1.45 0.15 1.30 b 0.28 0.45 C D E 0.09 2.80 2.60 0.20 3.00 3.00 SYMBOL e CL E1 E1 1.50 L 0.30 L2 e PIN 1 I.D. DOT (SEE NOTE 6) SOT23, 8L .EPS MAX6846–MAX6849 Low-Power, Adjustable Battery Monitors with Hysteresis and Integrated µP Reset 1.75 0.60 0.25 BSC. 0.65 BSC. 1.95 REF. 0∞ 8∞ e1 0 e1 D C CL L2 A A2 GAUGE PLANE A1 SEATING PLANE C 0 L NOTE: 1. ALL DIMENSIONS ARE IN MILLIMETERS. 2. FOOT LENGTH MEASURED FROM LEAD TIP TO UPPER RADIUS OF HEEL OF THE LEAD PARALLEL TO SEATING PLANE C. 3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH & METAL BURR. 4. PACKAGE OUTLINE INCLUSIVE OF SOLDER PLATING. DETAIL "A" 5. COPLANARITY 4 MILS. MAX. 6. PIN 1 I.D. DOT IS 0.3 MM ÿ MIN. LOCATED ABOVE PIN 1. 7. SOLDER THICKNESS MEASURED AT FLAT SECTION OF LEAD BETWEEN 0.08mm AND 0.15mm FROM LEAD TIP. 8. MEETS JEDEC MO178. PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE, SOT-23, 8L BODY APPROVAL DOCUMENT CONTROL NO. 21-0078 REV. D 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
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