MAX9218ECM/V+TGB

EVALUATION KIT AVAILABLE Click here for production status of specific part numbers. MAX9218 27-Bit, 7MHz-to-35MHz DC-Balanced LVDS Deserializer General Description The MAX9218 digital video serial-to-parallel converter deserializes a total of 27 bits during data and control phases. In the data phase, the LVDS serial input is converted to 18 bits of parallel video data and in the control phase, the input is converted to 9 bits of parallel control data. The separate video and control phases take advantage of video timing to reduce the serial data rate. The MAX9218 pairs with the MAX9217 serializer to form a complete digital video transmission system. Proprietary data decoding reduces EMI and provides DC balance. The DC balance allows AC coupling, providing isolation between the transmitting and receiving ends of the interface. The MAX9218 features a selectable rising or falling output latch edge. ESD tolerance is specified for ISO 10605 with ±10kV contact discharge and ±30kV air discharge. The MAX9218 operates from a +3.3V core supply and features a separate output supply for interfacing to 1.8V to 3.3V logic-level inputs. This device is available in 48lead Thin QFN and LQFP packages and is specified from -40°C to +85°C. Applications ● ● ● ● Features ● Proprietary Data Decoding for DC Balance and Reduced EMI ● Control Data Deserialized During Video Blanking ● Five Control Data Inputs Are Single Bit-Error Tolerant ● Output Transition Time Is Scaled to Operating Frequency for Reduced EMI ● Staggered Output Switching Reduces EMI ● Output Enable Allows Busing of Outputs ● Clock Pulse Stretch on Lock ● Wide ±2% Reference Clock Tolerance ● Synchronizes to MAX9217 Serializer Without External Control ● ISO 10605 ESD Protection ● Separate Output Supply Allows Interface to 1.8V to 3.3V Logic ● +3.3V Core Power Supply ● Space-Saving Thin QFN and LQFP Packages ● -40°C to +85°C Operating Temperature Ordering Information appears at end of data sheet. Navigation System Display In-Vehicle Entertainment System Video Camera LCD Displays MAX9218 18 44 17 45 16 46 15 47 14 48 13 25 26 PCLK_OUT LOCK VCCO VCCO GND RGB_OUT8 RGB_OUT9 RGB_OUT10 39 22 40 21 41 20 RGB_OUT11 RGB_OUT12 42 RGB_OUT13 RGB_OUT14 RGB_OUT15 44 17 45 16 46 15 RGB_OUT16 47 RGB_OUT17 48 19 MAX9218 43 18 14 + 13 11 12 10 REFCLK THIN QFN-EP 9 8 7 6 PLL GND VCCPLL RNG0 GND VCC 5 4 3 1 19-3557; Rev 6; 1/19 27 28 23 R/F RNG1 VCCLVDS IN+ INLVDS GND REFCLK R/F RNG1 VCCLVDS IN+ INLVDS GND PLL GND VCCPLL RNG0 GND VCC LQFP 29 24 38 12 11 10 9 8 7 6 5 4 3 2 + 37 VCCO GND VCCO 2 43 30 19 31 20 42 RGB_OUT4 RGB_OUT3 RGB_OUT2 RGB_OUT1 RGB_OUT0 41 32 21 33 22 40 RGB_OUT7 RGB_OUT6 RGB_OUT5 39 DE_OUT CNTL_OUT8 CNTL_OUT7 CNTL_OUT6 CNTL_OUT5 CNTL_OUT4 CNTL_OUT3 CNTL_OUT2 CNTL_OUT1T CNTL_OUT0 OUTEN PWRDWN 34 23 35 24 38 36 25 26 27 28 29 30 31 32 33 37 1 VCCOGND VCCO RGB_OUT8 RGB_OUT9 RGB_OUT10 RGB_OUT11 RGB_OUT12 RGB_OUT13 RGB_OUT14 RGB_OUT15 RGB_OUT16 RGB_OUT17 34 36 TOP VIEW 35 RGB_OUT7 RGB_OUT6 RGB_OUT5 RGB_OUT4 RGB_OUT3 RGB_OUT2 RGB_OUT1 RGB_OUT0 PCLK_OUT LOCK VCCO VCCOGND Pin Configurations DE_OUT CNTL_OUT8 CNTL_OUT7 CNTL_OUT6 CNTL_OUT5 CNTL_OUT4 CNTL_OUT3 CNTL_OUT2 CNTL_OUT1 CNTL_OUT0 OUTEN PWRDWN MAX9218 27-Bit, 7MHz-to-35MHz DC-Balanced LVDS Deserializer Absolute Maximum Ratings VCC_ to _GND.......................................................-0.5V to +4.0V Any Ground to Any Ground...................................-0.5V to +0.5V IN+, IN- to LVDS GND..........................................-0.5V to +4.0V IN+, IN- Short Circuit to LVDS GND or VCCLVDS......Continuous IN+, IN- Short Through 0.125μF (or smaller), 25V Series Capacitor.........................................-0.5V to +16V (R/F, OUTEN, RNG_, REFCLK, PWRDWN) to GND............................... -0.5V to (VCC + 0.5V) (RGB_OUT[17:0], CNTL_OUT[8:0], DE_OUT, PCLK_OUT, LOCK) to VCCO GND..........................-0.5V to (VCCO + 0.5V) Continuous Power Dissipation (TA = +70°C) 48-Lead LQFP (derate 21.7mW/°C above +70°C).....1739mW 48-Lead Thin QFN (derate 37mW/°C above +70°C).2963mW ESD Protection Machine Model (RD = 0Ω, CS = 200pF) All Pins to GND..............................................................±200V Human Body Model (RD = 1.5kΩ, CS = 100pF) All Pins to GND.............................................................±3.0kV ISO 10605 (RD = 2kΩ, CS = 330pF) Contact Discharge (IN+, IN-) to GND.............................±10kV Air Discharge (IN+, IN-) to GND.....................................±30kV Storage Temperature Range............................. -65°C to +150°C Junction Temperature.......................................................+150°C Lead Temperature (soldering, 10s).................................. +300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics (VCC_ = +3.0V to +3.6V, PWRDWN = high, differential input voltage │VID│ = 0.05V to 1.2V, input common-mode voltage VCM = │VID/2 │ to VCC - │VID/2│, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC_ = +3.3V, │VID│ = 0.2V, VCM = 1.2V, TA = +25°C.) (Notes 1, 2) PARAMETER SYMBOL CONDITIONS MIN TYP SINGLE-ENDED INPUTS (R/F, OUTEN, RNG0, RNG1, REFCLK, PWRDWN) MAX UNITS High-Level Input Voltage VIH 2.0 VCC + 0.3 V Low-Level Input Voltage VIL -0.3 +0.8 V Input Current IIN VIN = -0.3V to (VCC + 0.3V), PWRDWN = high or low -70 +70 µA Input Clamp Voltage VCL ICL = -18mA -1.5 V SINGLE-ENDED OUTPUTS (RGB_OUT[17:0], CNTL_OUT[8:0], DE_OUT, PCLK_OUT, LOCK) High-Level Output Voltage Low-Level Output Voltage High-Impedance Output Current www.maximintegrated.com VOH VOL IOZ IOH = -100µA VCCO - 0.1 IOH = -2mA, RNG1, RNG0 = high VCCO - 0.35 IOH = -2mA, RNG1, RNG0 both not high simultaneously VCCO - 0.4 V IOL = 100µA 0.1 IOL = 2mA, RNG1, RNG0 = high 0.3 IOL = 2mA, RNG1, RNG0 both not high simultaneously 0.35 PWRDWN = low or OUTEN = low, VO = -0.3V to VCCO + 0.3V -10 +10 V µA Maxim Integrated │  2 MAX9218 27-Bit, 7MHz-to-35MHz DC-Balanced LVDS Deserializer DC Electrical Characteristics (continued) (VCC_ = +3.0V to +3.6V, PWRDWN = high, differential input voltage │VID│ = 0.05V to 1.2V, input common-mode voltage VCM = │VID/2 │ to VCC - │VID/2│, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC_ = +3.3V, │VID│ = 0.2V, VCM = 1.2V, TA = +25°C.) (Notes 1, 2) PARAMETER SYMBOL Output Short-Circuit Current IOS Differential Input High Threshold VTH CONDITIONS MIN TYP MAX RNG1, RNG0 = high, VO = 0 -10 -50 RNG1, RNG0 both not high simultaneously, VO = 0 -7 -40 UNITS mA LVDS INPUT (IN+, IN-) Differential Input Low Threshold VTL Input Current IIN+, IIN- Input Bias Resistor RIB Power-Off Input Current IINO+, IINO- 50 -50 PWRDWN = high or low -20 PWRDWN = high or low 35 VCC_ = 0 or open, PWRDWN = 0 or open, Figure 1 35 VCC_ = 0 or open, PWRDWN = 0 or open -40 mV mV +20 µA 50 65 kΩ 50 65 kΩ +40 µA POWER SUPPLY Worst-Case Supply Current Power-Down Supply Current www.maximintegrated.com ICCW ICCZ CL = 8pF, worst-case pattern, Figure 2 RNG1 = high, RNG0 = low RNG1 = high, RNG0 = high (Note 3) 7MHz 25 15MHz 47 15MHz 37 35MHz 70 50 mA µA Maxim Integrated │  3 MAX9218 27-Bit, 7MHz-to-35MHz DC-Balanced LVDS Deserializer AC Electrical Characteristics (VCC_ = +3.0V to 3.6V, CL = 8pF, PWRDWN = high, differential input voltage │VID│ = 0.1V to 1.2V, input common-mode voltage VCM = │VID/2│ to VCC - │VID/2│, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC_ = +3.3V, │VID│ = 0.2V, VCM = 1.2V, TA = +25°C.) (Notes 4, 5) PARAMETER SYMBOL Period tT CONDITIONS MIN TYP MAX UNITS 333.00 ns 7 35 MHz -2.0 +2.0 % 60 % 6 ns REFCLK TIMING REQUIREMENTS Frequency fCLK Frequency Variation DfCLK Duty Cycle DC Transition Time tTRAN 28.57 REFCLK to serializer PCLK_IN 40 50 20% to 80% SWITCHING CHARACTERISTICS RNG1, RNG0 = high 3.2 4.4 RNG1, RNG0 both not high simultaneously 3.8 5.5 RNG1, RNG0 = high 2.7 4.5 RNG1, RNG0 both not high simultaneously 3.6 5.3 Output Rise Time tR Figure 3 ns Output Fall Time tF Figure 3 PCLK_OUT High Time tHIGH Figure 4 0.4 x tT 0.45 x tT 0.6 x tT ns PCLK_OUT Low Time tLOW Figure 4 0.4 x tT 0.45 x tT 0.6 x tT ns Data Valid Before PCLK_OUT tDVB Figure 5 0.35 x tT 0.4 x tT Data Valid After PCLK_OUT tDVA Figure 5 0.35 x tT 0.4 x tT 2.575 x tT + 8.5 ns ns ns 2.725 x tT + 12.8 ns Input-to-Output Delay tDELAY Figure 6 PLL Lock to REFCLK tPLLREF Figure 7 16385 x tT ns Power-Down Delay tPDD Figure 7 100 ns Output Enable Time tOE Figure 8 30 ns Output Disable Time tOZ Figure 9 30 ns Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground except VTH and VTL. Note 2: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production tested at TA = +25°C. Note 3: All LVTTL/LVCMOS inputs, except PWRDWN at ≤ 0.3V or ≥ VCC - 0.3V. PWRDWN is ≤ 0.3V. Note 4: AC parameters are guaranteed by design and characterization, and are not production tested. Limits are set at ±6 sigma. Note 5: CL includes probe and test jig capacitance. www.maximintegrated.com Maxim Integrated │  4 MAX9218 27-Bit, 7MHz-to-35MHz DC-Balanced LVDS Deserializer Typical Operating Characteristics (VCC_ = +3.3V, CL = 8pF, TA = +25°C, unless otherwise noted.) 60 50 40 30 20 6 4 2 0 0 7 11 15 19 23 27 31 35 RNG1 = RNG0 = HIGH 1.8 2.1 2.4 2.7 3.0 OUTPUT SUPPLY VOLTAGE (V) OUTPUT TRANSITION TIME vs. OUTPUT SUPPLY VOLTAGE (VCCO) BIT-ERROR RATE vs. CABLE LENGTH 10 -14 tR CAT5e 10 -13 BIT-ERROR RATE 5 tF 4 3 2 10 -12 10 -11 1 35MHz CLOCK 700Mbps DATA RATE FOR