19-5235; Rev 1; 2/11
Stereo Audio CODEC
with FlexSound Technology
Features
S 100dB DR Stereo DAC (8kHz < fS < 96kHz)
S 91dB DR Stereo ADC (8kHz < fS < 96kHz)
S Stereo Low EMI Class D Amplifiers
950mW/Channel (8I, VSPKVDD_ = 4.2V)
S Stereo DirectDrive Headphone Amplifiers
S Differential Receiver Amplifier
S 2 Stereo Single-Ended/Mono Differential Line
Inputs
S 3 Differential Microphone Inputs
S FlexSound Technology
5-Band Parametric EQ
Automatic Level Control (ALC)
Excursion Limiter
Speaker Power Limiter
Speaker Distortion Limiter
Microphone Automatic Gain Control
and Noise Gate
S Dual I2S/PCM/TDM Digital Audio Interfaces
S Asynchronous Digital Mixing
S Supports Master Clock Frequencies from 10MHz
to 60MHz
S RF Immune Analog Inputs and Outputs
S Extensive Click-and-Pop Reduction Circuitry
S I2C Control Interface
S 63 WLP Package (3.80mm x 3.30mm, 0.4mm Pitch)
The MAX9888 is a full-featured audio CODEC whose
high performance and low power consumption make it
ideal for portable applications.
Class D speaker amplifiers provide efficient amplification
for two speakers. Low radiated emissions enable completely filterless operation. Integrated bypass switches
optionally connect an external amplifier to the transducer
when the Class D amplifiers are disabled.
DirectDrive® headphone amplifiers provide a true
ground-referenced output, eliminating the need for
large DC-blocking capacitors. 1.8V headphone operation ensures low power consumption. The device also
includes a differential receiver amplifier.
Three differential analog microphone inputs are available
as well as support for two PDM digital microphones.
Integrated switches allow microphone signals to be
routed out to external devices. Two flexible single-ended
or differential line inputs may be connected to an FM
radio or other sources.
Integrated FlexSoundK technology improves loudspeaker performance by optimizing the signal level and
frequency response while limiting the maximum distortion and power at the output to prevent speaker damage.
Automatic gain control (AGC) and a noise gate optimize
the signal level of microphone input signals to make best
use of the ADC dynamic range.
Ordering Information
The device is fully specified over the -40NC to +85NC
extended temperature range.
PART
TEMP RANGE
PIN-PACKAGE
MAX9888EWY+
63 WLP
-40NC to +85NC
+Denotes lead(Pb)-free/RoHS-compliant package.
DirectDrive is a registered trademark and FlexSound is a
trademark of Maxim Integrated Products, Inc.
Simplified Block Diagram
I2C
I2S/PCM
I2S/PCM
CONTROL
DIGITAL
AUDIO
INTERFACE
DIGITAL
AUDIO
INTERFACE
RECEIVER AMP
DIGITAL MICROPHONE
INPUT
ADC
MIX
LINEIN A1
ADC
LINEIN A2
+
LINEIN B1
SPEAKER AMP
FlexSound TECHNOLOGY
• 5-BAND PARAMETRIC EQ
• AUTOMATIC LEVEL CONTROL
• LOUDSPEAKER PROCESSING
• EXCURSION LIMITER
• THD LIMITER
• POWER LIMITER
• MICROPHONE PROCESSING
• AUTOMATIC GAIN CONTROL
• NOISE GATE
• ASYNCHRONOUS DIGITAL
MIXING
DAC
SPEAKER AMP
MIX
DAC
HEADPHONE AMP
MAX9888
HEADPHONE AMP
LINEIN B2
+
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX9888
General Description
MAX9888
Stereo Audio CODEC
with FlexSound Technology
TABLE OF CONTENTS
General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Simplified Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Functional Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Digital Input/Output Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input Clock Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Audio Interface Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Digital Microphone Timing Characterstics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
I2C Timing Characterstics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Typical Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Microphone to ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Line to ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Digital Loopback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Analog Loopback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
DAC to Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Line to Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
DAC to Speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Line to Speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
DAC to Headphone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Line to Headphone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Speaker Bypass Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
I2C Slave Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Microphone Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Line Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
ADC Input Mixers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Record Path Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Microphone AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Noise Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
2
Stereo Audio CODEC
with FlexSound Technology
ADC Record Level Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Sidetone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Digital Audio Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Clock Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Passband Filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Playback Path Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Automatic Level Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Parametric Equalizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Playback Level Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
DAC Input Mixers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Preoutput Signal Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Preoutput Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Preoutput PGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Receiver Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Receiver Output Volume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Receiver Output Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Speaker Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Speaker Output Volume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Speaker Output Mixers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Speaker Amplifier Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Excursion Limiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Power Limiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Distortion Limiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Headphone Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Headphone Output Mixers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Headphone Output Volume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Output Bypass Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Click-and-Pop Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Jack Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Jack Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Accessory Button Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Jack Removal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
3
MAX9888
TABLE OF CONTENTS (continued)
MAX9888
Stereo Audio CODEC
with FlexSound Technology
TABLE OF CONTENTS (continued)
Battery Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Device Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Device Revision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
I2C Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Bit Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
START and STOP Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Early STOP Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Slave Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Write Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Read Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Typical Operating Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Analog Microphones and Bypass Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Digital Microphones and Receiver Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Filterless Class D Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
RF Susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Startup/Shutdown Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Component Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Optional Ferrite Bead Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Input Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Charge-Pump Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Charge-Pump Flying Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Charge-Pump Holding Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Unused Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Recommended PCB Routing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Supply Bypassing, Layout, and Grounding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
WLP Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
4
C8 INB2
D8 INB1
D9 INA2/EXTMICN
E9 INA1/EXTMICP
G9 MIC2N
F9 MIC2P
MIC2BYP
MIC1N/
F8 DIGMICCLK
MIC1P/
E8 DIGMICDATA
G8 MICBIAS
D6 JACKSNS
INABYP
MBEN
JDETEN
JACK
DETECTION
I2C
REG
EXTMIC
EXTMIC
+
+
PA2EN:
0/20/30dB
PGAINB:
+20dB TO -6dB
INBDIFF
PGAINB:
+20dB TO -6dB
PGAINA:
+20dB TO -6dB
INADIFF
PGAINA:
+20dB TO -6dB
PGAM2:
+20dB TO 0dB
PA1EN:
0/20/30dB
PGAM1:
+20dB TO 0dB
PSCLK
CLOCK
CONTROL
E2
D1
MIXOUT3
MIX
MIXOUT2
MIX
MIXOUT1
MIX
MIXADR
MIX
MIXADL
MIX
MAS1
DAI1
SEL1
ADREN
ADCR
ADCL
ADLEN
BCLKS1
D2
E4
LBEN2
MIX
MUX
AVRG: 0/6/12/18dB
AVR: 3dB TO -2dB
PREOUT3
PGAOUT3:
0dB TO -23dB
PREOUT2
PGAOUT2:
0dB TO -23dB
LTEN1
DATA
INPUT
F2
+
+
PORT S2
EQ2EN
DV1:
0dB TO -15dB
G3
HIZOFF2
SDINS2
MODE1
DVFLT
AUDIO/
VOICE
FILTERS
DCB2
AUDIO/
FILTERS
FlexSound
TECHNOLOGY
DATA
OUTPUT
MAS2
DVEQ2:
0dB TO -15dB
LBEN1
DV2:
0dB TO -15dB
EXCURSION LIMITER
G1
SDOUTS2
FRAME
CLOCK
LRCLK2
5-BAND
PARAMETRIC
EQ
DVEQ1:
0dB TO -15dB
MULTI BAND ALC
EQ1EN
F3
LRCLKS2
BIT
CLOCK
BCLK2
DV1G:
0/6/12/18dB
MAS2
DAI2
SEL2
5-BAND
PARAMETRIC
EQ
DVST:
0dB TO -60dB
MODE1
AVFLT
AUDIO/
VOICE
FILTERS
E1
DVDDS1 BCLKS2
HIZOFF1
DATA
OUTPUT
AVLG: 0/6/12/18dB
AVL: 3dB TO -12dB
PREOUT1
D4
SDINS1
NOISE GATE
DSTS
SIDETONE
SDOUT1
MAS1
PORT S1
SDOUTS1
FRAME
CLOCK
PGAOUT1:
0dB TO -23dB
BIT
CLOCK
LRCLK1
AUTOMATIC
GAIN
CONTROL
LRCLKS1
BCLK1
MCLK
SDIN1
E5
SDOUT2
F5
MIXDAR
MIX
MIXDAL
MIX
DATA
INPUT
+9dB
+9dB
+9dB
DAREN
DACR
DALEN
DACL
G4
DVDD
G2
DVDDS2
SDIN2
F4
G5
MIX
SPVOLL:
+8dB TO -62dB
RECVOL:
+8dB TO -62dB
AGND
G7
DGND
F1
MIX
MIXHPR
MIX
MIXHPL
RECEN
0dB
B8
HPVSS C1N
B7
C1P
HPVOLR:
+3dB TO -67dB
HPVOLL:
+3dB TO -67dB
CHARGE
PUMP
HPREN
HPLEN
SPREN
+6dB
A9
SPKBYP
RECBYP
BIAS
POWER/
DISTORTION LIMITER
SPLEN
+6dB
BATTERY ADC
MAX9888
MIXSPR SPVOLR:
+8dB TO -62dB
MIX
MIXSPL
MIX
MIXREC
AVDD
F6
HPGND
HPVDD
HPR
HPSNS
HPL
SPKRGND
SPKRN
SPKRP
SPKRVDD
SPKLGND
SPKLN
SPKLP
SPKLVDD
RECN/
RXINN
A8
A7
C9
C6
B9
A2, B2
A1, B1
C1, C2
C3, D3
C4, C5
A5, B5
A4, B4
A3, B3
B6
A6
G6
REG
RECP/
RXINP
F7
REF
PREG
Functional Diagram
5
MAX9888
SDA SCL IRQ
Stereo Audio CODEC
with FlexSound Technology
MAX9888
Stereo Audio CODEC
with FlexSound Technology
ABSOLUTE MAXIMUM RATINGS
REG, INA1, INA2, INB1, INB2, MIC1P/DIGMICDATA,
MIC1N/DIGMICCLK, MIC2P, MIC2N................-0.3V to +2.2V
HPSNS................................ (HPGND - 0.3V) to (HPGND + 0.3V)
HPL, HPR............................. (HPVSS - 0.3V) to (HPVDD + 0.3V)
RECP, RECN...............(SPKLGND - 0.3V) to (SPKLVDD + 0.3V)
SPKLP, SPKLN............(SPKLGND - 0.3V) to (SPKLVDD + 0.3V)
SPKRP, SPKRN..........(SPKRGND - 0.3V) to (SPKRVDD + 0.3V)
Continuous Power Dissipation (TA = +70NC)
63-Bump WLP (derate 25.6mW/NC above +70NC).........2.05W
Operating Temperature Range........................... -40NC to +85NC
Storage Temperature Range............................. -65NC to +150NC
Soldering Temperature (reflow).......................................+260NC
(Voltages with respect to AGND.)
DVDD, AVDD, HPVDD..........................................-0.3V to +2.2V
SPKLVDD, SPKRVDD, DVDDS1, DVDDS2...........-0.3V to +6.0V
DGND, HPGND, SPKLGND, SPKRGND...............-0.1V to +0.1V
HPVSS................................ (HPGND - 2.2V) to (HPGND + 0.3V)
C1N..................................... (HPVSS - 0.3V) to (HPGND + 0.3V)
C1P......................................(HPGND - 0.3V) to (HPVDD + 0.3V)
PREG...................................................... -0.3V to (AVDD + 0.3V)
REF, MICBIAS.................................. -0.3V to (SPKLVDD + 0.3V)
MCLK, SDINS1, SDINS2, JACKSNS,
SDA, SCL, IRQ..................................................-0.3V to +6.0V
LRCLKS1, BCLKS1, SDOUTS1.......... -0.3V to (DVDDS1 + 0.3V)
LRCLKS2, BCLKS2, SDOUTS2.......... -0.3V to (DVDDS2 + 0.3V)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VAVDD = VHPVDD = VDVDD = VDVDDS1 = VDVDDS2 = +1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected
between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from
HPL or HPR to GND. RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CPREG = CREG = 1FF, CC1N-C1P = 1FF, CHPVSS
= 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB,
AVPGAIN_ = 0dB, AVPGAOUT_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1.
TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1)
PARAMETER
POWER SUPPLY
SYMBOL
Supply Voltage Range
CONDITIONS
Guaranteed by PSRR
Full-duplex 8kHz mono,
receiver output (Note 3)
VSPKLVDD,
VSPKRVDD
2.8
VDVDD, VAVDD,
VHPVDD
1.65
VDVDDS1,
VDVDDS2
1.65
6
1.8
2.0
V
3.6
10
1.98
3.5
Digital
1.49
3
2.71
4
1.65
2.5
2.93
4.5
1.85
3
8.22
18
2.94
5
12.75
18
1.7
3
3.75
5.5
Analog
5.11
7
Speaker
0.58
1
Digital
0.03
0.06
Analog
Full-duplex 48kHz stereo,
microphone inputs,
Speaker
headphone outputs (Note 3)
Digital
UNITS
5.5
6.37
DAC playback 48kHz stereo,
Speaker
speaker outputs (Note 3)
Digital
Stereo line playback,
IN_DIF = 0, INA1 to HPL,
INA2 to HPR, VMCLK = 0V
MAX
Analog
Analog
IVDD
TYP
Speaker
Analog
DAC playback 48kHz stereo,
Speaker
headphone outputs (Note 3)
Digital
Total Supply Current (Note 2)
MIN
mA
Stereo Audio CODEC
with FlexSound Technology
(VAVDD = VHPVDD = VDVDD = VDVDDS1 = VDVDDS2 = +1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected
between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from
HPL or HPR to GND. RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CPREG = CREG = 1FF, CC1N-C1P = 1FF, CHPVSS
= 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB,
AVPGAIN_ = 0dB, AVPGAOUT_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1.
TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1)
PARAMETER
SYMBOL
Shutdown Supply Current
(Note 2)
CONDITIONS
TA = +25NC
MIN
TYP
MAX
Analog
0.2
2
Speaker
0.1
1
1
5
Digital
REF Voltage
UNITS
FA
2.5
V
PREG Voltage
1.6
V
REG Voltage
0.7
V
Shutdown to Full Operation
SLEW = 0
30
SLEW = 1
17
ms
MICROPHONE TO ADC PATH
Dynamic Range (Note 4)
Total Harmonic Distortion +
Noise
Common-Mode Rejection Ratio
DR
THD+N
CMRR
fS = 8kHz, MODE = 0 (IIR voice),
AVMICPRE_ = 0dB
Path Phase Delay
PSRR
88
VIN = 0.1VP-P, MCLK = 12.288MHz,
fS = 8kHz, f = 1kHz
-77
AVMICPRE_ = 0dB, VIN = 1VP-P, f = 1kHz
-82
AVMICPRE_ = +30dB, VIN = 32mVP-P,
f = 1kHz
-71
VIN = 100mVP-P, f = 217Hz
65
VAVDD = 1.65V to 2.0V, input referred, MIC
inputs floating
Power-Supply Rejection Ratio
75
60
-65
dB
dB
100
f = 217Hz, VRIPPLE = 100mVP-P, AVADC = 0dB,
input referred
100
f = 1kHz, VRIPPLE = 100mVP-P, AVADC = 0dB,
input referred
91
f = 10kHz, VRIPPLE = 100mVP-P, AVADC = 0dB,
input referred
70
1kHz, 0dB input,
highpass filter
disabled measured
from analog input to
digital output
dB
dB
MODE = 0 (IIR voice)
8kHz
2.2
MODE = 0 (IIR voice)
16kHz
1.1
MODE = 1 (FIR audio)
8kHz
4.5
MODE = 1 (FIR audio)
48kHz
0.76
ms
7
MAX9888
ELECTRICAL CHARACTERISTICS (continued)
MAX9888
Stereo Audio CODEC
with FlexSound Technology
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = VHPVDD = VDVDD = VDVDDS1 = VDVDDS2 = +1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected
between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from
HPL or HPR to GND. RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CPREG = CREG = 1FF, CC1N-C1P = 1FF, CHPVSS
= 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB,
AVPGAIN_ = 0dB, AVPGAOUT_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1.
TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MICROPHONE PREAMP
AVMICPRE_ = 0dB
Full-Scale Input
1.05
PA1EN/PA2EN = 01
Preamplifier Gain
PGA Gain
MIC Input Resistance
AVMICPRE_ (Note 5)
AVMICPGA_ (Note 5)
RIN_MIC
VP-P
0
PA1EN/PA2EN = 10
19.5
20
20.5
PA1EN/PA2EN = 11
29.4
30
30.5
PGAM1/PGAM2 = 0x00
19.5
20
20.5
PGAM1/PGAM2 = 0x14
All gain settings, measured at MIC1P/MIC1N/
MIC2P/MIC2N
0
30
50
2.14
dB
dB
kI
MICROPHONE BIAS
2.2
2.25
V
Load Regulation
ILOAD = 1mA to 2mA
0.5
11
mV
Line Regulation
VSPKLVDD = 2.8V to 5.5V
100
f = 217Hz, VRIPPLE (SPKLVDD) = 100mVP-P
92
f = 10kHz, VRIPPLE (SPKLVDD) = 100mVP-P
83
A-weighted, f = 20Hz to 20kHz
3.8
P-weighted, f = 20Hz to 4kHz
2.1
f = 1kHz
33
IMIC1_ = 100mA, INABYP = MIC2BYP = 1,
VMIC2_ = VINA_ = (0V, VAVDD)
3.5
VIN = 2VP-P, VCM = 0.9V, RL = 10kI,
f = 1kHz, INABYP = MIC2BYP = 1
-80
dB
Off-Isolation
VIN = 2VP-P, VCM = 0.9V, RL = 10kI,
f = 1kHz
60
dB
Off-Leakage Current
VMIC1_ = (0V, VAVDD),
VMIC2_/VINA_ = (VAVDD, 0V)
MICBIAS Output Voltage
VMICBIAS
Ripple Rejection
Noise Voltage
ILOAD = 1mA
FV
dB
FVRMS
nV/√Hz
MICROPHONE BYPASS SWITCH
On-Resistance
Total Harmonic Distortion +
Noise
RON
THD+N
-2.5
20
+2.5
I
FA
LINE INPUT TO ADC PATH
Dynamic Range (Note 4)
Total Harmonic Distortion +
Noise
Gain Error
8
DR
THD+N
fS = 48kHz, MCLK = 12.288MHz, MODE = 1
(FIR audio)
91
dB
VIN = 1VP-P, f = 1kHz
-77
dB
DC accuracy
1
5
%
Stereo Audio CODEC
with FlexSound Technology
(VAVDD = VHPVDD = VDVDD = VDVDDS1 = VDVDDS2 = +1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected
between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from
HPL or HPR to GND. RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CPREG = CREG = 1FF, CC1N-C1P = 1FF, CHPVSS
= 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB,
AVPGAIN_ = 0dB, AVPGAOUT_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1.
TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LINE INPUT PREAMP
Full-Scale Input
Level Adjust Gain
VIN
AVPGAIN_
AVPGAIN_ = 0dB
1
AVPGAIN_ = -6dB
1.4
PGAINA/PGAINB = 0x0
19
20
21
PGAINA/PGAINB = 0x1
13
14
15
2
3
4
PGAINA/PGAINB = 0x2
(Note 5)
PGAINA/PGAINB = 0x3
TA = +25NC
PGAINA/PGAINB = 0x4
AVPGAIN_ = +20dB
-6
-5
21
27.4
20
AVPGAIN_ = +3dB
20
AVPGAIN_ = 0dB
7.3
INAEXT/INBEXT = 1
10
13.7
kI
20
AVPGAIN_ = -6dB
RIN_FB
-2
-7
AVPGAIN_ = -3dB
Feedback Resistance
-3
14.6
AVPGAIN_ = +14dB
RIN
dB
0
-4
PGAINA/PGAINB = 0x5, 0x6, 0x7
Input Resistance
VP-P
20
TA = +25NC
18.5
TA = TMIN to TMAX
17.5
20
21.5
23
kI
ADC LEVEL CONTROL
ADC Level Adjust Range
AVADCLVL AVL/AVR = 0xF to 0x0 (Note 5)
-12
ADC Level Adjust Step Size
ADC Gain Adjust Range
+3
1
AVADCGAIN AVLG/AVRG = 00 to 11 (Note 5)
0
ADC Gain Adjust Step Size
dB
dB
18
6
dB
dB
ADC DIGITAL FILTERS
VOICE MODE IIR LOWPASS FILTER (MODE1 = 0)
Passband Cutoff
Stopband Attenuation (Note 6)
0.441
x fs
-3dB cutoff
0.449
x fs
fPLP
Passband Ripple
Stopband Cutoff
Ripple limit cutoff
f < fPLP
-0.1
fSLP
f > fSLP
74
Hz
+0.1
dB
0.47
x fs
Hz
dB
9
MAX9888
ELECTRICAL CHARACTERISTICS (continued)
MAX9888
Stereo Audio CODEC
with FlexSound Technology
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = VHPVDD = VDVDD = VDVDDS1 = VDVDDS2 = +1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected
between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from
HPL or HPR to GND. RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CPREG = CREG = 1FF, CC1N-C1P = 1FF, CHPVSS
= 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB,
AVPGAIN_ = 0dB, AVPGAOUT_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1.
TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VOICE MODE IIR HIGHPASS FILTER (MODE1 = 0)
Passband Cutoff
(-3dB from Peak)
Stopband Cutoff
(-30dB from Peak)
DC Attenuation
fAHPPB
fAHPSB
DCATTEN
AVFLT = 0x1 (elliptical tuned for
fs = 16kHz + 217Hz notch)
0.0161
x fs
AVFLT = 0x2 (500Hz Butterworth tuned for
fs = 16kHz)
0.0319
x fs
AVFLT = 0x3 (elliptical tuned for
fs = 8kHz + 217Hz notch)
0.0321
x fs
AVFLT = 0x4 (500Hz Butterworth tuned for
fs = 8kHz)
0.0632
x fs
AVFLT = 0x5 (fs/240 Butterworth)
0.0043
x fs
AVFLT = 0x1 (elliptical tuned for
fs = 16kHz + 217Hz notch)
0.0139
x fs
AVFLT = 0x2 (500Hz Butterworth tuned for
fs = 16kHz)
0.0156
x fs
AVFLT = 0x3 (elliptical tuned for
fs = 8kHz + 217Hz notch)
0.0279
x fs
AVFLT = 0x4 (500Hz Butterworth tuned for fs =
8kHz)
0.0312
x fs
AVFLT = 0x5 (fs/240 Butterworth)
0.002
x fs
Hz
90
AVFLT ≠ 000
Hz
dB
STEREO AUDIO MODE FIR LOWPASS FILTER (MODE1 = 1, DHF1 = 0, LRCLK < 50kHz)
Passband Cutoff
fPLP
Passband Ripple
Stopband Cutoff
Ripple limit cutoff
0.43
x fs
-3dB cutoff
0.48
x fs
-6.02dB cutoff
0.5
x fs
f < fPLP
-0.1
fSLP
Stopband Attenuation (Note 6)
f < fSLP
60
Hz
+0.1
dB
0.58
x fs
Hz
dB
ADC STEREO AUDIO MODE FIR LOWPASS FILTER (MODE1 = 1, DHF1 = 1, LRCLK > 50kHz)
Passband Cutoff
10
Ripple limit cutoff
0.208
x fs
-3dB cutoff
0.28
x fs
fPLP
Hz
Stereo Audio CODEC
with FlexSound Technology
(VAVDD = VHPVDD = VDVDD = VDVDDS1 = VDVDDS2 = +1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected
between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from
HPL or HPR to GND. RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CPREG = CREG = 1FF, CC1N-C1P = 1FF, CHPVSS
= 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB,
AVPGAIN_ = 0dB, AVPGAOUT_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1.
TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1)
PARAMETER
SYMBOL
Passband Ripple
Stopband Cutoff
CONDITIONS
f < fPLP
MIN
TYP
-0.1
fSLP
Stopband Attenuation
f < fSLP
MAX
UNITS
+0.1
dB
0.417
x fs
Hz
60
dB
ADC STEREO AUDIO MODE DC-BLOCKING HIGHPASS FILTER (MODE1 = 1)
Passband Cutoff
(-3dB from Peak)
fAHPPB
AVFLT ≠ 000
DC Attenuation
DCAtten
AVFLT ≠ 000
0.000125
x fs
90
Hz
dB
MICROPHONE AUTOMATIC GAIN CONTROL
AGC Hold Duration
AGC Attack Time
AGC Release Time
AGC Threshold Level
AGCHLD = 01
50
AGCHLD = 11
400
AGCATK = 00
2
AGCATK = 11
123
AGCRLS = 000
0.078
AGCRLS = 111
10
AGCTH = 0x0 to 0xF
-3
AGC Threshold Step Size
ms
ms
s
+18
1
AGC Gain
(Note 5)
dB
dB
0
20
dB
-64
-16
dB
0
12
dB
ADC NOISE GATE
NG Threshold Level
ANTH = 0x3 to 0xF, referred to 0dBFS
NG Attenuation
(Note 5)
ADC-TO-DAC DIGITAL SIDETONE (MODE = 0)
Sidetone Gain Adjust Range
AVSTGA
DVST = 0x01
-0.5
DVST = 0x1F
-60.5
Sidetone Gain Adjust Step Size
dB
2
1kHz, 0dB input, highpass 8kHz
filter disabled
16kHz
Sidetone Path Phase Delay
dB
2.2
ms
1.1
ADC-TO-DAC DIGITAL LOOP-THROUGH PATH
Dynamic Range (Note 4)
DR
Total Harmonic Distortion
THD
fS = 48kHz, MCLK = 12.288MHz, MODE = 1
(FIR audio)
89
f = 1kHz, fS = 48kHz, MCLK = 12.288MHz,
MODE = 1 (FIR audio)
-71
dB
-66
dB
0
dB
DAC LEVEL CONTROL
DAC Attenuation Range
AVDACATTN DV1DV2 = 0xF to 0x0 (Note 5)
-15
1
DAC Attenuation Step Size
DAC Gain Adjust Range
DAC Gain Adjust Step Size
AVDACGAIN DV1G = 00 to 11 (Note 5)
0
dB
18
6
dB
dB
11
MAX9888
ELECTRICAL CHARACTERISTICS (continued)
MAX9888
Stereo Audio CODEC
with FlexSound Technology
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = VHPVDD = VDVDD = VDVDDS1 = VDVDDS2 = +1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected
between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from
HPL or HPR to GND. RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CPREG = CREG = 1FF, CC1N-C1P = 1FF, CHPVSS
= 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB,
AVPGAIN_ = 0dB, AVPGAOUT_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1.
TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DAC DIGITAL FILTERS
VOICE MODE IIR LOWPASS FILTER (MODE1 = 0)
Passband Cutoff
0.448
x fs
-3dB cutoff
0.451
x fs
fPLP
Passband Ripple
Stopband Cutoff
Ripple limit cutoff
f < fPLP
Hz
-0.1
fSLP
Stopband Attenuation (Note 6)
f > fSLP
+0.1
dB
0.476
x fs
Hz
75
dB
VOICE MODE IIR HIGHPASS FILTER (MODE1 = 0)
Passband Cutoff
(-3dB from Peak)
Stopband Cutoff
(-30dB from Peak)
DC Attenuation
12
fDHPPB
fDHPSB
DCATTEN
DVFLT = 0x1 (elliptical tuned for
fs = 16kHz + 217Hz notch)
0.0161
x fs
DVFLT = 0x2 (500Hz Butterworth tuned for
fs = 16kHz)
0.0312
x fs
DVFLT = 0x3 (elliptical tuned for
fs = 8kHz + 217Hz notch)
0.0321
x fs
DVFLT = 0x4 (500Hz Butterworth tuned for
fs = 8kHz)
0.0625
x fs
DVFLT = 0x5 (fs/240 Butterworth)
0.0042
x fs
DVFLT = 0x1 (elliptical tuned for
fs = 16kHz + 217Hz notch)
0.0139
x fs
DVFLT = 0x2 (500Hz Butterworth tuned for
fs = 16kHz)
0.0156
x fs
DVFLT = 0x3 (elliptical tuned for
fs = 8kHz + 217Hz notch)
0.0279
x fs
DVFLT = 0x4 (500Hz Butterworth tuned for
fs = 8kHz)
0.0312
x fs
DVFLT = 0x5 (fs/240 Butterworth)
0.002
x fs
DVFLT ≠ 000
Hz
Hz
85
dB
Stereo Audio CODEC
with FlexSound Technology
(VAVDD = VHPVDD = VDVDD = VDVDDS1 = VDVDDS2 = +1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected
between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from
HPL or HPR to GND. RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CPREG = CREG = 1FF, CC1N-C1P = 1FF, CHPVSS
= 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB,
AVPGAIN_ = 0dB, AVPGAOUT_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1.
TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
STEREO AUDIO MODE FIR LOWPASS FILTER (MODE1 = 1, DHF1/DHF2 = 0, LRCLK < 50kHz)
Passband Cutoff
fPLP
Passband Ripple
Stopband Cutoff
Ripple limit cutoff
0.43
x fs
-3dB cutoff
0.47
x fs
-6.02dB cutoff
0.5
x fs
f < fPLP
-0.1
Hz
fSLP
Stopband Attenuation (Note 6)
f > fSLP
+0.1
dB
0.58
x fs
Hz
60
dB
STEREO AUDIO MODE FIR LOWPASS FILTER (MODE1 = 1, DHF1/DHF2 = 1 for LRCLK > 50kHz)
Passband Cutoff
0.24
x fs
-3dB cutoff
0.31
x fs
f < fPLP
-0.1
fPLP
Passband Ripple
Stopband Cutoff
Ripple limit cutoff
Hz
fSLP
Stopband Attenuation (Note 6)
f < fSLP
+0.1
dB
0.477
x fs
Hz
60
dB
STEREO AUDIO MODE DC-BLOCKING HIGHPASS FILTER
Passband Cutoff (-3dB from
Peak)
0.000104
x fs
Hz
fDHPPB
DVFLT ≠ 000 (DAI1), DCB2 = 1 (DAI2)
DCATTEN
DVFLT ≠ 000 (DAI1), DCB2 = 1 (DAI2)
90
dB
Dual Band Lowpass Corner
Frequency
ALCMB = 1
5
kHz
Dual Band Highpass Corner
Frequency
ALCMB = 1
5
kHz
DC Attenuation
AUTOMATIC LEVEL CONTROL
Gain Range
Low Signal Threshold
Release Time
ALCTH = 111 to 001
0
12
dB
-48
-12
dBFS
ALCRLS = 101
0.25
ALCRLS = 000
8
s
PARAMETRIC EQUALIZER
Number of Bands
5
Per Band Gain Range
Preattenuator Gain Range
Preattenuator Step Size
-12
(Note 5)
-15
1
Bands
+12
dB
0
dB
dB
13
MAX9888
ELECTRICAL CHARACTERISTICS (continued)
MAX9888
Stereo Audio CODEC
with FlexSound Technology
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = VHPVDD = VDVDD = VDVDDS1 = VDVDDS2 = +1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected
between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from
HPL or HPR to GND. RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CPREG = CREG = 1FF, CC1N-C1P = 1FF, CHPVSS
= 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB,
AVPGAIN_ = 0dB, AVPGAOUT_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1.
TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DAC-TO-RECEIVER AMPLIFIER PATH
Dynamic Range (Note 4)
Total Harmonic Distortion +
Noise
Click and Pop Level
DR
THD+N
KCP
fS = 48kHz, MCLK = 12.288MHz, f = 1kHz
96
f = 1kHz, POUT = 25mW, RREC = 32I
-70
Peak voltage, A-weighted, 32
samples per second, AVREC
= 0dB
Into shutdown
-70
Out of shutdown
-73
dB
-63
dB
dBV
PREOUTPUT MIXERS
Level Adjust Gain
AVPGAOUT_ (Note 5)
PGAOUTA/PGAOUTB/
PGAOUTC = 0x0
PGAOUTA/PGAOUTB/
PGAOUTC = 0xC
0
dB
-25
Level Adjust Step Size
Mute Attenuation
f = 1kHz
-23.4
-22
2
dB
85
dB
92
dB
-70
dB
LINE INPUT-TO-RECEIVER AMPLIFIER PATH
Dynamic Range (Note 4)
Total Harmonic Distortion +
Noise
DR
Referenced to full-scale output level
THD+N
VSPKLVDD = 2.8V to 5.5V
Power-Supply Rejection Ratio
Click-and-Pop Level
PSRR
KCP
54
89
f = 217Hz, VRIPPLE = 100mVP-P
-63
f = 1kHz, VRIPPLE = 100mVP-P
-63
f = 10kHz, VRIPPLE = 100mVP-P
-65
Peak voltage, A-weighted, 32
samples per second, AVREC
= 0dB
Into shutdown
-57
Out of shutdown
-55
dB
dBV
RECEIVER AMPLIFIER
Output Power
POUT
Full-Scale Output
Volume Control
AVREC
Volume Control Step Size
Mute Attenuation
Output Offset Voltage
Capacitive Drive Capability
14
RREC = 32I, f = 1kHz, THD = 1%
(Note 7)
VOS
(Note 5)
100
mW
1
VRMS
RECVOL = 0x00
-65
-62
-58
RECVOL = 0x1F
+7.5
+8
+8.5
+8dB to +6dB
0.5
+6dB to +0dB
1
0dB to -14dB
2
-14dB to -38dB
3
-38dB to -62dB
4
f = 1kHz
95
AVREC = -62dB
No sustained oscillations
TA = +25NC
RREC = 32I
RREC = J
±0.13
500
100
dB
dB
dB
±1
mV
pF
Stereo Audio CODEC
with FlexSound Technology
(VAVDD = VHPVDD = VDVDD = VDVDDS1 = VDVDDS2 = +1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected
between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from
HPL or HPR to GND. RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CPREG = CREG = 1FF, CC1N-C1P = 1FF, CHPVSS
= 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB,
AVPGAIN_ = 0dB, AVPGAOUT_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1.
TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DAC-TO-SPEAKER AMPLIFIER PATH
Total Harmonic Distortion +
Noise
THD+N
f = 1kHz, POUT = 250mW, ZSPK = 8I + 68FH
-71
dB
Crosstalk
SPKL to SPKR and SPKR to SPKL,
POUT = 640mW, f = 1kHz
-75
dB
Output Noise
A-weighted
43
FVRMS
Click-and-Pop Level
Peak voltage, A-weighted,
32 samples per second,
AVSPK_ = 0dB
KCP
Into shutdown
-65
Out of shutdown
-65
dBV
LINE INPUT-TO-SPEAKER AMPLIFIER PATH
Total Harmonic Distortion +
Noise
THD+N
Output Noise
f = 1kHz, POUT = 200mW, ZSPK = 8I + 68FH
-66
dB
A-weighted
56
FVRMS
VSPKLVDD = VRIPPLE = 2.8V to 5.5V
Power-Supply Rejection Ratio
PSRR
43
75
f = 1kHz, VRIPPLE = 100mV
73
f = 10kHz, VRIPPLE = 100mV
Click-and-Pop Level
KCP
60
f = 217Hz, VRIPPLE = 100mV
Peak voltage, A-weighted,
32 samples per second,
AVSPK_ = 0dB
dB
50
Into shutdown
-48
Out of shutdown
-50
dBV
SPEAKER AMPLIFIER
Output Power
POUT
Full-Scale Output
Volume Control (Note 5)
Volume Control Step Size
f = 1kHz, THD = 1%,
ZSPK = 8I + 68FH
VSPKLVDD =
VSPKRVDD = 5.0V
1370
VSPKLVDD =
VSPKRVDD = 4.2V
954
VSPKLVDD =
VSPKRVDD = 3.7V
733
VSPKLVDD =
VSPKRVDD = 3.2V
544
mW
(Note 7)
AVSPK_
2
VRMS
SPVOLL/SPVOLR = 0x00
-69
-64
-59
SPVOLL/SPVOLR = 0x1F
+7.5
+8
+8.5
+8dB to +6dB
0.5
+6dB to +0dB
1
0dB to -14dB
2
-14dB to -38dB
3
-38dB to -64dB
4
dB
dB
15
MAX9888
ELECTRICAL CHARACTERISTICS (continued)
MAX9888
Stereo Audio CODEC
with FlexSound Technology
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = VHPVDD = VDVDD = VDVDDS1 = VDVDDS2 = +1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected
between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from
HPL or HPR to GND. RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CPREG = CREG = 1FF, CC1N-C1P = 1FF, CHPVSS
= 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB,
AVPGAIN_ = 0dB, AVPGAOUT_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1.
TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1)
PARAMETER
SYMBOL
Mute Attenuation
Output Offset Voltage
CONDITIONS
MIN
f = 1kHz
VOS
TYP
MAX
UNITS
±1.25
mV
1000
Hz
86
AVSPK_ = -64dB, TA = +25NC
±0.25
dB
EXCURSION LIMITER
Upper-Corner Frequency Range
DHPUCF = 001 to 100
Lower-Corner Frequency
DHPLCF = 01 to 10
400
DHPUCF = 000 (fixed mode)
100
DHPUCF = 001
200
DHPUCF = 010
300
DHPUCF = 011
400
DHPUCF = 100
500
Biquad Minimum Corner
Frequency
ZSPK = 8I + 68FH,
VSPKLVDD = VSPKRVDD =
5.5V, AVSPK_ = +8dB
Threshold Voltage
Release Time
400
DHPTH = 000
0.34
DHPTH = 111
4.95
ALCRLS = 101
0.25
ALCRLS = 000
4
Hz
Hz
VP
s
POWER LIMITER
Attenuation
-64
ZSPK = 8I + 68FH,
VSPKLVDD = VSPKRVDD =
5.5V, AVSPK_ = +8dB
Threshold
Time Constant 1
tPWR1
Time Constant 2
tPWR2
Weighting Factor
kPWR
PWRTH = 0x1
0.05
PWRTH = 0xF
1.80
PWRT1 = 0x1
0.5
PWRT1 = 0xF
8.7
PWRT2 = 0x1 to 0xF
0.5
PWRT2 = 0xF
8.7
PWRK = 000 to 111
12.5
dB
W
s
min
100
%
DISTORTION LIMITER
Distortion Limit
Release Time Constant
THDCLP = 0x1
24kHz)
DAI1 DAC Highpass Filter Mode
0
3
DESCRIPTION
DAI1 ADC Highpass Filter Mode
4
3
MAX9888
Table 13. Passband Filtering Registers
79
Table 14. Voice Highpass Filters
AVFTL/DVFLT VALUE
INTENDED SAMPLE RATE
FILTER RESPONSE
000
N/A
Disabled
0
001/011
16kHz/8kHz
AMPLITUDE (dB)
-10
-20
-30
-40
-50
-60
0
200
400
600
800
1000
800
1000
FREQUENCY (Hz)
0
010/100
16kHz/8kHz
AMPLITUDE (dB)
-10
-20
-30
-40
-50
-60
0
200
400
600
FREQUENCY (Hz)
0
-10
101
8kHz to 48kHz
AMPLITUDE (dB)
MAX9888
Stereo Audio CODEC
with FlexSound Technology
-20
-30
-40
-50
LRCLK = 48kHz
-60
0
200
400
600
FREQUENCY (Hz)
110/111
80
N/A
Reserved
800
1000
Stereo Audio CODEC
with FlexSound Technology
Automatic Level Control
The automatic level control (ALC) circuit ensures maximum signal amplitude without producing audible clipping. This is accomplished by a variable gain stage that
works on a sample by sample basis to increase the gain
up to 12dB. A look-ahead circuit determines if the next
sample exceeds full scale and reduces the gain so that
the sample is exactly full scale.
A programmable low signal threshold determines the
minimum signal amplitude that is amplified. Select a
threshold that prevents the amplification of background
noise. When the signal level drops below the low signal
threshold, the ALC reduces the gain to 0dB until the signal increases above the threshold. Figure 20 shows an
example of ALC input vs. output curves.
The ALC can optionally be configured in dual-band
mode. In this mode, the input signal is filtered into two
bands with a 5kHz center frequency. Each band is
routed through independent ALCs and then summed
together. In multiband mode, both bands use the same
parameters.
OUTPUT SIGNAL
(dBFS)
0
LOW-LEVEL
-12
0
THRESHOLD
ALC WITH ALCTH ≠ 000
INPUT
SIGNAL
(dBFS)
OUTPUT SIGNAL
(dBFS)
0
DV1G:
0/6/12/18dB
+
0
INPUT
SIGNAL
(dBFS)
0
INPUT
SIGNAL
(dBFS)
MULTIBAND ALC
DVEQ1:
0dB TO -15dB
5-BAND
PARAMETRIC
EQ
LOW-LEVEL
THRESHOLD
DVEQ2:
0dB TO -15dB
ALC WITH ALCTH = 000
OUTPUT SIGNAL
(dBFS)
5-BAND
PARAMETRIC
EQ
EQ1EN
EQ2EN
DV1:
0dB TO -15dB
0
MIXDAL
EXCURSION LIMITER
DV2:
0dB TO -15dB
-12
MIX
DACL
DALEN
AUDIO/
FILTERS
DCB2
AUDIO/
VOICE
FILTERS
MODE1
DVFLT
MIXDAR
MIX
DACR
DAREN
LOW-LEVEL
THRESHOLD
-12
ALC DISABLED
Figure 19. Playback Path Signal Processing Block Diagram
Figure 20. ALC Input vs. Output Examples
81
MAX9888
Playback Path Signal Processing
The IC playback signal path includes automatic level
control (ALC) and a 5-band parametric equalizer (EQ)
(Figure 19). The DAI1 and DAI2 playback paths include
separate ALCs controlled by a single set of registers.
Two completely separate parametric EQs are included
for the DAI1 and DAI2 playback paths.
Table 15. Automatic Level Control Registers
REGISTER
BIT
7
NAME
ALCEN
ALC and Excursion Limiter Release Time
Sets the release time for both the ALC and Excursion Limiter. See the Excursion
Limiter section for Excursion Limiter release times. ALC release time is defined as the
time required to adjust the gain from 12dB to 0dB.
6
5
0x41
ALCRLS
4
3
0
VALUE
000
001
010
011
100
101
110
111
ALC RELEASE TIME (s)
8
4
2
1
0.5
0.25
Reserved
Reserved
ALCMB
Multiband Enable
Enables dual-band processing with a 5kHz center frequency. SR1 and SR2 must be
configured properly to achieve the correct center frequency for each playback path.
0 = Single-band ALC
1 = Dual-band ALC
ALCTH
Low Signal Threshold
Selects the minimum signal level to be boosted by the ALC.
000 = -JdB (low-signal threshold disabled)
001 = -12dB
010 = -18dB
011 = -24dB
100 = -30dB
101 = -36dB
110 = -42dB
111 = -48dB
2
1
DESCRIPTION
ALC Enable
Enables ALC on both the DAI1 and DAI2 playback paths.
0 = Disabled
1 = Enabled
Parametric Equalizer
The parametric EQ contains five independent biquad
filters with programmable gain, center frequency, and
bandwidth. Each biquad filter has a gain range of Q12dB
and a center frequency range from 20Hz to 20kHz. Use a
filter Q less than that shown in Figure 21 to achieve ideal
frequency responses. Setting a higher Q results in nonideal frequency response. The biquad filters are series
connected, allowing a total gain of Q60dB.
1000
MAXIMUM RECOMMENDED FILTER Q
MAX9888
Stereo Audio CODEC
with FlexSound Technology
fs = 8kHz
100
fs = 48kHz
10
fs = 96kHz
1
0.1
100
1000
10,000
100,000
CENTER FREQUENCY (Hz)
Figure 21. Maximum Recommended Filter Q vs. Frequency
82
Stereo Audio CODEC
with FlexSound Technology
The MAX9888 EV kit software includes a graphic interface for generating the EQ coefficients. The coefficients
are sample rate dependent and stored in registers 0x50
through 0xB3.
Table 16. EQ Registers
REGISTER
BIT
NAME
4
EQCLP1/
EQCLP2
2
DVEQ1/DVEQ2
1
0
0x47
DAI1/DAI2 EQ Clip Detection
Automatically controls the EQ attenuator to prevent clipping in the EQ.
0 = Enabled
1 = Disabled
DAI1/DAI2 EQ Attenuator
Provides attenuation to prevent clipping in the EQ when full-scale signals are boosted. DVEQ1/DVEQ2 operates only when EQ1EN/EQ2EN = 1 and EQCLP1/EQCLP2
= 1.
3
0x2C/0x2E
DESCRIPTION
VALUE
GAIN (dB)
VALUE
GAIN (dB)
0x0
0
0x8
-8
0x1
-1
0x9
-9
0x2
-2
0xA
-10
0x3
-3
0xB
-11
0x4
-4
0xC
-12
0x5
-5
0xD
-13
0x6
-6
0xE
-14
0x7
-7
0xF
-15
7
VS2EN
6
VSEN
5
ZDEN
1
EQ2EN
DAI2 EQ Enable
0 = Disabled
1 = Enabled
0
EQ1EN
DAI1 EQ Enable
0 = Disabled
1 = Enabled
See the Click-and-Pop Reduction section.
83
MAX9888
Use the attenuator at the EQ’s input to avoid clipping
the signal. The attenuator can be programmed for fixed
attenuation or dynamic attenuation based on signal level.
If the dynamic EQ clip detection is enabled, the signal
level from the EQ is fed back to the attenuator circuit to
determine the amount of gain reduction necessary to
avoid clipping.
MAX9888
Stereo Audio CODEC
with FlexSound Technology
Playback Level Control
allows boost when MODE1 = 0 and attenuation in any
mode. The DAI2 signal path allows attenuation only.
The IC includes separate digital level control for the DAI1
and DAI2 playback audio paths. The DAI1 signal path
DV1G:
0/6/12/18dB
+
MULTIBAND ALC
DVEQ1:
0dB TO -15dB
5-BAND
PARAMETRIC
EQ
EQ1EN
DVEQ2:
0dB TO -15dB
5-BAND
PARAMETRIC
EQ
EQ2EN
MIXDAL
EXCURSION LIMITER
DACL
MIX
DV2:
0dB TO -15dB
DV1:
0dB TO -15dB
DALEN
AUDIO/
FILTERS
DCB2
AUDIO/
VOICE
FILTERS
MIXDAR
MIX
MODE1
DVFLT
DACR
DAREN
Figure 22. Playback Level Control Block Diagram
Table 17. DAC Playback Level Control Register
REGISTER
BIT
7
NAME
DV1M/DV2M
5
DV1G
4
0x2B/0x2D
VALUE
2
DV1/DV2
0
84
DAI1 Voice Mode Gain
DV1G only applies when MODE1 = 0.
00 = 0dB
01 = 6dB
10 = 12dB
11 = 18dB
DAI1/DAI2 Attenuation
3
1
DESCRIPTION
DAI1/DAI2 Mute
0 = Disabled
1 = Enabled
GAIN (dB)
VALUE
GAIN (dB)
0x0
0
0x8
-8
0x1
-1
0x9
-9
0x2
-2
0xA
-10
0x3
-3
0xB
-11
0x4
-4
0xC
-12
0x5
-5
0xD
-13
0x6
-6
0xE
-14
0x7
-7
0xF
-15
Stereo Audio CODEC
with FlexSound Technology
DV1G:
0/6/12/18dB
+
MULTIBAND ALC
DVEQ1:
0dB TO -15dB
5-BAND
PARAMETRIC
EQ
DVEQ2:
0dB TO -15dB
5-BAND
PARAMETRIC
EQ
EQ1EN
EQ2EN
MIXDAL
EXCURSION LIMITER
DV2:
0dB TO -15dB
DV1:
0dB TO -15dB
MIX
DACL
DALEN
AUDIO/
FILTERS
DCB2
AUDIO/
VOICE
FILTERS
MODE1
DVFLT
MIXDAR
MIX
DACR
DAREN
Figure 23. DAC Input Mixer Block Diagram
Table 18. DAC Input Mixer Register
REGISTER
BIT
NAME
7
6
5
0x21
MIXDAL
Left DAC Input Mixer
1xxx = DAI1 left channel
x1xx = DAI1 right channel
xx1x = DAI2 left channel
xxx1 = DAI2 right channel
MIXDAR
Right DAC Input Mixer
1xxx = DAI1 left channel
x1xx = DAI1 right channel
xx1x = DAI2 left channel
xxx1 = DAI2 right channel
4
3
2
1
0
DESCRIPTION
85
MAX9888
DAC Input Mixers
The IC’s stereo DAC accepts input from two digital audio paths. The DAC mixer routes any audio path to the left and
right DACs (Figure 23).
MAX9888
Stereo Audio CODEC
with FlexSound Technology
Preoutput Signal Path
The IC’s preoutput mixer stage provides mixing and level adjustment for line input signals routed to the output amplifiers. Figure 24 shows a block diagram of the preoutput signal path. 9dB is added between the line input amplifiers
and the output amplifiers to boost the 1VP-P maximum line input signal level to the 1VRMS maximum DAC signal level.
RECP/
RXINP
RECVOL:
+8dB TO -62dB
0dB
MIX
MIXREC
RECEN
RECN/
RXINN
RECBYP
SPKBYP
BATTERY ADC
SPVOLL:
+8dB TO -62dB
SPKLVDD
SPKLP
+6dB
MIX
SPKLN
MIXSPL
SPLEN
POWER/
DISTORTION LIMITER
SPKLGND
SPKRVDD
SPKRP
+6dB
MIX
MIXSPR SPVOLR:
+8dB TO -62dB
PGAINA:
+20dB TO -6dB
PGAOUT1:
0dB TO -23dB
INADIFF
+
PGAINA:
+20dB TO -6dB
PREOUT1
MIX
MIXOUT1
PGAINB:
+20dB TO -6dB
PREOUT2
MIXHPL
SPKRPGND
HPL
HPLEN
HPSNS
HPVOLR:
+3dB TO -67dB
MIX
+9dB
HPR
HPREN
PGAOUT3:
0dB TO -23dB
MIX
+
+9dB
MIXHPR
MIXOUT2
INBDIFF
PGAINB:
+20dB TO -6dB
MIX
PGAOUT2:
0dB TO -23dB
MIX
SPKRN
SPREN
HPVOLL:
+3dB TO -67dB
PREOUT3
+9dB
MIXOUT3
Figure 24. Preoutput Signal Path Block Diagram
Preoutput Mixer
The IC’s output amplifiers each accept input from one of the three preoutput mixers. Configure each preoutput mixer to mix any combination of the four line input signals.
Table 19. Preoutput Mixer Registers
REGISTER
BIT
NAME
3
0x24/0x25/
0x26
2
1
0
86
MIXOUT1/
MIXOUT2/
MIXOUT3
DESCRIPTION
Preoutput Mixer 1
1xxx = INA1
x1xx = INA2 (INADIFF = 0) or INA2 - INA1 (INADIFF = 1)
xx1x = INB1
xxx1 = INB2 (INBDIFF = 0) or INB2 - INB1 (INBDIFF = 1)
Stereo Audio CODEC
with FlexSound Technology
Table 20. Preoutput PGA Registers
REGISTER
BIT
NAME
DESCRIPTION
Preoutput PGA Level
3
2
0x35/0x36/
0x37
1
PGAOUT1/
PGAOUT2/
PGAOUT3
0
VALUE
GAIN (dB)
VALUE
GAIN (dB)
0x0
0
0x8
-15
0x1
-1
0x9
-17
0x2
-3
0xA
-19
0x3
-5
0xB
-21
0x4
-7
0xC
-23
Mute
0x5
-9
0xD
0x6
-11
0xE
Mute
0x7
-13
0xF
Mute
Receiver Amplifier
The IC includes a single differential receiver amplifier. The receiver amplifier is designed to drive 32I receivers. In
cases where a single transducer is used for the loudspeaker and receiver, use the SPKBYP switch to route the receiver
amplifier output to the left speaker outputs.
RECP/
RXINP
RECVOL:
+8dB TO -62dB
MIX
MIXREC
DACL
0dB
RECEN
RECN/
RXINN
RECBYP
SPKBYP
DALEN
DACR
DAREN
PGAOUT1:
0dB TO -23dB
PREOUT1
+9dB
PGAOUT2:
0dB TO -23dB
PREOUT2
+9dB
Figure 25. Receiver Amplifier Block Diagram
87
MAX9888
Preoutput PGA
The IC’s preoutput PGAs allow line input signals to be attenuated to match DAC output signal levels. Use the 0dB
setting for maximum performance.
MAX9888
Stereo Audio CODEC
with FlexSound Technology
Receiver Output Mixer
The IC’s receiver amplifier accepts input from the stereo DAC and the line inputs. Configure the mixer to mix any combination of the available sources. When more than one signal is selected, the mixed signal is attenuated by 6dB for 2 signals,
9.5dB for 3 signals, or 12dB for 4 signals.
Table 21. Receiver Output Mixer Register
REGISTER
BIT
NAME
3
0x28
2
1
MIXREC
0
DESCRIPTION
Receiver Output Mixer
1xxx = Left DAC
x1xx = Right DAC
xx1x = Preoutput mixer 1
xxx1 = Preoutput mixer 2
Receiver Output Volume
Table 22. Receiver Output Level Register
REGISTER
BIT
7
NAME
RECM
Receiver Output Volume Level
4
3
0x3A
2
RECVOL
1
0
88
DESCRIPTION
Receiver Output Mute
0 = Disabled
1 = Enabled
VALUE
VOLUME (dB)
VALUE
VOLUME (dB)
0x00
-62
0x10
-10
0x01
-58
0x11
-8
0x02
-54
0x12
-6
0x03
-50
0x13
-4
0x04
-46
0x14
-2
0x05
-42
0x15
0
0x06
-38
0x16
+1
0x07
-35
0x17
+2
0x08
-32
0x18
+3
0x09
-29
0x19
+4
0x0A
-26
0x1A
+5
0x0B
-23
0x1B
+6
0x0C
-20
0x1C
+6.5
0x0D
-17
0x1D
+7
0x0E
-14
0x1E
+7.5
0x0F
-12
0x1F
+8
Stereo Audio CODEC
with FlexSound Technology
Traditional Class D amplifiers require the use of external LC filters or shielding to meet EN55022B and FCC
electromagnetic-interference (EMI) regulation standards.
Maxim’s patented active emissions limiting edge-rate
control circuitry reduces EMI emissions (Figure 26).
40
40
30
30
AMPLITUDE (dBµV/m)
AMPLITUDE (dBµV/m)
The high efficiency of a Class D amplifier is due to the
switching operation of the output stage transistors. In a
Class D amplifier, the output transistors act as current
steering switches and consume negligible additional
power. Any power loss associated with the Class D output stage is mostly due to the I2R loss of the MOSFET
on-resistance, and quiescent current overhead.
20
10
20
10
0
0
-10
-10
30
60
80
100
120
140
160
180
200
220
240
260
280
300
300
350
400
450
500
550
600
650
700
750
800
850
900
950
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 26. EMI with 15cm of Speaker Cable
BATTERY ADC
SPVOLL:
+8dB TO -62dB
MIX
MIXSPL
DACL
MIX
DACR
DAREN
SPKLP
+6dB
SPKLN
SPLEN
POWER/DISTORTION LIMITER
DALEN
MIXSPR SPVOLR:
+8dB TO -62dB
SPKLVDD
SPKLGND
SPKRVDD
SPKRP
+6dB
SPKRN
SPREN
SPKRPGND
PGAOUT2:
0dB TO -23dB
PREOUT2
+9dB
PGAOUT3:
0dB TO -23dB
PREOUT3
+9dB
Figure 27. Speaker Amplifier Path Block Diagram
89
MAX9888
The theoretical best efficiency of a linear amplifier is
78%, however, that efficiency is only exhibited at peak
output power. Under normal operating levels (typical
music reproduction levels), efficiency falls below 30%,
whereas the IC’s Class D amplifier still exhibits 80% efficiency under the same conditions.
Speaker Amplifiers
The IC integrates a stereo filterless Class D amplifier that
offers much higher efficiency than Class AB without the
typical disadvantages.
MAX9888
Stereo Audio CODEC
with FlexSound Technology
Speaker Output Mixers
The IC’s speaker amplifiers accept input from the stereo DAC and the line inputs. Configure the mixer to mix any combination of the available sources. When more than one signal is selected, the mixed signal is attenuated by 6dB for 2 signals,
9.5dB for 3 signals, or 12dB for four signals.
Table 23. Speaker Output Mixer Register
REGISTER
BIT
NAME
7
6
5
0x29
MIXSPL
Left Speaker Output Mixer
1xxx = Left DAC
x1xx = Right DAC
xx1x = Reserved
xxx1 = Preoutput mixer 3
MIXSPR
Right Speaker Output Mixer
1xxx = Left DAC
x1xx = Right DAC
xx1x = Reserved
xxx1 = Preoutput mixer 2
4
3
2
1
DESCRIPTION
0
Speaker Output Volume
Table 24. Speaker Output Mixer Register
REGISTER
BIT
7
NAME
SPLM/SPRM
DESCRIPTION
Left/Right Speaker Output Mute
0 = Disabled
1 = Enabled
Left/Right Speaker Output Volume Level
4
3
0x3B/0x3C
2
1
0
90
SPVOLL/SPVOLR
VALUE
VOLUME (dB)
VALUE
VOLUME (dB)
0x00
-64
0x10
-10
0x01
-59
0x11
-8
0x02
-55
0x12
-6
0x03
-50
0x13
-4
0x04
-46
0x14
-2
0x05
-42
0x15
0
0x06
-38
0x16
+1
0x07
-35
0x17
+2
0x08
-32
0x18
+3
0x09
-29
0x19
+4
0x0A
-26
0x1A
+5
0x0B
-23
0x1B
+6
0x0C
-20
0x1C
+6.5
0x0D
-17
0x1D
+7
0x0E
-14
0x1E
+7.5
0x0F
-12
0x1F
+8
Stereo Audio CODEC
with FlexSound Technology
Excursion Limiter
The excursion limiter is a dynamic highpass filter that
monitors the speaker outputs and increases the highpass corner frequency when the speaker amplifier’s output exceeds a predefined threshold. The filter smoothly
transitions between the high and low corner frequency to
prevent unwanted artifacts. The filter can operate in four
different modes:
U Fixed Frequency Preset Mode. The highpass corner
frequency is fixed at the upper corner frequency and
does not change with signal level.
U Preset Dynamic Mode. The highpass filter automatically slides between a preset upper and lower corner
frequency based on output signal level.
U User Programmable Dynamic Mode. The highpass
filter slides between a user-programmed biquad filter
on the low side to a predefined corner frequency on
the high side.
The transfer function for the user-programmable biquad is:
b + b1z -1 + b 2z -2
H(z) = 0
1 + a 1z -1 + a 2z -2
The coefficients b0, b1, b2, a1, and a2 are sample rate
dependent and stored in registers 0xB4 through 0xC7.
Store b0, b1, and b2 as positive numbers. Store a1 and
a2 as negated two’s complement numbers. Separate filters can be stored for the DAI1 and DAI2 playback paths.
The MAX9888 EV kit software includes a graphic interface
for generating the user-programmable biquad coefficients.
Note: Only change the excursion limiter settings when
the signal path is disabled to prevent undesired artifacts.
U Fixed Frequency Programmable Mode. The highpass corner frequency is fixed to that specified by the
programmable biquad filter.
DV1G:
0/6/12/18dB
+
MULTIBAND ALC
DVEQ1:
0dB TO -15dB
5-BAND
PARAMETRIC
EQ
BATTERY ADC
DVEQ2:
0dB TO -15dB
SPVOLL:
+8dB TO -62dB
5-BAND
PARAMETRIC
EQ
EQ1EN
MIX
MIXSPL
EQ2EN
EXCURSION LIMITER
DV2:
0dB TO -15dB
DV1:
0dB TO -15dB
MIX
AUDIO/
FILTERS
MIXDAL
DACL
SPKLP
+6dB
SPKLN
SPLEN
POWER/
DISTORTION LIMITER
DALEN
SPKLVDD
SPKLGND
SPKRVDD
SPKRP
DCB2
MIX
AUDIO/
VOICE
FILTERS
MODE1
DVFLT
MIX
MIXDAR
DACR
MIXSPR SPVOLR:
+8dB TO -62dB
+6dB
SPKRN
SPREN
SPKRPGND
DAREN
Figure 28. Speaker Amplifier Signal Processing Block Diagram
91
MAX9888
Speaker Amplifier Signal Processing
The IC includes signal processing to improve the sound
quality of the speaker output and protect transducers
from damage. An excursion limiter dynamically adjusts
the highpass corner frequency, while a power limiter and
distortion limiter prevent the amplifier from outputting too
much distortion or power. The excursion limiter is located
in the DSP while the distortion limiter and power limiter
control the analog volume control (Figure 28). All three
limiters analyze the speaker amplifier’s output signal to
determine when to take action.
MAX9888
Stereo Audio CODEC
with FlexSound Technology
Table 25. Excursion Limiter Registers
REGISTER
BIT
NAME
Excursion Limiter Corner Frequency
The excursion limiter has limited sliding range and minimum corner frequencies. Listed below
are all the valid filter combinations.
6
5
DESCRIPTION
DHPUCF
LOWER CORNER
FREQUENCY
—
000
00
400Hz
—
001
00
600Hz
—
010
00
800Hz
—
011
00
1kHz
—
100
00
Programmable using biquad
0x3F
1
DHPLCF
0
ALCRLS
4
3
2
0x40
DHPTH
1
0
92
100Hz
000
11
200Hz
400Hz
—
001
01
400Hz
600Hz
—
010
10
400Hz
Programmable
using biquad
Programmable
using biquad
Programmable
using biquad
Programmable
using biquad
800Hz
—
011
10
400Hz
200Hz
001
11
600Hz
300Hz
010
11
800Hz
400Hz
011
11
1kHz
500Hz
100
11
ALC and Excursion Limiter Release Time
Sets the release time for both the ALC and Excursion Limiter. See the Automatic Level Control
section for ALC release times. Excursion limiter release time is defined as the time required to
slide from the high corner frequency to the low corner frequency.
6
5
MINIMUM BIQUAD
DHPUCF DHPLCF
CORNER FREQUENCY
Excursion limiter disabled
4
0x41
UPPER CORNER
FREQUENCY
VALUE
EXCURSION LIMITER RELEASE TIME (s)
000
4
001
2
010
1
011
0.5
100
0.25
101
0.25
110
Reserved
111
Reserved
Excursion Limiter Threshold
Measured at the Class D speaker amplifier outputs. Signals above the threshold use the upper
corner frequency. Signals below the threshold use the lower corner frequency. VBAT must
correctly reflect the voltage of SPKLVDD to achieve accurate thresholds.
000 = 0.34VP
001 = 0.71VP
010 = 1.30VP
011 = 1.77VP
100 = 2.33VP
101 = 3.25VP
110 = 4.25VP
111 = 4.95VP
Stereo Audio CODEC
with FlexSound Technology
Loudspeakers are typically damaged when the voice coil
overheats due to extended operation above the rated
power. During normal operation, heat generated in the
voice coil is transferred to the speaker’s magnet, which
transfers heat to the surrounding air. For the voice coil to
overheat, both the voice coil and the magnet must overheat. The result is that a loudspeaker can operate above
its rated power for a significant time before it heats sufficiently to cause damage.
The IC’s power limiter includes user-programmable time
constants and power thresholds to match a wide range
of loudspeakers. Program the power limiter’s threshold to
match the loudspeaker’s rated power handling. This can
be determined through measurement or the loudspeaker’s specification. Program time constant 1 to match the
voice coil’s thermal time constant. Program time constant
2 to match the magnet’s thermal time constant. The time
constants can be determined by plotting the voice coil’s
resistance vs. time as power is applied to the speaker.
Table 26. Power Limiter Registers
REGISTER
BIT
NAME
DESCRIPTION
Power Limiter Threshold
If the RMS output power from the speaker amplifiers exceeds this threshold, the output is briefly muted to protect the speaker. The threshold is measured in watts assuming an 8I load. VBAT must correctly reflect the voltage of SPKLVDD/SPKRVDD to
achieve accurate thresholds.
7
VALUE
THRESHOLD
(W)
VALUE
THRESHOLD
(W)
0x0
Power limiter
disabled
0x8
0.27
0x1
0.05
0x9
0.35
0x2
0.06
0xA
0.48
0x3
0.09
0xB
0.72
0x4
0.11
0xC
1.00
0x5
0.13
0xD
1.43
0x6
0.18
0xE
1.57
0x7
0.22
0xF
1.80
6
PWRTH
5
0x42
4
Power Limiter Weighting Factor
Determines the balance between time constant 1 and 2 to match the dominance of
each time constant in the loudspeaker.
2
1
PWRK
0
VALUE
T1 (%)
000
50
50
001
62.5
37.5
010
75
25
011
87.5
12.5
100
100
0
101
12.5
87.5
110
25
75
37.5
62.5
111
REGISTER
BIT
NAME
T2 (%)
DESCRIPTION
93
MAX9888
Power Limiter
The IC’s power limiter tracks the RMS power delivered to
the loudspeaker and briefly mutes the speaker amplifier
output if the speaker is at risk of sustaining permanent
damage.
MAX9888
Stereo Audio CODEC
with FlexSound Technology
Table 26. Power Limiter Registers (continued)
Power Limiter Time Constant 2
Select a value that matches the thermal time constant of the loudspeaker’s magnet.
7
6
PWRT2
5
4
0x43
2
PWRT1
0
TIME CONSTANT
(min)
VALUE
TIME CONSTANT
(min)
0x0
Disabled
0x8
3.75
0x1
0.50
0x9
5.00
0x2
0.67
0xA
6.66
0x3
0.89
0xB
8.88
0x4
1.19
0xC
Reserved
0x5
1.58
0xD
Reserved
0x6
2.11
0xE
Reserved
0x7
2.81
0xF
Reserved
Power Limiter Time Constant 1
Select a value that matches the thermal time constant of the loudspeaker’s voice coil.
3
1
VALUE
VALUE
TIME CONSTANT
(s)
VALUE
TIME CONSTANT
(s)
0x0
Disabled
0x8
3.75
0x1
0.50
0x9
5.00
0x2
0.67
0xA
6.66
0x3
0.89
0xB
8.88
0x4
1.19
0xC
Reserved
0x5
1.58
0xD
Reserved
0x6
2.11
0xE
Reserved
0x7
2.81
0xF
Reserved
Distortion Limiter
The IC’s distortion limiter ensures that the speaker amplifier’s output does not exceed the programmed THD+N limit.
The distortion limiter analyzes the Class D output duty cycle to determine the percentage of the waveform that is
clipped. If the distortion exceeds the programmed threshold, the output gain is reduced.
94
Stereo Audio CODEC
with FlexSound Technology
REGISTER
BIT
NAME
7
6
5
THDCLP
4
0x44
2
1
0
DESCRIPTION
Distortion Limit
Measured in % THD+N.
THDT1
VALUE
THD+N LIMIT (%)
VALUE
THD+N LIMIT (%)
0x0
Limiter disabled
0x8
12
0x1
10FH. Typical 8I speakers exhibit series inductances
in the 20FH to 100FH range.
RF Susceptibility
GSM radios transmit using time-division multiple access
(TDMA) with 217Hz intervals. The result is an RF signal
with strong amplitude modulation at 217Hz and its harmonics that is easily demodulated by audio amplifiers.
The IC is designed specifically to reject RF signals; however, PCB layout has a large impact on the susceptibility
of the end product.
In RF applications, improvements to both layout and component selection decrease the IC’s susceptibility to RF
noise and prevent RF signals from being demodulated into
audible noise. Trace lengths should be kept below 1/4 of
the wavelength of the RF frequency of interest. Minimizing
the trace lengths prevents them from functioning as antennas and coupling RF signals into the IC. The wavelength
(l) in meters is given by: l = c/f where c = 3 x 108 m/s, and
f = the RF frequency of interest.
Route audio signals on middle layers of the PCB to allow
ground planes above and below to shield them from RF
interference. Ideally, the top and bottom layers of the
PCB should primarily be ground planes to create effective shielding.
Additional RF immunity can also be obtained by relying on the self-resonant frequency of capacitors as it
exhibits a frequency response similar to a notch filter.
Depending on the manufacturer, 10pF to 20pF capacitors typically exhibit self resonance at the RF frequencies
of interest. These capacitors, when placed at the input
pins, can effectively shunt the RF noise to ground. For
these capacitors to be effective, they must have a lowimpedance, low-inductance path to the ground plane.
Avoid using microvias to connect to the ground plane
whenever possible as these vias do not conduct well at
RF frequencies.
Startup/Shutdown Sequencing
To ensure proper device initialization and minimal clickand-pop, program the IC’s SHDN = 1 after configuring all
registers. Table 39 lists an example startup sequence for
the device. To shut down the IC, simply set SHDN = 0.
Table 39. Example Startup Sequence
SEQUENCE
1
DESCRIPTION
Ensure SHDN = 0
REGISTERS
0x4C
2
Configure clocks
0x10 to 0x13, 0x19 to 0x1B
3
Configure digital audio interface
0x14 to 0x17, 0x1C to 0x1F
4
Configure digital signal processing
0x18, 0x20, 0x3D to 0x44
5
Load coefficients
0x50 to 0xC7
6
Configure mixers
0x21 to 0x29
7
Configure gain and volume controls
0x2A to 0x3C
8
Configure miscellaneous functions
0x45 to 0x49
9
Enable desired functions
0x4A, 0x4B
10
Set SHDN = 1
0x4C
109
MAX9888
Filterless Class D Operation
Traditional Class D amplifiers require an output filter
to recover the audio signal from the amplifier’s output.
The filters add cost, increase the solution size of the
amplifier, and can decrease efficiency and THD+N
performance. The traditional PWM scheme uses large
differential output swings (2 x VDD peak to peak) and
causes large ripple currents. Any parasitic resistance in
the filter components results in a loss of power, lowering
the efficiency.
MAX9888
Stereo Audio CODEC
with FlexSound Technology
While many configuration options in the IC can be made
while the device is operating, some registers should
only be adjusted when the corresponding audio path is
disabled. Table 40 lists the registers that are sensitive
during operation. Either disable the corresponding audio
path or set SHDN = 0 while changing these registers.
Component Selection
Optional Ferrite Bead Filter
In applications where speaker leads exceed 20mm,
additional EMI suppression can be achieved by using a
filter constructed from a ferrite bead and a capacitor to
ground (Figure 41). Use a ferrite bead with low DC resistance, high-frequency (> 600MHz) impedance between
100I and 600I, and rated for at least 1A. The capacitor
value varies based on the ferrite bead chosen and the
actual speaker lead length. Select a capacitor less than
1nF based on EMI performance.
Input Capacitor
An input capacitor, CIN, in conjunction with the input
impedance of the IC line inputs forms a highpass filter
that removes the DC bias from an incoming analog
signal. The AC coupling capacitor allows the amplifier
to automatically bias the signal to an optimum DC level.
Assuming zero-source impedance, the -3dB point of the
highpass filter is given by:
1
f-3dB =
2πRINCIN
Choose CIN so that f-3dB is well below the lowest frequency of interest. For best audio quality use capacitors
whose dielectrics have low-voltage coefficients, such as
tantalum or aluminum electrolytic. Capacitors with highvoltage coefficients, such as ceramics, may result in
increased distortion at low frequencies.
Charge-Pump Capacitor Selection
Use capacitors with an ESR less than 100mI for optimum
performance. Low-ESR ceramic capacitors minimize the
output resistance of the charge pump. Most surfacemount ceramic capacitors satisfy the ESR requirement.
For best performance over the extended temperature
range, select capacitors with an X7R dielectric.
Table 40. Registers That Are Sensitive to Changes During Operation
REGISTER
DESCRIPTION
0x10 to 0x13, 0x19 to 0x1B
Clock Control Registers
0x14 to 0x17, 0x1C to 0x1F
Digital Audio Interface Configuration
0x18, 0x20
Digital Passband Filters
0x24 to 0x29
Analog Mixers
0x50 to 0xC7
Digital Signal Processing Coefficients
SPK_P
MAX9888
Figure 41. Optional Class D Ferrite Bead Filter
110
SPK_N
Stereo Audio CODEC
with FlexSound Technology
Charge-Pump Holding Capacitor
The holding capacitor (bypassing HPVSS) value and
ESR directly affect the ripple at HPVSS. Increasing
the capacitor’s value reduces output ripple. Likewise,
decreasing the ESR reduces both ripple and output
resistance. Lower capacitance values can be used in
systems with low maximum output power levels. See the
Output Power vs. Load Resistance graph in the Typical
Operating Characteristics section for more information
Unused Pins
Table 41 shows how to connect the IC’s pins when
unused.
Table 41. Unused Pins
NAME
CONNECTION
NAME
CONNECTION
SPKRP
Unconnected
INB1
Unconnected
SPKRVDD
Always connected
INA2/MICEXTN
Unconnected
SPKLVDD
Always connect
LRCLKS2
Unconnected
SPKLP
Unconnected
MCLK
Always connect
RECN/RXINN
Unconnected
SDINS2
AGND
HPVDD
Always connect
Unconnected
C1P
Unconnected
IRQ
MIC1P/DIGMICDATA
HPGND
AGND
INA1/MICEXTP
Unconnected
SPKRN
Unconnected
DGND
Always connect
SPKRGND
Always connect
BCLKS2
Unconnected
SPKLGND
Always connect
SDA
Always connect
Unconnected
SPKLN
Unconnected
SCL
Always connect
RECP/RXINP
Unconnected
REG
Always connect
C1N
Unconnected
REF
Always connect
HPL
Unconnected
MIC1N/DIGMICCLK
Unconnected
HPVSS
Unconnected
MIC2P
Unconnected
SDINS1
AGND
SDOUTS2
Unconnected
LRCLKS1
Unconnected
DVDDS2
DVDD
HPSNS
AGND
DVDD
Always connect
INB2
Unconnected
AVDD
Always connect
HPR
Unconnected
PREG
Always connect
DVDDS1
DVDD
AGND
Always connect
SDOUTS1
Unconnected
MICBIAS
Unconnected
BCLKS1
Unconnected
MIC2N
Unconnected
JACKSNS
Unconnected
111
MAX9888
Charge-Pump Flying Capacitor
The value of the flying capacitor (connected between
C1N and C1P) affects the output resistance of the
charge pump. A value that is too small degrades the
device’s ability to provide sufficient current drive, which
leads to a loss of output voltage. Increasing the value
of the flying capacitor reduces the charge-pump output
resistance to an extent. Above 1FF, the on-resistance
of the internal switches and the ESR of external chargepump capacitors dominate.
MAX9888
Stereo Audio CODEC
with FlexSound Technology
Recommended PCB Routing
The IC uses a 63-bump WLP package. Figure 42
provides an example of how to connect to all active
bumps using 3 layers of the PCB. To ensure uninterrupted ground returns, use layer 2 as a connecting layer
between layer 1 and layer 2 and flood the remaining area
with ground.
Supply Bypassing, Layout, and Grounding
Proper layout and grounding are essential for optimum
performance. When designing a PCB for the IC, partition the circuitry so that the analog sections of the IC are
separated from the digital sections. This ensures that the
analog audio traces are not routed near digital traces.
Use a large continuous ground plane on a dedicated
layer of the PCB to minimize loop areas. Connect AGND,
DGND, HPGND, SPKLGND, and SPKRGND directly to
the ground plane using the shortest trace length possible. Proper grounding improves audio performance,
minimizes crosstalk between channels, and prevents
any digital noise from coupling into the analog audio
signals.
Ground the bypass capacitors on MICBIAS, REG, PREG,
and REF directly to the ground plane with minimum
trace length. Also be sure to minimize the path length to
AGND. Bypass AVDD directly to AGND.
LAYER 1
Connect all digital I/O termination to the ground plane
with minimum path length to DGND. Bypass DVDD,
DVDDS1, and DVDDS2 directly to DGND.
Place the capacitor between C1P and C1N as close as
possible to the IC to minimize trace length from C1P to
C1N. Inductance and resistance added between C1P
and C1N reduce the output power of the headphone
amplifier. Bypass HPVSS with a capacitor located close
to HPVSS with a short trace length to HPGND. Close
decoupling of HPVSS minimizes supply ripple and maximizes output power from the headphone amplifier.
LAYER 2
LAYER 3
Figure 42. Suggested Routing
112
HPSNS senses ground noise on the headphone jack and
adds the same noise to the output audio signal, thereby
making the output (headphone output minus ground)
noise free. Connect HPSNS to the headphone jack shield
to ensure accurate pickup of headphone ground noise.
Bypass SPKLVDD and SPKRVDD to SPKLGND and
SPKRGND, respectively, with as little trace length as
possible. Connect SPKLP, SPKLN, SPKRP, and SPKRN
to the stereo speakers using the shortest traces possible. Reducing trace length minimizes radiated EMI.
Route SPKLP/SPKLN and SPKRP/SPKRN as differential
pairs on the PCB to minimize loop area, thereby the
inductance of the circuit. If filter components are used
on the speaker outputs, be sure to locate them as close
as possible to the IC to ensure maximum effectiveness.
Minimize the trace length from any ground-connected
passive components to SPKLGND and SPKRGND to
further minimize radiated EMI.
Stereo Audio CODEC
with FlexSound Technology
MAX9888
Route microphone signals from the microphone to the IC
as a differential pair, ensuring that the positive and negative signals follow the same path as closely as possible
with equal trace length. When using single-ended microphones or other single-ended audio sources, ground the
negative microphone input as close as possible to the
audio source and then treat the positive and negative
traces as differential pairs.
0.24mm
An evaluation kit (EV kit) is available to provide an example layout for the IC. The EV kit allows quick setup of the
IC and includes easy-to-use software allowing all internal
registers to be controlled.
WLP Applications Information
For the latest application details on WLP construction,
dimensions, tape carrier information, PCB techniques,
bump-pad layout, and recommended reflow temperature profile, as well as the latest information on reliability
testing results, refer to the Application Note 1891: WaferLevel Packaging (WLP) and Its Applications. Figure 43
shows the dimensions of the WLP balls used on the IC.
0.21mm
Figure 43. WLP Ball Dimensions
113
MAX9888
Stereo Audio CODEC
with FlexSound Technology
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the
package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the
package regardless of RoHS status.
114
PACKAGE TYPE
PACKAGE CODE
OUTLINE NO.
LAND PATTERN NO.
63 WLP
W633A3+1
21-0462
Refer to
Application Note 1891
Stereo Audio CODEC
with FlexSound Technology
REVISION
NUMBER
REVISION
DATE
0
6/10
Initial release
—
1
2/11
Updated DAC playback 48kHz stereo, speaker outputs, speaker maximum value
6
DESCRIPTION
PAGES
CHANGED
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2011
Maxim Integrated Products
115
Maxim is a registered trademark of Maxim Integrated Products, Inc.
MAX9888
Revision History
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