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TL072

TL072

  • 厂商:

    DIODES

  • 封装:

  • 描述:

    TL072 - LOW NOISE JFET INPUT OPERATIONAL - Diodes Incorporated

  • 数据手册
  • 价格&库存
TL072 数据手册
TL072 LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS Please click here to visit our online spice models database. Features • • • • • • • • • • • • • Low Power Consumption Wide Common-Mode and Differential Voltage Ranges Low Input Bias and Offset Currents Output Short-Circuit Protection Low Total Harmonic Distortion…0.003% Typ Low Noise Vn= 18nV ΗΖ Typ at f=1kHz General Description The JFET-input operational amplifiers in the TL072 are similar to the TL082, with low input bias and offset currents and fast slew rate. The low harmonic distortion and low noise make the TL072 ideally suited for high-fidelity and audio preamplifier applications. Each amplifier features JFET inputs (for high input impedance) coupled with bipolar output stages integrated on a single monolithic chip. High Input Impedance…JFET-Input Stage Internal Frequency Compensation Latch-Up-Free Operation High Slew Rate…13V/μs Typ Common-Mode Input Voltage Range Includes VCC+ SOP-8L: Available in “Green” Molding Compound (No Br, Sb) Lead Free Finish/ RoHS Compliant (Note 1) Applications • • Active filters Audio pre-amps Ordering Information TL 072 S G - 13 Package S : SOP-8L Green G : Green Packing 13 : Tape & Reel Device TL072SG-13 Notes: Package Code S Packaging (Note 2) SOP-8L 13” Tape and Reel Quantity Part Number Suffix 2500/Tape & Reel -13 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at http://www.diodes.com/products/lead_free.html 2. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf. TL072 Rev. 1 1 of 11 www.diodes.com MAY 2009 © Diodes Incorporated TL072 LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS Pin Assignments (1) Dual channel SOP-8L ( Top View ) OUTPUT1 1 INVERTING INPUT1 2 NON-INVERTING INPUT1 3 VCC- 4 SOP-8L 8 VCC+ TL072 7 OUTPUT2 6 INVERTING INPUT2 5 NON-INVERTING INPUT2 Pin Descriptions Pin Name OUTPUT1 INVERTING INPUT1 NON-INVERTING INPUT1 VCCNON-INVERTING INPUT2 INVERTING INPUT2 OUTPUT2 VCC+ Pin No. 1 2 3 4 5 6 7 8 Description Channel 1 Output Channel 1 Inverting Input Channel 1 Non-inverting Input Supply Voltage Channel 2 Non-inverting Input Channel 2 Inverting Input Channel 2 Ouput Supply Voltage Block Diagram TL072 Rev. 1 2 of 11 www.diodes.com JULY 2009 © Diodes Incorporated TL072 LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS Absolute Maximum Ratings Symbol ESD HBM ESD MM VCC+ VCCVI VID PD TJ TST Notes: (Note 8) Parameter Human Body Model ESD Protection Machine Model ESD Protection Supply Voltage + (Note 3) Supply Voltage - (Note 3) Input voltage (Notes 3 and 5) Differential input Voltage, VID (Note 4) Duration of output short circuit (Note 6) Power Dissipation (Note 7) Operating Junction Temperature Range Storage Temperature Range Rating 1 200 +18 -18 ±15 ±30 Unlimited 860 150 -65 to +150 Unit KV V V V V V mW o C o C 3. ALL voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC-. 4. Differential voltage are at the non-inverting input terminal with respect to the inverting input terminal. 5. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15V, whichever is less. 6. The output may be shorted to ground or either supply. Temperature and/or supply voltage must be limited to ensure that the dissipation rating is not exceeded. 7. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD=(TJ(max)-TA)/ θJA . Operating at the absolute maximum TJ of 150℃ can affect reliability Recommended Operating Conditions Symbol VCC± TA Notes: (Note 8) Description Supply Voltage Operating Ambient Temperature Range Rating Unit V °C ±15 -40 to +85 8. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating Conditions indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. TL072 Rev. 1 3 of 11 www.diodes.com JULY 2009 © Diodes Incorporated TL072 LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS Electrical Characteristics Symbol VIO α (VCC± = ±15V, TA = 25 oC; unless otherwise noted) Parameter Input Offset Voltage Test Conditions VO=0, RS=50Ω TA=25 oC TA= full range Min Typ. 3 18 5 65 Max 6 8 Unit mV μV/ oC vIO IIO IIB VICR VOM Temperature Coefficient VO=0, RS=50Ω, TA= full range of Input Offset Voltage TA=25 oC Input Offset Current VO=0 TA= full range o TA=25 C Input Bias Current VO=0 TA= full range Common Mode Input Voltage Range o RL=10kΩ, TA=25 C Maximum Peak RL≧10kΩ, Output Voltage Swing TA= full range RL≧2kΩ Large Signal Differential VO=±10V, RL≧2kΩ Voltage Amplification Unity Gain Bandwidth Input Resistance Common Mode Rejection Ratio Supply Voltage Rejection Ratio (ΔVCC±/ΔVIO) Supply Current (each amplifier) Crosstalk Attenuation TA=25 oC TA= full range 100 2 200 20 pA nA pA nA V ±11 ±12 ±12 ±10 50 25 -12~+15 ±13.5 V 200 3 1012 AVD B1 ri CMRR kSVR ICC VO1/VO2 SR tr V/mV MHz Ω dB dB 2.5 mA dB V/μs μs % nV HZ TA=25 oC VIC=VICRmin, VO=0 RS=50Ω, TA=25 oC VCC=±9 to ±15V VO=0 RS=50Ω, TA=25 oC VO=0, TA=25 oC No load AVD=100, TA=25 oC V =10V, CL=100pF, RL=2kΩ Slew Rate at Unity Gain I (See Figure 1) Rise Time VI=20mV, RL=2kΩ, CL=100pF (See Figure 1) Overshoot Factor Equivalent Input Noise Voltage RS=20Ω f=1kHz f=10 Hz to 10kHz RS=20Ω, f=1kHz VIrms=6V, AVD=1, RL≧2kΩ, RS≦1kΩ, f=1kHz SOP-8L (Note 9) SOP-8L (Note 9) 75 80 100 100 1.4 120 8 13 0.1 20 18 4 0.01 0.003 145 35 Vn In THD θJA θJC Notes: μV pA HZ Equivalent Input Noise Current Total Harmonic Distortion Thermal Resistance Junction-to-Ambient Thermal Resistance Junction-to-Case % o C/W C/W o 9. Test condition for SOP-8L: Devices mounted on FR-4 substrate PC board, with minimum recommended pad layout. TL072 Rev. 1 4 of 11 www.diodes.com JULY 2009 © Diodes Incorporated TL072 LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS Typical Performance Characteristics Maximum Peak Output Voltage vs Supply Voltage VOM -Maximum Peak Output Voltage(±V) 15.0 RL=10kΩ 12.5 TA =25℃ Maximum Peak Output Voltage vs Temperature VOM -Maximum Peak Output Voltage(±V) 15.0 RL=10kΩ 12.5 RL=2kΩ 10.0 7.5 5.0 2.5 0.0 0 10.0 7.5 5.0 2.5 0.0 0 0 2 4 6 8 10 12 14 16 18 |Vcc±| Supply Voltage (V) VCC±=±15V See Figure 2 -50 -25 0 25 50 75 100 T A-Free Air Temperature (℃ ) Maximum Peak Output Voltage vs Load Resistance VOM -Maximum Peak Output Voltage(±V) 15.0 VCC±=±15V 12.5 10.0 TA =25℃ See Figure 2 Maximum Peak Output Voltage vs Frequency 15.0 VOM -Maximum Peak Output Voltage(±V) VCC±=±15V 12.5 RL=10kΩ TA =25℃ See Figure 2 VCC±=±10V 10.0 7.5 5.0 7.5 5.0 VCC±=±5V 2.5 0.0 0 0.1 10 0.2 0.4 0.7 100 1 2 4 71000 10 Load Resistance (kΩ) 2.5 0 0.0 100 1k 10k 100k 1M 10M Frequency (Hz) TL072 Rev. 1 5 of 11 www.diodes.com JULY 2009 © Diodes Incorporated TL072 LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS Typical Performance Characteristics (Continued) Maximum Peak Output Voltage vs Frequency VOM -Maximum Peak Output Voltage(±V) VOM -Maximum Peak Output Voltage(±V) 15.0 RL=2kΩ 12.5 10.0 VCC±=±10V 7.5 5.0 2.5 0 0.0 100 VCC±=±15V TA =25℃ See Figure 2 15.0 Maximum Peak Output Voltage vs Frequency TA =-40℃ 12.5 10.0 7.5 5.0 2.5 0.0 0 10000 10k TA =25℃ TA =85℃ VCC±=±15V RL=2kΩ See Figure 2 VCC±=±5V 1k 10k 100k 1M 10M Frequency (Hz) 40k 100000 100k 400k1000000 1M 4M 10000000 10M Frequency (Hz) Input Bias Current vs Temperature 100.00 100 VCC±=±15V IIB -Input Bias Current(nA) 10.00 10 AVD -Differential Voltage Amplification (V/mV) 1000.0 1000 400 200 100 100.0 40 20 10 10.0 4 2 1.0 1 Large Signal Differential Voltage Amplification vs Temperature 1 1.00 0.10 0.1 VCC±=±15V VO=±10V RL=2kΩ 0.01 0.01 -50 -25 0 25 50 75 100 TA-Free Air Temperature (℃ ) -50 -25 0 25 50 75 TA-Free-Air Temperature (℃ ) 100 TL072 Rev. 1 6 of 11 www.diodes.com JULY 2009 © Diodes Incorporated TL072 LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS Typical Performance Characteristics (Continued) Supply Current vs Supply Voltage 2.0 1.8 ICC± -Supply Current(mA) ICC± -Supply Current(mA) 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0.0 0 2 4 6 8 10 12 14 16 |Vcc±| Supply Voltage (V) TA =25℃ No Signal No Load 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0.0 -50 Supply Current vs Temperature VCC±=±15V No Signal No Load -25 0 25 50 75 100 TA-Free Air Temperature (℃ ) Total Power Dissipation vs Temperature 150 PD -Total Power Disspation(mW) 125 100 75 50 25 0 -50 -25 0 25 50 75 100 TA-Free Air Temperature (℃ ) VCC±=±15V No Signal No Load CMRR -Common-Mode Rejection Ratio(dB) 98 Common Mode Rejection Ratio vs Temperature VCC±=±15V 97 96 95 94 93 92 91 90 -50 -25 0 25 50 75 100 TA-Free Air Temperature (℃ ) RL=10kΩ TL072 Rev. 1 7 of 11 www.diodes.com JULY 2009 © Diodes Incorporated TL072 LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS Typical Performance Characteristics (Continued) Equivalent Input Noise Voltage vs Frequency Vn - Equivalent Input Noise Voltage(nV/√ Hz) 50 VCC±=±15V 40 RS=20Ω TA =25℃ 30 Input and Output Voltages(V) AVD=10 4 2 0 6 Voltage-Follower Large-Singnal Pulse Response Input VCC±=±5V RL=2kΩ C L=100pF TA =25℃ 20 Output -2 -4 -6 10 0 110 0 40 100 400 1000 1k 4k 10000 10k 40k 100000 100k -0.5 0 0.5 1 Frequency (Hz) 1.5 2 t-Time-μs 2.5 3 3.5 Total Harmonic Distortion vs Frequency 11 0.4 Total Harmonic Distortion(%) VCC±=±15V AVD=1 VO -Output Voltage(mV) VI(RMS)=6V 0.1 0.1 0.04 TA =25℃ 24 20 16 12 8 4 10% 0 28 Output Voltage vs Elapsed Time Overshoot 90 0.01 0.01 0.00 VCC±=±5V RL=2kΩ TA =25℃ tr 0.001 0.001 100 0.1 -4 400 1k 4k 10k 1 10 Frequency(Hz) 40k 100k 100 -0.1 0 0.1 0.2 0.3 0.4 t-Elapsed Time-μs 0.5 0.6 0.7 TL072 Rev. 1 8 of 11 www.diodes.com JULY 2009 © Diodes Incorporated TL072 LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS Test Circuit 10kΩ 1kΩ OUT RL CL=100pF V V CL=100pF OUT RL=2kΩ Figure 1. Unity-Gain Amplifier Figure 2. Gain-of-10 Inverting Amplifier Marking Information (1) SOP-8L ( Top View ) 8 5 Logo Part Number TL072 YY WW X X 1 4 G : Green YY : Year : 08, 09,10~ WW : Week : 01~52; 52 represents 52 and 53 week X : Internal Code TL072 Rev. 1 9 of 11 www.diodes.com JULY 2009 © Diodes Incorporated TL072 LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS Package Information (1) Package type: SOP-8L ( All Dimensions in mm ) 3.85/3.95 5.90/6.10 0.10/0.20 0.254 0.62/0.82 Gauge Plane Seating Plane Detail "A" 7°~9° 1.30/1.50 1.75max. 0.15/0.25 0.35max. 45° 7°~9° Detail "A" 0°/8° 1.27typ 4.85/4.95 0.3/0.5 8x-0.60 5.4 6x-1.27 8x-1.55 Land Pattern Recommendation (Unit: mm) TL072 Rev. 1 10 of 11 www.diodes.com JULY 2009 © Diodes Incorporated TL072 LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated website, harmless against all damages. Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel. Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application. Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks. LIFE SUPPORT Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein: A. Life support devices or systems are devices or systems which: 1. are intended to implant into the body, or 2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user. B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness. Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems. Copyright © 2009, Diodes Incorporated www.diodes.com TL072 Rev. 1 11 of 11 www.diodes.com JULY 2009 © Diodes Incorporated
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