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EPC9065

EPC9065

  • 厂商:

    EPC(宜普)

  • 封装:

    -

  • 描述:

    BOARDDEVFORCLASS-DWIPOAMP

  • 数据手册
  • 价格&库存
EPC9065 数据手册
Development Board EPC9065 Quick Start Guide EPC2007C, EPC8010 6.78 MHz, High Power ZVS Class-D Development Board QUICK START GUIDE EPC9065 DESCRIPTION The EPC9065 is a high efficiency, Zero Voltage Switching (ZVS) differential mode Class-D amplifier development board that operates at, but is not limited to, 6.78 MHz (Lowest ISM band). The purpose of this development board is to simplify the evaluation process of a high power ZVS Class-D amplifier f or u se i n a pplications s uch a s A 4WP w ireless p ower u sing eGaN® FETs by including all the critical components on a single board that can be easily connected into an existing system. To support the increased power capability, two mounted heat sinks are included. The amplifier board features the EPC2007C and the EPC8010, which are 100 V rated enhancement-mode gallium nitride FETs (eGaN® FET). The EPC2007C is used in the Class-D amplifier while the EPC8010 is used as a synchronous bootstrap FET. The amplifier can be set to operate in either differential m ode o r s ingle e nded m ode a nd i ncludes t he g ate d rivers and 6.78 MHz oscillator. For more information on the EPC2007C or EPC8010 eGaN FETs please refer to the datasheet available from EPC at www.epc-co.com. The datasheet should be read in conjunction with this quick start guide. Table 1: Performance Summary (TA = 25°C) EPC9065 Symbol Parameter Min Max Units VDD Logic Input Voltage Range Conditions 7.5 12 V VAMP Amp Input Voltage Range 0 80 V VOUTA Switch Node Output Voltage 80 V VOUTB Switch Node Output Voltage 80 V IOUT 1.8* ARMS -0.3 3.5 0.8 5 V V VOsc_Disable Switch Node Output Current (each) External Oscillator Input Threshold Oscillator Disable Voltage Range -0.3 5 V IOsc_Disable Oscillator Disable Current -25 25 mA Vextosc Input ‘Low’ Input ‘High’ Open drain/ collector Open drain/ collector * Maximum current depends on die temperature – actual maximum current will be subject to switching frequency, bus voltage and thermals. DETAILED DESCRIPTION The EPC9065 consists of a differential mode ZVS Class-D amplifier, a 6.78 MHz oscillator, and a separate heat sink for each Class-D section. The power schematic of the EPC9065 is shown in figure 1. For operating frequencies other than 6.78 MHz, the oscillator can be disabled by placing a jumper into J60 or can be externally shutdown using an externally controlled open collector / drain transistor on the terminals of J60 (note which is the ground connection). The oscillator disable switch needs to be capable of sinking at least 25 mA. The external oscillator can then be connected to J71. ZVS Timing Adjustment + L ZVS12 Q1 L ZVS1 1. With power off, connect the logic input supply (7.5 - 12 V) to VDD connector (J90). Note the polarity of the supply connector. 2. Connect a LOW capacitance oscilloscope probe to the probe-hole of the half-bridge to be set and lean it against the ground post as shown in figure 3. 3. Turn on the logic supply – make sure the supply is set to approximately 7.5 - 12 V. Q 11 L ZVS2 Q2 Q 12 C ZVS1 Setting the correct time to establish ZVS transitions is critical to achieving high efficiency with the EPC9065 amplifier. This can be done by selecting the values for R71, R72, R73, and R74 respectively. This procedure is best performed using a potentiometer installed at the appropriate locations (P71, P72, P73, and P74) that is used to determine the fixed resistor values. The timing MUST initially be set without a load connected to the amplifier. The timing diagrams are given in figure 4 and should be referenced when following this procedure. Only perform these steps if changes have been made to the board as it is shipped preset. The steps are: PAGE 2 | Coil connection VIN C ZVS2 Figure 1: Power schematic of the EPC9065 differential mode ZVS amplifier 4. Turn on the main supply voltage to 5 V to ensure that the switch node waveform looks similar to figure 4. If not, adjust the potentiometers. After verification, the main supply voltage can be set to the required predominant operating value (such as 24 V but NEVER exceed the absolute maximum voltage of 80 V). 5. While observing the oscilloscope, adjust the applicable potentiometers to achieve the green waveform of figure 4. 6. Repeat for the other half-bridge. 7. Replace the potentiometers with fixed value resistors if required. | EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2016 QUICK START GUIDE EPC9065 Determining component values for LZVS The ZVS tank circuit is not operated at resonance, and only provides the necessary negative device current for self-commutation of the output voltage at turn off. The capacitors CZVS1 and CZVS2 are chosen to have a very small ripple voltage component and are typically around 1 µF. The amplifier supply voltage, switch-node transition time will determine the value of inductance for LZVSx which needs to be sufficient to maintain ZVS operation over the DC device load resistance range and coupling between the device and source coil range and can be calculated using the following equation: LZVS = ∆tvt (1) 8 ∙ fsw ∙ (2 ∙ COSSQ + Cwell) Where: ƒSW = Operating Frequency [Hz] COSSQ = Charge Equivalent Device Output Capacitance [F] Cwell = Gate Driver Well Capacitance [F]. For the LM5113, use 20 pF. The amplifier supply voltage VAMP is absent from the equation as it is accounted for by the voltage transition time. The per device charge equivalent capacitance can be determined using the following equation: NOTE. 1 ∙ VAMP C OSS (v) ∙ dv ∫ VAMP 0 3. With power off, connect the logic input power supply bus to +VDD (J90). Note the polarity of the supply connector. This is used to power the gate drivers and logic circuits. 4. Make sure all instrumentation is connected to the system. 6. Turn on the main supply voltage, starting at 0 V and increasing slowly to the required value (it is recommended to start at 5 V for dead time tuning purposes and do not exceed the absolute maximum voltage of 80 V). = Voltage Transition Time [s] COSSQ = 2. With power off, connect the main input power supply bus to the bottom pin of J50 and the ground to the ground connection of J50 as shown in figure 2. 5. Turn on the logic supply – make sure the supply is between 7.5 - 12 V. Δtvt 1. Make sure the entire system, including the heat sink assembly, is fully assembled prior to making electrical connections. This includes any load to be connected. (2) To add additional immunity margin for shifts in load impedance, the value of LZVS can be decreased to increase the current at turn off of the devices (which will increase device losses). Typical voltage transition times range from 2 ns through 12 ns. For the differential case the voltage and charge (COSSQ) are doubled when calculating the ZVS inductance. 7. Once operation has been confirmed, adjust the main supply voltage within the operating range and observe the output voltage, efficiency and other parameters on both the amplifier and device boards. 8. For shutdown, please follow steps in the reverse order. Start by reducing the main supply voltage to 0 V followed by steps 6 through 2. When measuring the high frequency content switch-node (Source Coil Voltage), care must be taken to avoid long ground leads. An oscilloscope probe connection (preferred method) has been built into the board to simplify the measurement of the Source Coil Voltage (shown in figure 3). NOTE. QUICK START PROCEDURE The EPC9065 amplifier board is easy to set up and evaluate the performance of the eGaN FET in a wireless power transfer application. Please note that main power is connected directly to the amplifier. Hence, there is no thermal or over-current protection to ensure the correct operating conditions for the eGaN FETs. If the main power is sourced from a benchtop DC power supply, it is highly advised to set a reasonable current limit of 500 – 800 mA during initial evaluation. EPC9065 amplifier board with heat sink photo EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2016 | |PAGE 3 EPC9065 Gate drive and control supply (note polarity) 0 - 80 V DC + + 7.5 - 12 V DC VIN supply (note polarity) Amplifier timing setting (not installed) External oscillator input (optional) Switch-node main oscilloscope probe Disable pre-regulator jumper Ground post Amplifier board – Front-side Figure 2: Proper connection and measurement setup for the amplifier board Do not use probe ground lead Ground probe against post Place probe tip in large via Minimize loop Figure 3: Proper measurement of the switch nodes using the hole and ground post PAGE 4 | | EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2016 QUICK START GUIDE EPC9065 Q1 turn-off Q2 turn-off VAMP VAMP Q2 turn-on 0 Partial Shootthrough Q1 turn-on 0 Partial time ZVS Shootthrough ZVS time ZVS ZVS + Diode Conduction ZVS ZVS + Diode Conduction Figure 4: ZVS timing diagrams THERMAL CONSIDERATIONS The EPC9065 development board showcases the EPC2007C and EPC8010 eGaN FETs in a ZVS Class-D amplifier application. Although the electrical performance surpasses that of traditional silicon devices, their relatively smaller size does magnify the thermal management requirements. The operator must observe the temperature of the gate driver and eGaN FETs to ensure that both are operating within the thermal limits as per the datasheets. 2–56 x 1/2 inch nylon screw Heat sink shim Heat sink (15 mm x 15 mm x 14.5 mm) A heat sink kit is mounted on each half bridge of the EPC9065 board. Figure 5 shows the assembly order for the heat sink kit. Thermal interface material for device 15 mm x 15 mm. NOTE. The EPC9065 development board has no current protection on board and care must be exercised not to over-current or over-temperature the devices. Excessively wide coil coupling and load range variations can lead to increased losses in the devices. Precautions The EPC9065 development board has no controller or enhanced protection systems and therefore should be operated with caution. Some specific precautions are: adhesive on both sides of thermal pad Cross-section plane OPTIONAL interface frame heat sink rests on frame (thickness = die thickness) Mounting holes center line 1. It is highly advised to set a reasonable current limit of 500 - 800 mA during initial evaluation. 2. Ensure that the gap pad included in the heat sink assembly is firmly compressed on the eGaN FETs prior to full power operation. Be careful not to damage the die by over-tightening of the bolts. EPC die 3. Please contact EPC at info@epc-co.com should there be questions regarding specific load range impedance requirements. 2–56 nylon hex nut Figure 5: Heat sink kit assembly EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2016 | |PAGE 5 QUICK START GUIDE EPC9065 Table 2: Bill of Materials - Amplifier Board Item Qty Reference Part Description 1 2 C1_1, C1_2 Capacitor, Ceramic, 4.7 µF, 10 V, ±20%, X5R Samsung, CL05A475MP5NRNC Manufacturer, Part Number 2 4 C5, C6, C15, C16 Capacitor, Ceramic, 2.2 µF 100 V, ±10%, X7R Taiyo Yuden, HMK325B7225KN-T 3 2 Czvs1, Czvs2 Capacitor, Ceramic, 1.0 µF, 50 V, ±10%, X7R Taiyo Yuden, C2012X7R1H105K125AB 4 3 C90, C91, C92 Capacitor, Ceramic, 1.0 µF, 25 V, ±10%, X7R TDK, C1608X7R1E105K 5 11 C71, C72, C73, C74, C2_1, C2_2, C4_1, C4_2, C5_1, C5_2, C60 Capacitor, Ceramic, 100 nF, 25 V, ±10%, X5R TDK, C1005X5R1E104K050BC 6 8 C1, C2, C3, C4, C11, C12, C13, C14 Capacitor, Ceramic, 10 nF, 100 V, ±10%, X7S TDK, C1005X7S2A103K050BB 7 2 C3_1, C3_2 Capacitor, Ceramic, 22 nF, 25 V, ±10%, X7R TDK, C1005X7R1E223K050BB 8 4 C42, C43, C46, C47 Capacitor, Ceramic, 22 pF, 50 V, ±5%, NPO TDK, C1005C0G1H220J050BA 9 1 R60 Resistor, 47 KΩ, ±5%, 1/10 W Stackpole, RMCF0603JT47K0 10 1 R75 Resistor, 10 KΩ, ±5%, 1/10 W Stackpole, RMCF0603FT10K0 11 2 R3_1, R3_2 Resistor, 2.74 KΩ, ±1%, 1/16 W Panasonic, ERJ-2RKF2741X 12 2 R71, R74 Resistor, 470 Ω, ±1%, 1/16 W Stackpole, RMCF0603FT470R 13 2 R72, R73 Resistor, 390 Ω, ±1%, 1/16 W Stackpole, RMCF0603FT390R 14 2 R2_1, R2_2 Resistor, 20 Ω, ±5%, 1/16 W Stackpole, RMCF0402FT20R0 15 2 R4_1, R4_2 Resistor, 6.8 Ω, ±5%, 1/10 W Panasonic, ERJ-2GEJ6R8X 16 4 R1, R2, R11, R12 Resistor, 2.2 Ω, ±5%, 1/16 W Yageo, RC0402JR-072R2L 17 2 R76, R77 Resistor, 0 Ω, 1/16 W, Jumper Yageo, RC0402JR-070RL Coilcraft, 2929SQ-391JEB 18 2 Lzvs1b, Lzvs2b Inductor, 390 nH, ±5%, ±2%, Q=180 IRMS=4.4 A, 14.5 mΩ, Resonance=590 MHz 19 8 D2_1, D2_2, D3_1, D3_2, D71, D72, D73, D74 Diode, Schottky Diode, 30 V, VF=370 mV at 1 mA, 30 mA Diodes Inc, SDM03U40-7 20 2 D4_1, D4_2 Diode, Zener, 5.1 V, 150 mW ±5% Bourns Inc., BZT52C5V1T-7 21 2 D1_1, D1_2 Diode, Schottky, 40 V, 300 mA, VF=900 mV at 100 mA ST Microelectronics, BAT54KFILM 22 4 Q1, Q2, Q11, Q12 eGaN® FET, 100 V, 6 A, RDS(on)=30 mΩ at 6 A, 5 V EPC, EPC2007C 23 2 Q4_1, Q4_2 eGaN® FET, 100 V, 3.4 A, RDS(on)=160 mΩ at 500 mA EPC, EPC8010 24 1 U90 IC’s, 5 V LDO, 250 mA, up to 16 VIN, Vdropout=0.33 V at 250 mA Microchip, MCP1703T-5002E/MC 25 2 U1_1, U1_2 IC’s, Gate Driver, 5.2 VDC, 1.2 A, 4.5 V to 5.5 V Texas Instruments, LM5113TME/NOPB 26 2 U72, U74 IC’s, Logic 2 NAND Gate, 1.65 V to 5.5 V, ± 24 mA Fairchild, NC7SZ00L6X 27 2 U71, U73 IC’s, 2 Input NAND Gate, Tiny Logic, 1.65 V to 5.5 V, ± 32 mA Fairchild, NC7SZ08L6X Daishinku, DSO221SHF 6.780 28 1 U60 IC’s, Programmable Oscilator 1.5 to 60 MHz, VIN=1.8 V/2.5 V/2.8 V/3.0 V/3.3 V/5.0 V 29 2 TP1, TP2 Test Point, Test Point Subminiature Keystone, 5015 30 3 J60, J71, J90 Header, Male Vertical, 36 Pin. 230" Contact Height, .1" Center Pitch FCI, 68001-236HLF 31 1 J1 Connector, RP-SMA Plug, 50 Ω Linx, CONREVSMA013.062 32 1 J50 Connector, Header 2 Pin .156 Pitch Vertical Gold Molex Inc, 26614020 33 1 PCB1 PCB, EPC9065 REV 1 CCI, EPC9065 REV 1 34 1 C75 Capacitor, DNP, 100 pF, 25 V Generic 35 4 P71, P72, P73, P74 Potentiometer, DNP, Multi Turn Potentiometer, 1 kΩ, ±10%, 1/4 W, 12 Turn Top Adjustment Small Murata, PV37Y102C01B00 36 2 Lzvs1a, Lzvs2a Inductor, DNP, 270 nH, ±5%, Q= 150, DCR= 12.5, F=50 MHz CoilCraft, 2222SQ-271JEB 37 1 C44 IC’s, DNP, Programmable Oscillator 3.3 V, OE, Demo is pre-programmed to 6.78 MHz EPSON, SG-8002CE-PHB, or KDS Daishinku America, DSO221SHF 6.780/1XSF006780EH 38 2 GP1, GP2 Header, DNP .1" Male Vert. Tyco, 4-103185-0-01 EPC would like to acknowledge Coilcraft (www.coilcraft.com) and KDS Daishinku America (www.kdsamerica.com) for their support of this project. EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2016 | |PAGE 6 EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2016 | L in Hin GND GLH GLL L in Gate Driver GUR GUH GUL C3 22 nF, 25 V R2 20 Ω GL H GL L GUR GUH GUL 5 VHS 4.7 V GL H D2 SDM03U40 R3 2.7 K Gbtst 1 2 C4 100 nF, 25 V GUR D4 CD0603-Z5V1 5 VHS C1 4.7 μF , 10 V D1 B AT54K FIL M 5V Synchronous Bootstrap Power Supply 6.8 Ω R4 Figure 6: EPC9065 - Gate Driver Schematic 5 VHS Hin U1 L M5113TM C5 100 nF, 25 V 4.7 V D3 SDM03U40 C2 100 nF, 25 V 5V 1 2 5V 1 2 Q4 EPC8010 QUICK START GUIDE EPC9065 |PAGE 7 Osc .1" Male Ve rt. 1 2 J90 V7 in Logic Supply 7.5 VDC - 12 VDC C75 DNP 100 pF, 25 V OSC R75 10 K Oscillator Output .1" Male Vert. 1 2 1 2 VDD OSC OSC OSC OSC B B A C73 100 nF, 25 V Y U74 NC7SZ00L6X U73 NC7SZ08L6X U72 NC7SZ00L6X IN OUT Logic Supply Regulator C90 1 μF, 25 V 5V 5V 5V Y U90 5.0 V 250 mA DF N C74 100 nF, 25 V 5V 5V B A C72 100 nF, 25 V 5V A C71 100 nF, 25 V 5V B A U71 NC7SZ08L6X 470 Ω R7 1 2 390 Ω R7 2 2 390 Ω R7 3 2 470 Ω R7 4 2 C91 1 μF, 25 V D74 40 V, 30 mA SDM03U40 DNP 1K P74 Deadtime Left 1 D73 40 V, 30 mA SDM03U40 DNP 1K P73 Deadtime Right 1 D72 40 V, 30 mA SDM03U40 DNP 1K P72 Deadtime Left 1 D71 40 V, 30 mA SDM03U40 DNP 1K P71 Deadtime Right 1 C92 1 μF, 25 V 5V H_Sig2 L _Sig2 L _Sig1 H_Sig1 H_Sig2 2 L _Sig1 1 GND GL H GL L 5V GUR GND VCC 5V OUT 3 Osc C60 100 nF, 25 V 5V U60 Pgm Osc. Gate Driver 2 HighEffGateDrvr_r1_0.SchDoc L in Hi n GUH GUL 5 VHS Gate Driver Oscillator OE GND GL H GL L 5V GUR 1 HighEffGateDrvr_r1_0.SchDoc L in Hi n GUH GUL 5 VHS GL H2 GL L2 5V OutB GRH2 GRL2 5 VHS2 GL H1 GL L1 5V OutA GRH1 GRL 1 5 VHS1 Figure 7: EPC9065 – ZVS Class D Schematic Oscillator Disable 2 R6 0 47 k 5V C47 22 pF, 50 V R7 7 0Ω C43 22 pF, 50 V L _Sig2 1 .1" Male Vert. 1 2 J60 C46 22 pF, 50 V 1 R7 6 0Ω C42 22 pF, 50 V H_Sig1 1 2 J71 G ND 4 2 R2 2Ω2 1 TP2 2 GRL 1 Q1 EPC2007C 2 GL L1 Q2 EPC2007C Main Amplifier R1 2Ω2 2 GRL2 Q11 EPC2007C 2 GLL2 Q12 EPC2007C 1 GP2 EMPTY R12 2Ω2 Secondary Amplifier R11 2Ω2 Ground Post .1" Male Vert. GL H2 1 GRH2 1 Ground Post .1" Male Vert. 1 GP1 EMPTY SMD probe loop GL H1 1 GRH1 1 Vamp SMD probe loop 1 TP1 OutB Vamp OutA Vamp Vamp Czvs2 1 μF, 50 V PH1 ProbeHole Main Supply 0 V ~ 80 V 4 A max 1 2 J50 .156" Male Vert. L zvs2b 390 nH L zvs1b 390 nH 1 PAGE 8 | PH2 ProbeHole 1 5V Vamp C4 10 nF, 100 V Vamp C3 10 nF, 100 V C6 2.2 μF, 100 V Vamp C5 2.2 μF, 100 V Vamp HS 2 ZVS Tank Circuit J1 SM A Board Edge Vamp C14 10nF, 100 V Vamp C13 10 nF, 100 V C12 10 nF, 100 V C11 10 nF, 100 V C16 2.2 μF, 100 V Vamp C15 2.2 μF, 100 V Vamp HS- 15 mm x 15 mm WMount Vamp Vamp L zvs2a DNP 270 nH Czvs1 1 μF, 50 V L zvs1a DNP 270 nH C2 10 nF, 100 V C1 10 nF, 100 V HS 1 HS- 15 mm x 15 mm WMount Vamp Vamp EPC9065 | EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2016 For More Information: Please contact info@epc-co.com or your local sales representative Visit our website: www.epc-co.com Sign-up to receive EPC updates at bit.ly/EPCupdates or text “EPC” to 22828 EPC Products are distributed through Digi-Key. www.digikey.com Demonstration Board Notification The EPC9065 board is intended for product evaluation purposes only and is not intended for commercial use. As an evaluation tool, it is not designed for compliance with the European Union directive on electromagnetic compatibility or any other such directives or regulations. As board builds are at times subject to product availability, it is possible that boards may contain components or assembly materials that are not RoHS compliant. Efficient Power Conversion Corporation (EPC) makes no guarantee that the purchased board is 100% RoHS compliant. No Licenses are implied or granted under any patent right or other intellectual property whatsoever. EPC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. EPC reserves the right at any time, without notice, to change said circuitry and specifications.
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