PBL385711NS

PBL 385 71 June 1999 PBL 385 71 High current Speech and Line interface Circuit Description. PBL 38571 is a monolithic integrated speech transmission circuit for use in electronic telephones and as DECT line interface with balanced in - and output. It is designed to accomodate either a low impedance dynamic microphone or an electret microphone that can be supplied from the circuits own DC - supply. A signal summing point at the transmitter input is available. An internally preset line length compensation can be adjusted with external resistors to fit into different current feed systems as for ex. 48 V, 2 x 200 ohms, 48 V, 2 x 400 ohms and 48 V, 2 x 800 ohms.The line regulation can be shut off in low mode. Application dependent parameters such as line balance, side tone level, transmitter and receiver gains and frequency responces are set independently by external components which means an easy adaption to various market needs. The setting of the parameters, if carried out in certain order will counteract the interaction between the settings. It features high line current capability on a small footprint. Function compatible with the PBL 3781 family of speech circuits. Key features. • Minimum number of external components, 5 capacitors and 10 resistors. Easy adaption to various market needs. Mute control input for operation with DTMF - generator. Transmitter and receiver gain regulation for automatic loop loss compensation. Disconnectable. Extended current and voltage range 5 - 130 mA, down to 2 V. Differential microphone input for good balance to ground. Balanced receiver output stage. In 16 - pin DIP and SO BW batwing packages. Short start up time. Excellent RFI performance. • • • • • • • • • 1 15 10 AM 11 AT PBL 385 71 AR REC 4,5, 12,13. 8 7 9 3 2 14 +6 16 Mute (active low) 4 3 2 + 16-pin plastic BW SO 1 P B L 38 Telephone line 1. Impedance to the line and radio interference suppression 2. Transmitter gain and frequency responce network 3. Receiver gain and frequency responce network 4. Sidetone balance network Figure 1. Functional diagram. 1 P 16-pin plastic BW DIP B L 38 57 1 57 1 PBL 385 71 Maximum Ratings Parameter Symbol Min Max Unit Line voltage, tp = 2 s Line current, continuous, DIP (batwing) package Line current, continuous, SO (batwing) package (dependent on mounting) Operating temperature range Storage temperature range No input should be set on higher level than pin 6 (+C). VL IL IL TAmb TStg 0 0 0 -40 -55 18 130 120 +70 +125 V mA mA °C °C MUTE R = 0 - 4kΩ L 0 ohm when artificial line is used VM IM IL R feed = 400Ω + 400Ω 5H + 5H + C ARTIFICIAL LINE + LINE MIC Z Mic = 350Ω V3 + E = 48.5V V2 600Ω V L PBL 38571 with external components See fig. 4 REC V1 C = 1µF when artificial line is used 470µF when no artificial line V4 Z Rec= 350Ω - LINE Figure 2. Test set up without rectifier bridge. MUTE VM RL = 0 - 4kΩ IM R feed = 400Ω + 400Ω 5H + 5H Uz= 15-16V IL + LINE MIC 1µF V2 + Z Mic = 350Ω V3 + E = 50.0V 600Ω V L PBL 38571 with external components See fig. 4 REC V1 V4 Z Rec = 350Ω - LINE Figure 3. Test set up with rectifier bridge. +Line 1 15 R14 310Ω AM 11 AT AR REC 350Ω 4,5, 12,13. 8 7 R4 18k 9 3 2 R7 910Ω R10 6.2k 14 C6 47nF R11 62k +6 16 R16 Mic. 2.7k 350Ω 10 PBL 385 71 C3 100nF Mute (active low) R5 22k R8 560Ω Rg R6 75Ω C5 100nF R9 11k R12 11k R3 910Ω + C1 47µF C2 15nF -Line Figure 4. Circuit with external components for test set up. 2 PBL 385 71 Electrical Characterisics At TAmb = + 25° C. No cable and line rectifier unless otherwise specified. Parameter Line voltage, VL Transmitting gain, note 1 No gain regulation, low mode Transmitting gain, note 1 With gain regulation Ref. fig. 2 2 2 2 Conditions IL = 15 mA IL = 100 mA 20 •10 log (V2 / V3); 1 kHz Rg = 20kΩ 20 •10 log (V2 / V3); 1 kHz RL = 0, RG = ∞ RL = 400 Ω RL = 900 Ω - 2.2 kΩ 1 kHz, RL = 0 to 900 Ω 200 Hz to 3.4 kHz Min 3.3 11 41 41 43.5 46 3 -1 1.7//(2.7) note 3 13.5 17 1.5 3 -75 -18.5 -18.5 -16 -13.5 3 -1 -16.5 -16.5 -14 -11.5 5 -14.5 -14.5 -12 -9.5 7 1 Typ 3.7 13 43 43 45.5 48 5 Max 4.1 15 45 45 47.5 50 7 1 Unit V V dB dB dB dB dB dB kΩ kΩ Vp Vp dBPsoph dB dB dB dB dB dB kΩ Ω Vp Vp Transmitting range of regulation Transmitting frequency response Microphone input impedance Transmitter input impedance pin 3 Transmitter dynamic output Transmitter max output Transmitter output noise Receiving gain, note 1 No gain regulation, low mode Receiving gain, note 1 With gain regulation 2 2 2 2 2 2 2 2 2 1 kHz 200 Hz - 3.4 kHz ≤ 2% distortion, IL = 20 - 100 mA 200 Hz - 3.4 kHz IL = 0 - 100 mA, V3 = 0 - 1 V Psoph-weighting, Rel 1 Vrms, RL = 0 20 • 10 log (V4 / V1); 1 kHz Rg ™ = 20kΩ 20 • 10 log (V4 / V1); 1 kHz RL = 0, RG = ∞ RL = 400 Ω RL = 900 Ω - 2.2 kΩ 1 kHz, RL = 0 to 900 Ω 200 Hz to 3.4 kHz 1 kHz, 1 kHz, 200 Hz - 3.4 kHz ≤ 2% distortion, IL = 20 - 100 mA Measured with line rectifier 200 Hz - 3.4 kHz, IL = 0 - 100 mA, V1= 0 - 50 V A-weighting, Rel 1Vrms, with cable 0 - 3 km, Ø = 0.4 mm 0 - 5 km, Ø = 0.5 mm, 20.5 Receiving range of regulation Receiving frequency response Receiver input impedance Receiver output impedance Receiver dynamic output note 2 Receiver max. output 2 2 2 2 2 3 38 3(+310)note 3 0.5 0.9 Receiver output noise 2 -85 dB A Mute input voltage at mute (active low) pin 7. 2 0.3 V Notes 1. Adjustable to both higher and lower values with external components. 2. The dynamic output can be doubled, see applications information. 3. External resistor in the test set up. 3 PBL 385 71 +L 1 TO 2 TI 3 -L 4 -L 5 +C 6 Mute 7 GR 8 16 RE 2 15 RE 1 14 RI 13 -L 12 -L 11 M2 10 M1 9 MO +L 1 TO 2 TI 3 -L 4 -L 5 +C 6 16 15 14 13 12 11 10 9 RE2 RE1 RI -L -L MI MI MO Mute 7 GR 8 16-pin BW DIP 16-pin BW SO Figure 5. Pin configurations. Pin Descriptions Refer to figure 5. Pin Name 1 2 +L TO Function Output of the transmitter amplifier. Connected to the line through a polarity guard diode bridge. Output of the transmitter amplifier. Connected through a resistor of 47 to 100 ohm to -L, sets the DC-resistance of the circuit. The output has a low ac. impedance and the signal is used to drive a side tone balancing network. Input of transmitter amplifier. Input impedance 17 kohm ± 20 %. Negative power terminal, connected to the line through a polarity guard diode bridge. Positive power supply terminal for most of the circuitry inside the PBL 385 71 (about 1 mA current consumption). The +C pin should be connected to a decoupling capacitor of 47 µF to 150 µF. Mute input. Maximum voltage (to mute) is 0.3 V, current sink requirement of external driver is 100 µA. Input for the gain regulation control circuitry. Output of the microphone amplifier. 3 4,12 5,13 6 7 8 9 10 11 14 15 16 TI } -L +C Mute GR MO MI 1 MI 2 RI RE 1 RE 2 } } Inputs of the microphone amplifier. Input impedance 1.7 kohm ± 20%. Input of receiver amplifier. Input impedance is 38 kohm ± 20 %. Receiver amplifier outputs. Output impedance approximately 3 ohms. 4 PBL 385 71 Functional description Design procedure; ref. to fig.4. The design is made easier through that all settable parameters are returned to ground (-line), this feature differs it from bridge type solutions.To set the parameters in the following order will result in that the interaction between the same is minimized. 1. Set the circuit impedance to the line, either resistive (600Ω) or complex. (R3 and C1). C1 should be big enough to give low impedance compared with R3 in the telephone speech frequency band.Too large C1 will make the start-up slow. See fig. 6. 2. Set the DC-characteristic that is required in the PTT specification or in case of a system telephone,in the PBX specification (R6).There are also internal circuit dependent requirements like supply voltages etc. 3. Set the attac point where the line length regulation is supposed to cut in (R1 and R2 in fig. 18). Note that in some countries the line length regulation is not allowed. In most cases the end result is better and more readily achieved by using the line length regulation (line loss compensation) than without. See fig. 13. 4.Set the transmitter gain and frequency response. 5. Set the receiver gain and frequency response. See text how to limit the max. swing to the earphone. 6. Adjust the side tone balancing network. 7. Set the RFI suppression components in case necessary. In two piece telephones the often ”helically” wound cord acts as an aerial. The microphone input with its high gain is especially sensitive. 8. Circuit protection. Apart from any other protection devices used in the design, a good practice is to connect a 15V 1W zener diode across the circuit , from pin 1 to -Line. +Line 1 6 a) b) c) 220Ω Cx PBL 38 571 R3 820Ω 3 2 Rs ≈1Ω + C1 Example: How to connect a complex network. 220Ω+820Ω//Cx -Line C2 R6 Figure 6. AC-impedance. bypassed by a capacitor. To help up this situation the complex network capacitor is connected directly to ground, case c). making the ratio Rs/220Ω+820Ω and thus lessening the error signal. Conclusion: Connect like in case c) when complex impedance is specified. Impedance to the line The AC- impedance to the line is set by R3, C1 and C2. Fig.4. The circuits relatively high parallel impedance will not influence it to any noticeable extent. At low frequencies the influence of C1 can not be neglected. Series resistance of C1 that is dependent on the temperature and the quality of the component will cause some of the line signal to enter pin 6. This generates a closed loop in the transmitter amplifier that in it´s turn will create an active impedance thus lowering the impedance to the line. The impedance at high frequencies is set by C2 that also acts as a RFI suppressor. In many specifications the impedance towards the line is specified as a complex network. See fig. 6. In case a). the error signal entering pin 6 is set by the ratio ≈Rs/R19 (910Ω), where in case b). the ratio at high frequencies will be Rs/ 220 Ω b ecause the 820 Ω r esistor is DC - characteristic The DC - characteristic that a telephone set has to fulfill is mainly given by the network administrator. Following parameters are useful to know when the DC behaviour of the telephone is to be set: • • • • • • The voltage of the feeding system The line feeding resistance 2 x....... ohms. The maximum current from the line at zero line length. The min. current at which the telephone has to work (basic function). The lowest and highest voltage permissible across the telephone set. The highest voltage that the telephone may have at different line currents. Normally set by the network owners specification.The lowest voltage for the telephone is normally set by the voltages that are needed for the different parts of the telephone to function. For ex. for transmitter output amplifier, receiver output amplifier, dialler, speech switching. + Line 3 1 + AM 2 AT AR 4 Transmitter summing input - Line Mute Figure 7. Block connections. 5 PBL 385 71 V 16 14 12 10 8 6 4 2 V telephone line V line V pin 4 V pin 2 I 20 Figure 8. DC - Characteristics. (R6 =75Ω) R6 will set the slope of the DC-char. and the rest of the level is set by some constants in the circuit as shown in the equation below. The slope of the DC-char. will also influence the line length regulation (when used ) and thus the gain of both transmitter and receiver. See the table under gain regulation. R6 also acts as power protection for the circuit, this must be kept in mind when low values of R6 are considered. microphone amplifier can be used for dynamic or electret transducers. See fig. 10. An electret microphone with a built in FET amplifier is to be seen from outside as a high impedance constant current generator and is normally specified with a load resistance of ≈ 2k. This is to be considered as max. value and by using it will render the max. gain from the microphone. This level of input signal that is unnecessary high will result in clipping in the microphone amplifier and could in mute condition permeate through the input to the circuits reference and this way to all functions, resulting among other things in a bad mute. Hence it is better regarding noise perfomance and mute to rather use the gain of the microphone amplifier than the gain of the microphone itself (in case of electret) flat out. A more suitable level of gain from the microphone is achieved by using a load resistance of 330 - 820Ω. A low microphone impedance will also improve RFI suppression. Gain setting to the line is done at the input of the transmitter. The microphone amplifier has its own L 40 60 80 100 120 mA V Line ≈ 2 + 1.5 ⋅ R 6 ⋅ I line V telephoneline ≈ 1.5 V + V line Microphone amplifier The microphone amplifier in PBL38571 is divided into two stages. The first stage is a true differential amplifier providing high CMRR (-55 to -65 dB typical) with voltage gain of 19 dB. This stage is followed by a gain regulated amplifier with a regulation range of 5 ± 2 dB. The input of the 6 temperature stable reference to prevent overhearing to other parts and functions on the chip.It is possible to use the microphone amplifier as a limiter ( added) to the limiter in the transmitter output stage of the transmitted signal. See fig.9. The positive output swing is then limited by the peak output current of the microphone amplifier. The negative swing is limited by the saturation voltage of the output amplifier. The output of the amplifier is DCvice at internal reference level (1.2V). The lowest negative level for the signal is reference minus one diode and saturated tranistor drop. (1.2-0.6-0.1 = 0.5V) The correct clipping level is found by determining the composite AC- and DCload that gives a maximum symmetrical unclipped signal at the output. This signal is then fed into the transmitter amplifier at a level that renders a symmetrical signal clipping on the line. (adjust with ratio R4,R5) The total transmitter gain when an electret microphone is used can then be adjusted with the load resistor of the electret microphones buffer amplifier. PBL 385 71 (a) 9 PBL 38571 (b) 9 6 PBL 38571 PBL 38571 DC ( ref. ≈ 1.2V ) constant current generator 10 M 11 10 11 + + Dynamic microphone M ref. minus a diode ≈ 0.5V 9 R Unbalanced electret mic. with balanced signal, DC-supply from pin 6. DCload ACload (c) 9 10 6 PBL 38571 M C+ 11 + DC-load = R4+R5 AC-load = R4+R5//ZTI Balanced electret microphone. An additional RC filterlink is recommended if pin 6 is used as a supply. Figure 9. Microphone amplifier output clipping. Figure 10. Microphone solutions. Transmitter amplifier The transmitter amplifier in PBL38571 consists of three stages. The first stage is an amplitude limiter for the input signal at TI, in order to prevent the transmitted signal to exceed a certain set level and cause distortion. The second stage amplifies further the signal from the first and adds it to a DC level from an internal DC-regulation loop in order to give the required DC characteristic to the telephone set. The output of this stage is TO. The third stage is a current generator that presents a high impedance towards the line and has its gain from TO to +L. The gain of this amplifier is ZL/R6 where ZL is the impedance across the telephone line. Hence, the absolute maximum signal amplitude that can be transmitted to the line undistorted is dependent of R6. (amplitude limiting) The transmitter gain and frequency response is set by the RC-network between the pins 9 and 3. See fig.11. The capacitor for cutting the high end of frequency band is best to be placed directly at the microphone where it also will act as a RFI suppressor. The input signal source impedance to the transmitter amplifier input TI should be reasonably low in order to keep the gain spread down, saying that R4//R5 (see fig. 4) must be at least a factor 5 lower than the ZTin. Observe that the capacitor C1 should have a reasonably good temperature behaviour in order to keep the impedance rather constant. The V+C´s influence on the transmitter DC-characteristic is shown in the fig.8 (DC-characteristic), therefore the transmitter gain would change if the transmitted signal gives reason to an acvoltage leak signal across C1 since this is a feedback point. If the transmitter has an unacceptable low sving to the line at low line currents 5k The capacitor C is optional Gain regulation. Both the receiver and transmitter are gain regulated (line loss compensated). There is a fixed default compensation on the chip that can be adjusted or or set to constant low gain mode. The input impedance at the gain regulation pin 8 is 5.5k ± 20%. The default regulation pattern is valid when the input is left open. Fig. 13 shows a typical transmitter or receiver 8 Figure 12. Receiver arrangements. gain pattern versus line length. The following will show, what to alter, to change the look of the curve. a). Adjustable with the divider R4,R5 for the transmitter and with R12 for the receiver. b). The attack point of the regulator is adjusted with the divider R1,R2 (fig. 18) to either direction, up or down, on the line current axis. c). The angle of elevation of the curve is mainly set by the value of R6. If the DCcharacteristics is set according to the line parameters and a correct value for R6 is chosen the angle is mostly correct but it can be adjusted with R6. The adjustement will affect the DC-characteristics as well as most of the other parameters. This is why the DC- characteristic is set early in the design phase. PBL 385 71 dB Battery feed Regulation: 48V, 2 • 200Ω 48V, 2 • 400Ω 48V, 2 • 800Ω R1 R2 ∞ ∞ ∞ R6 c. b. { ∞ 450k ∞ 47Ω 75Ω 75Ω a. High limit Sweden, apply for spec. application. No regulation: All feedings: Set for low gain Set for high gain ∞ 75k 22k ∞ 47 - 75Ω 47 - 75Ω Low limit I Figure 13. Gain regulation principle. What is balancing the side tone? To understand that side tone balancing is to counteract the signal, that is transmitted via the microphone and transmitter to the line, returning to the earphone via the receiver. That presence of a strong side tone signal is disturbing in a way that one quite instictively lowers ones own voice level thus lowering the signal level for the other party. But again, if the balance is too good (seldom the case) the earphone will feel ”dead”. In practical terms what is expected is the same amplitude of ones own voice in the ear as when not talking in a telephone. The need to lower the side tone level where no balancing has been done is in the order of 6 - 12 dB. To understand that the side tone is influenced by other factors like, the impedance of the line and the signal that enters the ear acoustically directly from the mouth and from the mouth through the material in the handset. The signal that enters the microphone from the earphone acoustically will also influence the return loss factor to the telephone line. To understand that the side tone network can be trimmed to form a veritable ”distortion analyser”, so that the distortion that is present from the microphone, will be the only signal entering the earphone and this signal even being small will sound very bad. It is better to induce some of the fundamental frequency back by making the balance less perfect at that frequency. This is valid for a network that is trimmed to only one frequency. It is to strive to trim the network such that it will attenuate the fundamental and the harmonic frequencies alike throughout the different line combinations. To understand that if one of the two signals entering the balancing system from either direction, direct from microphone or via the line, is clipped, will result in a very distorted signal entering the receiver amplifier and thus the earphone. Further , to remember that side tone is a small signal that is the difference of two large signals and that the amplitude of the distortion can be up to ten times the amplitude of the fundamental frequency. Telephone set side Line side a. 1 A short guidance for understanding the side tone principle. (See fig.14.) Assuming the line impedance to be 600Ω. ( theorethical value ) Z1 = Line impedance Z2 = The telephone set impedance 600Ω Z1//Z2 = 300Ω R6 will have a certain value 39 - 100Ω to give the telephone a specified DCcharacteristic and overcurrent protection. Assuming that this DC-characteristic requires R6=60Ω, hence it will be 1/5 of the Z1//Z2. This will in transmitting mode result that 1/5 of the ac-signal that is on the line appear across R6. PBL 38 571 15 Tx 2 14 R7 Rx 16 b. Z2 Z1 c. R10 C6 R11 R8 R6 C5 Zbal R9 R12 Figure 14. The side tone suppression principle. 9 PBL 385 71 Note that the signals at points a. and b. are 180 degrees off phase. 10 x R6 ≈ R7 + Zbal Note #1 R7 ≈ Zbal Note#2 The ac-signal at point c. is now 1/10 of the signal on the line because it is further divided by two from point b. (R7≈Zbal). Hence 10 x R10 ≈ R11 to satisfy the balancing criteria. R12 is to set the receiver gain. ( can also be a volume control potentiometer). Note #1 These values ensure that the frequency behaviour of the transmitter is not influenced. With the ratio 1/10 the influence is 1 dB, and with ratio 1/20 it´s 0.5 dB. Note #2 If the R7 is made low ohmic compared with Zbal, it will load the latter and result in a bad side tone perfomannce, again if the R7 is made high ohmic compared with Zbal will result in a low signal to balance the side tone with and make the balancing difficult. Making any of the impedances unnecessary high will make the circuit sensitive to RFI. All values given here are approximate and serve as starting entities only. The final trimming of side tone network is a cut and try proposition because a part of the balance lies in the acoustical path between the microphone and earphone. a) Mute IMute PBL 38571 7 Mute IMute b) PBL 38571 7 c) PBL 38571 7 -L d) PBL 38571 Rx Mute 14 Muting points 15 VMute -L VMute -L 16 The diode has to be low voltage drop type. Receiver mute only. Figure 16. Mute input. Mute function. The circuit has a mute function at pin 7. Sinking current from this pin will cut off the gain in the microphone amplifier (attenuation min. 60dB) and decrease the gain in the receiver amplifier to reach the confidence tone level at DTMF-dialling. The receiver mute is ≈ 40dB down from the unmuted value to satisfy those who keep the handset close to the ear at dialling. Figure 15 b.) If the system mute signal is used to other tasks than muting the speech circuit it has to be isolated. If a diode is used it has to be a low voltage drop type. The input at mute has to be below 300mV. If the mute signal has reverse polarity out of the system it can be phase changed like in c.) In case it is required to mute the receiver only, d.) it can be done by shorting the receiver input to ground before or after the input capacitor. Shorting the input pin to ground (does not have to be absolute ground) actuates a mute by driving the amplifier into saturation thus blocking the signal path and rendering a mute with high attenuation but will cause a DC-level shift at output which in its turn will cause a ”click ” in the earphone. This can be softened with a slower mute signal flank. If the second approach, grounding before the input capacitor is chosen, the grounding has to be low ohmic in order to render a high attenuating mute. Reverse side tone network. This type of side tone balancing will help when for some reason there is a need to make the R6 low < 47Ω and thus the signal for balancing gets small across R6. By placing the balancing network like shown in fig.15 the possible signal level is 6 dB higher than in the first case and it will also help in case when a volume control is added to the receiver. Optional conditions: For users who keep the handset from the ear, the confidence tone level is too low. To alter the level, a signal can be taken from DTMF generator output to receiver input before the capacitor C6. The added impedance to this point will hardly disturbe the signal condition in active speech mode. The microphone amplifier only, can be muted by sinking current from the output pin 9. See fig. 4 or 9. Start up circuit The circuit contains a start up device which function is to fast charge capacitor C1 when the circuit goes into hook- off condition. The fast charge circuit is a thyristor function between pins 1 and 6 that will stop conducting when the current drain at pin 6 is lower than ≈ 700 µA + the internal current consumption ( about 1 mA). Care must be taken when connecting external load to pin 6 in order not to exeed the ≈ 700 µA limit. Should this happen, it would result in an inoperative speech funktion. This circuit can not retrigger before the voltage level at C1 drops below 2V or the line voltage is below 1V. See fig. 17. +Line 1 PBL 38571 2 R10 C6 +Line R6 R12 R11 C* Z bal. 14 PBL 38 571 Tx 2 DC supply R3 6 C1 -Line * To give receiver flat frequency response Figure 15. Reverse side tone network with complex R11. 10 Figure 17. Fast startup circuit. PBL 385 71 Power supply V+C. line current. It can be used to feed an electret microphone. Caution must be taken though not to drain too much current out of this output because it will affect the internal quick start circuit by locking itself into active state. (max. permissible current drain 700µA) Care has to be taken when deciding the resistance value of R3. See fig.6. All resistances that are applied from +Line to ground (-Line) will be in parallel, forming the real impedance towards the line. This will sometimes result in, that the ohmic value of R3 is increased in order to comply to the impedance specification towards the line. The speech circuit sinks ≈ 1mA into pin 6, which means that the working voltage for the speech function V+ will decrease with increasing R3, thus starving in the end the circuit of its working voltage . This dependency is often falsely taken as a sign of that the circuit does not work down to the low line current specified, but in fact it is the working voltage at pin 6 that has become too low. It is obvious that this problem is also connected into what kind of DC-characteristic is set. See fig. 8. (See fig.18) PBL 385 71 generates its own DC supply V+C dependent of line current with an internal shunt regulator. This regulator senses the line voltage VL via R3 and line current via R6 in order to set the correct V+C so the circuit can generate the required DC characteristic for a given line resistance RLine and the line feeding data of the exchange. A decoupling capacitor is needed between pins +C and -L. The V+C supply changes its voltage linearly with the 1-5M Hook switch 15k 1 + VDD 47µF 5.1V 200Ω 1µ F 10 PBL 385 71 AM AT AR + 15 100 Ω MIC. 11 CMOS DIALLER 1nF 1N4007 4,5, 12,13 8 16 +6 1N4007 MUTE 200 Ω 1µF DTMF GND 7 9 3 2 14 47nF 18k 910Ω 100nF 6.2k 62k 560Ω R3 910 Ω C2 15nF 15V 1W 1N4007 1N4007 Teleph line 1 4 7 2 5 8 0 3 6 9 # 100 µ F R2 R1 22k 75 Ω 11k 100nF 11k 10Ω + C1 47µ F * + 1k Figure 18. Typical standard DTMF dialling telephone application. 11 PBL 385 71 Short about Radio Frequency Interference RFI. HF suppression at the microphone input. The HF-signal at the microphone input can be seen composed as of two components. One component being the differential (between pins 10 and 11) and the second related to ground at pin 4. Of these two, the first is the most serious, entering the amplifier directly being amplified and detected. The second component is less serious because it affecting both inputs alike and most of it will be balanced out of the amplifier. There might be the case where the HF-signal will have such an amplitude that the amplifier can not balance it out. Then components must be filtered with capacitors and maybe resistors. It is extremely important that everything that is done at the input is in balance, otherways the problem might get worse instead of better. The extreme balance requirement goes all the way to the PCB-layout. Small unbalance signals can be corrected with capacitors marked with*) this requiring high precision components. See fig.19a. The solution shown is rather expensive but with precision components it renders good filtering at the input. If the main problem is the signal between the inputs, try to increase the 1nF capacitor but make the others procentually smaller in order to maintain the frequency response. A more simple solution, that is sufficient in most of the cases is also shown in fig. 19b. a) 10n 10n 9 b) + 9 c) * 100Ω Mic. 100Ω 1n 11 10 9