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PBL38630-2

PBL38630-2

  • 厂商:

    ERICSSON

  • 封装:

  • 描述:

    PBL38630-2 - Subscriber Line Interface Circuit - Ericsson

  • 数据手册
  • 价格&库存
PBL38630-2 数据手册
March 2000 PBL 386 30/2 Subscriber Line Interface Circuit Description The PBL 386 30/2 Subscriber Line Interface Circuit (SLIC) is a 90 V bipolar integrated circuit for use in Digital Loop Carrier, FITL and other telecommunications equipment. The PBL 386 30/2 has been optimized for low total line interface cost and a high degree of flexibility in different applications. The PBL 386 30/2 emulates resistive loop feed, programmable between 2x50 Ω and 2x900 Ω, with short loop current limiting adjustable to max 45 mA. In the current limited region the loop feed is nearly constant current with a slight slope corresponding to 2x30kΩ. A second lower battery voltage may be connected to the device to reduce short loop power dissipation. The SLIC automatically switches between the two battery supply voltages without need for external components or external control. The SLIC incorporates loop current and ring trip detection functions. The PBL 386 30/2 is compatible with loop start signaling. Two- to four-wire and four- to two-wire voice frequency (VF) signal conversion is accomplished by the SLIC in conjunction with either a conventional CODEC/filter or with a programmable CODEC/filter, e.g. SLAC, SiCoFi, Combo II. The programmable two-wire impendance, complex or real, is set by a simple external network. Longitudinal voltages are suppressed by a feedback loop in the SLIC and the longitudinal balance specifications meet the DLC requirements. The PBL 386 30/2 package options are 24-pin SSOP, 24-pin SOIC and 28-pin PLCC. Key Features • 24-pin SSOP package • High and low battery supply with automatic switching • 65 mW on-hook power dissipation in active state • On-hook transmission • Long loop battery feed tracks Vbat for maximum line voltage • Only +5 V feed in addition to battery • Selectable transmit gain (1x or 0.5x) • No power-up sequence • Programmable signal headroom • 43V open loop voltage @ -48V battery feed • Constant loop voltage for line leakage 10 kΩ @ -48V) • Full longitudinal current capability during on-hook state • Analog over temperature protection permits transmission while the protection circuit is active • Integrated Ring Relay Driver Ring Relay Driver RRLY • -40°C to +85°C ambient temperature range DT DR TIPX RINGX HP Ring Trip Comparator Input Decoder and Control C1 C2 DET Two-wire Interface PLC LP PLD REF VTX P VCC VBAT2 VBAT Off-hook Detector AGND BGND VF Signal Transmission PBL 386 30/2 RSN PTG 24-pin SOIC, 24-pin SSOP, 28-pin PLCC Figure 1. Block diagram. 1 38 PB 63 L 0/ 2 Line Feed Controller and Longitudinal Signal Suppression POV B L PSG 38 6 30 /2 PBL 386 30/2 Maximum Ratings Parameter Symbol Min Max Unit Temperature, Humidity Storage temperature range Operating temperature range Operating junction temperature range, Note 1 Power supply, -40 °C ≤ TAmb ≤ +85 °C VCC with respect to A/BGND VBat2 with respect to A/BGND VBat with respect to A/BGND, continuous VBat with respect to A/BGND, 10 ms Power dissipation Continuous power dissipation at TAmb ≤ +85 °C Ground Voltage between AGND and BGND Relay Driver Ring relay supply voltage Ring trip comparator Input voltage Input current Digital inputs, outputs (C1, C2, DET) Input voltage Output voltage TIPX and RINGX terminals, -40°C < TAmb < +85°C, VBat = -50V Maximum supplied TIPX or RINGX current TIPX or RINGX voltage, continuous (referenced to AGND), Note 2 TIPX or RINGX, pulse < 10 ms, tRep > 10 s, Note 2 TIPX or RINGX, pulse < 1 µs, tRep > 10 s, Note 2 TIPX or RINGX, pulse < 250 ns, tRep > 10 s, Notes 2 & 3 TStg TAmb TJ VCC VBat2 VBat VBat PD VG -55 -40 -40 -0.4 VBat -75 -80 +150 +110 +140 6.5 0.4 0.4 0.4 1.5 °C °C °C V V V V W V -0.3 0.3 BGND+14 V VDT, VDR IDT, IDR VID VOD ITIPX, IRINGX VTA, VRA VTA, VRA VTA, VRA VTA, VRA VBat -5 -0.4 -0.4 AGND 5 VCC VCC +100 2 5 10 15 V mA V V -100 -80 VBat -10 VBat -25 VBat -35 mA V V V V Recommended Operating Condition Parameter Symbol Min Max Unit Ambient temperature VCC with respect to AGND VBat with respect to AGND AGND with respect to BGND TAmb VCC VBat VG -40 4.75 -58 -100 +85 5.25 -8 100 °C V V mV Notes 1. 2. 3. The circuit includes thermal protection. Operation at or above 140°C junction temperature may degrade device reliability. With the diodes DVB and DVB2 included, see figure 11. RF1 and RF2 ≥ 20 Ω is also required. Pulse is applied to TIP and RING outside RF1 and RF2. 2 PBL 386 30/2 Electrical Characteristics -40 °C ≤ TAmb ≤ +85 °C, PTG = open (see pin description), VCC = +5V ±5 %, VBat = -58V to -40V, VBat2 = -32 V, RLC=32.4 kΩ, IL = 27 mA. RL = 600 Ω, RF1= RF2 = 0, RRef = 49.9 kΩ, CHP = 47 nF, CLP=0.15 µF, RT = 120 kΩ, RSG = 0 kΩ, RRX = 60 kΩ, RR = 52.3 kΩ ROV = ∞, unless otherwise specified. Current definition: current is positive if flowing into a pin. Parameter Ref fig Conditions Min Typ Max Unit Two-wire port Overload level, VTRO ,ILdc > 18mA On-Hook, ILdc < 5mA Input impedance, ZTR Longitudinal impedance, ZLOT, ZLOR Longitudinal current limit, ILOT, ILOR Longitudinal to metallic balance, BLM 2 Active state, 1% THD, ROV = ∞ Note 1 Note 2 0 < f < 100 Hz active state IEEE standard 455-1985, ZTRX=736Ω 0.2 kHz < f < 1.0 kHz, Tamb 0-70°C 1.0 kHz < f < 3.4 kHz, Tamb 0-70°C 0.2 kHz < f < 1.0 kHz, Tamb -40-85°C 1.0 kHz < f < 3.4 kHz, Tamb -40-85°C 0.2 kHz < f < 1.0 kHz, Tamb 0-70°C 1.0 kHz < f < 3.4 kHz, Tamb 0-70°C 0.2 kHz ≤ f ≤ 1.0 kHz, Tamb -40-85°C 1.0 kHz < f < 3.4 kHz, Tamb -40-85°C 2.7 1.1 ZT/200 20 28 63 60 60 55 63 60 60 55 66 66 66 66 66 66 66 66 35 VPeak VPeak Ω/wire mArms /wire dB dB dB dB dB dB dB dB Longitudinal to metallic balance, BLME Longitudinal to four wire balance BLFE ELo BLME = 20 · Log VTR ELo VTX Metallic to longitudinal balance, BMLE V BMLE = 20 · Log TR ; ERX = 0 VLO BLFE = 20 · Log 3 3 4 0.2 kHz < f < 3.4 kHz 40 50 dB Figure 2. Overload level, VTRO , two-wire port 1 20 kΩ, 1% THD, Note 4 30 20 35 22 - 1.3 VBat +3.0 VBat +4.3 dB dB V V V VPeak VPeak mV Ω V Ω ratio 2.7 1.1 -100 0.2 kHz < f < 3.4 kHz IRSN = -55 µA 0.2 kHz < f < 3.4 kHz 0.3 kHz < f < 3.4 kHz 1.15 0 15 1.25 8 200 100 50 1.35 20 relative to 0 dBm, 1.0 kHz. ERX = 0 V 0.3 kHz < f < 3.4 kHz f = 8.0 kHz, 12 kHz, 16 kHz -0.20 -1.0 0.10 0.1 dB dB TIPX C VLo RLT V TR RLR RINGX VTX PBL 386 30/2 RSN RT E RX Figure 4. Metallic to longitudinal and fourwire to longitudinal balance 1
PBL38630-2 价格&库存

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