A6150A1XSO8B

EM MICROELECTRONIC-MARIN SA A6150 High Efficiency Linear Power Supply with Power Surveillance and Software Monitoring Features Highly accurate 5 V, 100 mA guaranteed output Low dropout voltage, typically 380 mV at 100 mA Low quiescent current, typically 175 µA Standby mode, maximum current 340 µA (with 100 µA load on OUTPUT) Unregulated DC input can withstand –20 V reverse battery and + 60 V power transients Fully operational for unregulated DC input voltage up to 26 V and regulated output voltage down to 3.0 V Reset output guaranteed for regulated output voltage down to 1.2 V No reverse output current Very low temperature coefficient for the regulated output Current limiting Comparator for voltage monitoring,voltage reference 1.52 V Programmable reset voltage monitoring Programmable power on reset (POR ) delay Watchdog with programmable time windows guarantees a minimum time and a maximum time between software clearing of the watchdog Time base accuracy ± 10% System enable output offers added security TTL/CMOS compatible -40 to +85 °C temperature range On request extended temperature range,-40 to +125 °C DIP8 and SO8 packages software clears the watchdog too quickly (incorrect cycle time) or too slowly (incorrect execution) it will cause the system to be reset. The system enable output prevents critical control functions being activated until software has successfully cleared the watchdog three times. Such a security could be used to prevent motor controls being energized on repeated resets of a faulty system. Applications Automotive systems Cellular telephones Security systems Battery powered products High efficiency linear power supplies Automotive electronics Version A0: Version A1: Unregulated voltage INPUT OUTPUT A6150 R VIN TCL RES EN 5V Description The A6150 offers a high level of integration by combining voltage regulation, voltage monitoring and software monitoring in an 8 lead package. The voltage regulator has a low dropout voltage (typ. 380 mV at 100 mA) and a low quiescent current (175 µA). The quiescent current increases only slightly in dropout prolonging battery life. Built-in protection includes a positive transient absorber for up to 60 V (load dump) and the ability to survive an unregulated input voltage of –20 V (reverse battery). The input may be connected to ground or a reverse voltage without reverse current flow from the output to the input. A comparator monitors the voltage applied at the VIN input comparing it with an internal 1.52 V reference. The poweron reset function is initialized after VIN reaches 1.52 V and takes the reset output inactive after TPOR depending of external resistance. The reset output goes active low when the VIN voltage is less than 1.52 V. The RES and EN outputs are guaranteed to be in a correct state for a regulated output voltage as low as 1.2 V. The watchdog function monitors software cycle time and execution. If VSS GND Fig. 1 Typical Operating Configuration Pin Assignment DIP8/ SO8 EN RES TCL VSS A6150 V IN R OUTPUT INPUT Fig. 2 1 A6150 Absolute Maximum Ratings Parameter Continuous voltage at INPUT to VSS Transients on INPUT for t < 100 ms and duty cycle 1% Reverse supply voltage on INPUT Max. voltage at any signal pin Min. voltage at any signal pin Storage temperature Electrostatic discharge max. to MIL-STD-883C method 3015 Max. soldering conditions Symbol VINPUT VTRANS VREV VMAX VMIN TSTO VSmax TSmax Conditions -0.3 to + 30 V up to + 60 V - 20 V OUTPUT + 0.3 V VSS – 0.3 V -65 to + 150 °C 1000 V 250 °C x 10 s Operating Conditions Parameter Operating junction temperature 1) INPUT voltage 2) OUTPUT voltage 2) 3) RES & EN guaranteed 4) OUTPUT current 5) Comparator input voltage RC-oscillator programming Thermal resistance from junction to ambient 6) -DIP8 -SO8 Symbol TJ VINPUT VOUTPUT VOUTPUT IOUTPUT VIN R Min. -40 2.3 1.2 1.2 Typ. Max. +125 26 Units °C V V V mA V kΩ 100 0 10 VOUTPUT 1000 Table 1 Stresses above these listed maximum ratings may cause permanent damage to the device. Exposure beyond specified operating conditions may affect device reliability or cause malfunction. Rth(j-a) Rth(j-a) 105 160 °C/W °C/W Table 2 1) Handling Procedures This device has built-in protection against high static voltages or electric fields; however, anti-static precautions must be taken as for any other CMOS component. Unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the supply voltage range. At any time, all inputs must be tied to a defined logic voltage level. 2) 3) 4) 5) 6) The maximum operating temperature is confirmed by sampling at initial device qualification. In production, all devices are tested at +85 °C. On request devices tested at +125 °C can be supplied. Full operation quaranteed. To achieve the load regulation specified in Table 3 a 22 µF capacitor or greater is required on the INPUT, see Fig. 18. The 22 µF must have an effective resistance ≤ 5 Ω and a resonant frequency above 500 kHz. A 10 µF load capacitor and a 100 nF decoupling capacitor are required on the regulator OUTPUT for stability. The 10 µF must have an effective series resistance of ≤ 5 Ω and a resonant frequency above 500 kHz. RES and EN (EN only for version A0) must be pulled up externally to VOUTPUT even if they are unused. (Note: RES and EN are used as inputs by EM test). The OUTPUT current will not apply for all possible combinations of input voltage and output current. Combinations that would require the A6150 to work above the maximum junction temperature (+125 °C) must be avoided. The thermal resistance specified assumes the package is soldered to a PCB. 2 A6150 Electrical Characteristics VINPUT = 6.0 V, CL = 10 µF + 100 nF, CINPUT = 22 µF, TJ = -40 to +85 °C, unless otherwise specified Parameter Symbol Test Conditions REXT = don’t care, TCL = VOUTPUT, VIN = 0 V, IL = 100 µA REXT = 100 kΩ, I/PS at VOUTPUT, O/PS 1 MΩ to VOUTPUT, IL = 100 µA REXT = 100 kΩ, I/PS at VOUTPUT, VINPUT = 8.0 V, O/PS 1 MΩ to VOUTPUT, IL = 100 mA IL = 100 µA 100 µA ≤ IL ≤ 100 mA, -40 °C ≤ TJ ≤+125 °C 6 V ≤ VINPUT ≤26 V, IL = 1 mA, TJ = +125 °C 100 µA ≤ IL ≤ 100 mA IL = 100 µA IL = 100 mA IL = 100 mA, -40 °C ≤ TJ ≤+125 °C VINPUT = 4.5 V, IL = 100 µA, REXT = 100 kΩ, O/PS 1 MΩ to VOUTPUT, I/PS at VOUTPUT TJ = +25 °C, IL = 50 mA, VINPUT = 26 V, T = 10 ms OUTPUT tied to VSS VOUTPUT = 4.5 V, IOL= 20 mA VOUTPUT = 4.5 V, IOL = 8 mA VOUTPUT = 2.0 V, IOL = 4 mA VOUTPUT = 1.2 V, IOL = 0.5 mA VOUTPUT = 4.5 V, IOH= -1 mA VOUTPUT = 2.0 V, IOH= -100 µA VOUTPUT = 1.2 V, IOH= -30 µA Min. Typ. Max. 340 Unit µA µA Supply current in standby mode ISS Supply current 1) Supply current 1) Output voltage Output voltage Output voltage temperature coefficient 2) Line regulation 3) Load regulation 3) Dropout voltage 4) Dropout voltage 4) Dropout voltage 4) Dropout supply current Thermal regulation 5) ISS ISS VOUTPUT VOUTPUT Vth(coeff) VLINE VL VDROPOUT VDROPOUT VDROPOUT ISS Vthr 175 4.88 4.85 50 0.2 0.2 40 380 1.7 400 4.2 5.12 5.15 180 0.5 0.6 170 650 1.6 0.25 mA V V ppm/°C % % mV mV mV mA %/W mA µVrms V V V V V V V V V µA MΩ V V V mV Table 3 1.2 0.05 450 200 0.4 0.2 0.2 0.06 3.5 1.8 1.0 VSS 2.0 4.1 1.9 1.1 Current limit ILmax OUTPUT noise, 10Hz to 100kHz VNOISE RES & EN Output Low Voltage VOL VOL VOL VOL EN (vers. A1) Output High Voltage VOH VOH VOH TCL and VIN TCL Input Low Level VIL TCL Input High Level VIH Leakage current ILI VIN input resistance RVIN VREF Comparator reference 6)7) VREF VREF Comparator hysteresis 7) VHY 1) 0.4 0.4 0.2 VSS ≤ VTCL ≤ VOUTPUT TJ = +25 °C -40 °C ≤TJ ≤+125 °C 0.8 VOUTPUT 0.05 1 100 1.474 1.52 1.566 1.436 1.620 1.420 1.620 2 If INPUT is connected to VSS, no reverse current will flow from the OUTPUT to the INPUT, however the supply current specified will be sank by the OUTPUT to supply the A6150. 2) The OUTPUT voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range. 3) Regulation is measured at constant junction temperature using pulse testing with a low duty cycle. Changes in OUTPUT voltage due to heating effects are covered in the specification for thermal regulation. 4) The dropout voltage is defined as the INPUT to OUTPUT differential, measured with the input voltage equal to 5.0 V. 5) Thermal regulation is defined as the change in OUTPUT voltage at a time T after a change in power dissipation is applied, excluding load or line regulation effects. 6) The comparator and the voltage regulator have separate voltage references (see “ Block Diagram” Fig. 7). 7) The comparator reference is the power-down reset threshold. The power-on reset threshold equals the comparator reference voltage plus the comparator hysteresis (see Fig. 4). 3 A6150 Timing Characteristics V INPUT = 6.0 V, IL = 100 µA, CL = 10 µF + 100 nF, CINPUT = 22 µF, TJ = -40 to + 85 °C, unless otherwise specified Parameter Propagation delays: TCL to Output Pins VIN sensitivity Logic Transition Times on all Output Pins Power-on Reset delay Watchdog Time Open Window Percentage Closed Window Time Open Window Time Watchdog Reset Pulse TCL Input Pulse Width Symbol Test Conditions TDIDO TSEN TTR TPOR TWD OWP TCW TCW TOW TOW TWDR TWDR TTCL Min. Typ. 250 5 30 100 100 ±0.2 TWD 0.8 TWD 80 0.4 TWD 40 TWD/40 2.5 Max. 500 20 100 110 110 88 44 Units ns µs ns ms ms ms ms ms ns Table 4 Load 10 kΩ, 50 pF REXT = 123 kΩ ±1% REXT = 123 kΩ ±1% REXT = 123 kΩ ±1% REXT = 123 kΩ ±1% REXT = 123 kΩ ±1% 1 90 90 72 36 150 Timing Waveforms Watchdog Timeout Period TWD = TPOR − OWP − 20% + OWP + 20% Condition: REXT = 123 kΩ Watchdog timer reset TCW – closed window TOW – open window t [ms] 80 100 120 Fig. 3 Voltage Monitoring VIN VHY Conditions: VOUTPUT ≥ 3 V No timeout TSEN VREF TSEN TSEN TSEN TPOR RES TPOR Fig. 4 4 A6150 Timer Reaction TOW Conditions: VIN > VREF after power-up sequence TCW TCW+TOW TCW+TOW TTCL TWDR 1 2 3 TCW TCL RES EN TOW TCW TCW+TOW 3 correct TCL services EN goes active low - Watchdog timer reset Timeout Fig.5 Combined Voltage and Timer Reaction Condition: VOUTPUT ≥ 3 V VIN VREF TPOR=TWD TCL TOW TCW TCW+TOW RES EN TCL too early 1 2 3 - Watchdog timer reset 3 correct TCL service EN goes active low Fig. 6 Block Diagram INPUT Voltage Regulator Voltage Reference Voltage Reference Enable Logic OUTPUT EN Vers. A0 VREF Comparator Reset Control Vers. A1 RES VIN Open drain output RES Timer R Current Controlled Oscillator TCL Fig. 7 5 A6150 Pin Description Pin Name 1 EN Function Vers. A0: Open drain active low enable output. EN must be pulled to VOUTPUT even if unused Vers. A1: Push-pull active low reset output RES Open drain active low reset output. RES must be pulled up to VOUTPUT even if unused TCL Watchdog timer clear input signal VSS GND terminal INPUT Voltage regulator input OUTPUT Voltage regulator output R REXT input for RC oscillator tuning VIN Voltage comparator input Table 5 The maximum continuous power dissipation at a given temperature can be calculated using the formula: PMAX = ( 125 °C – TA) / Rth(j-a) where Rth(j-a) is the termal resistance from the junction to the ambient and is specified in Table 2. Note the Rth(j-a) given in Table 2 assumes that the package is soldered to a PCB. The above formula for maximum power dissipation assumes a constant load (ie.≥100 s). The transient thermal resistance for a single pulse is much lower than the continuous value. For example the A6150 in DIP8 package will have an effective thermal resistance from the junction to the ambient of about 10 °C/W for a single 100 ms pulse. 2 3 4 5 6 7 8 VIN Monitoring The power-on reset and the power-down reset are generated as a response to the external voltage level applied on the VIN input. The VDD voltage at which reset is asserted or released is determined by the external voltage divider between VDD and VSS, as shown on Fig. 18. A part of VDD is compared to the internal voltage reference. To determine the values of the divider, the leakage current at VIN must be taken into account as well as the current consumption of the divider itself. Low resistor values will need more current, but high resistor values will make the reset threshold less accurate at high temperature, due to a possible leakage current at the VIN input. The sum of the two resistors should stay below 300 kΩ. The formula is: VRESET = VREF *(1 + R1/R2). Example: choosing R1 = 100 kΩ and R2 = 51 kΩ will result in a VDD reset threshold of 4.5 V (typ.). At power-up the reset output (RES) is held low (see Fig. 4). After INPUT reaches 3.36 V (and so OUTPUT reaches at least 3 V) and VIN becomes greater than VREF, the RES output is held low for an additional power-onreset (POR) delay which is equal to the watchdog time TWD (typically 100 ms with an external resistor of 123 kΩ connected at R pin). The POR delay prevents repeated toggling of RES even if VIN and the INPUT voltage drops out and recovers. The POR delay allows the microprocessor’s crystal oscillator time to start and stabilize and ensures correct recognition of the reset signal to the microprocessor. The RES output goes active low generating the powerdown reset whenever VIN falls below VREF. The sensitivity or reaction time of the internal comparator to the voltage level on VIN is typically 5 µs. Functional Description Voltage Regulator The A6150 has a 5 V ± 2%, 100 mA, low dropout voltage regulator. The low supply current (typ.155 µA) makes the A6150 particularly suited to automotive systems then remain energized 24 hours a day. The input voltage range is 2.3 V to 26 V for operation and the input protection includes both reverse battery (20 V below ground) and load dump (positive transients up to 60 V). There is no reverse current flow from the OUTPUT to the INPUT when the INPUT equals VSS. This feature is important for systems which need to implement (with capacitance) a minimum power supply hold-up time in the event of power failure. To achieve good load regulation a 22 µF capacitor (or greater ) is needed on the INPUT (see Fig. 18). Tantalum or aluminium electrolytics are adequate for the 22 µF capacitor; film types will work but are relatively expensive. Many aluminium electrolytics have electrolytes that freeze at about –30 °C, so tantalums are recommended for operation below –25 °C. The important parameters of the 22 µF capacitor are an effective series resistance of ≤ 5 Ω and a resonant frequency above 500 kHz. A 10 µF capacitor (or greater) and a 100 nF capacitor are required on the OUTPUT to prevent oscillations due to instability. The specification of the 10 µF capacitor is as per the 22 µF capacitor on the INPUT (see previous paragraph). The A6150 will remain stable and in regulation with no external load and the dropout voltage is typically constant as the input voltage fall to below its minimum level (see Table 2). These features are especially important in CMOS RAM keep-alive applications. Care must be taken not to exceed the maximum junction temperature (+ 125 °C). The power dissipation within the A 6150 is given by the formula: PTOTAL = (VINPUT – VOUTPUT) * IOUTPUT + (VINPUT) * ISS 6 Timer Programming The on-chip oscillator with an external resistor REXT connected between the R pin and VSS (see Fig. 18) allows the user to adjust the power-on reset (POR) delay, watchdog time TWD and with this also the closed and open time windows as well as the watchdog reset pulse width (TWD/40). With REXT = 123 kΩ typical values are: -Power-on reset delay: TPOR is 100 ms -Watchdog time: TWD is 100 ms A6150 -Closed window: TCW is 80 ms -Open window: TOW is 40 ms -Watchdog reset: TWDR is 2.5 ms Note the current consumption increases as the frequency increases. 4. 26 ms at +25 °C a) (26 − 10% = 23.4 ms) (26 + 10% = 28.6 ms) a) Watchdog Timeout Period Description The watchdog timeout period is divided into two parts, a “closed” window and an “open” window (see Fig. 3) and is defined by two parameters, TWD and the Open Window Percentage (OWP). The closed window starts just after the watchdog timer resets and is defined by TCW = TWD – OWP(TWD). The open window starts after the closed time window finishes and lasts till TWD + OWP(TWD).The open window time is defined by TOW = 2 x OWP (TWD) For example if TWD = 100 ms (actual value) and OWP = ± 20% this means the closed window lasts during first the 80 ms (TCW = 80 ms = 100ms – 0.2 (100 ms)) and the open window the next 40 ms (TOW = 2 x 0.2 (100 ms) = 40 ms). The watchdog can be serviced between 80 ms and 120 ms after the timer reset. However as the time base is ± 10% accurate, software must use the following calculation as the limits for servicing signal TCL during the open window: Related to curves (Fig. 10 to Fig. 20), especially Fig. 19 and Fig. 20, the relation between TWD and REXT could easily be defined. Let us take an example describing the variations due to production and temperature: 1.Choice, TWD = 26 ms. 2.Related to Fig. 20, the coefficient (TWD to REXT) is 1.155 where REXT is in kΩ and TWD in ms. 3.REXT (typ.) = 26 x 1.155 = 30.0 kΩ. b) (23.4 − 5% = 22.2 ms) (28.6 + 5% = 30.0 ms) b) min.: (30.0 − 20% = 24.0 ms) max.: (22.2 + 20% = 26.7 ms) Typical TCL period of (24.0 + 26.7) / 2 = 25.4 ms The ratio between TWD = 26 ms and the (TCL period) = 25.4 ms is 0.975. Then the relation over the production and the full temperature range is, TCL period = 0.975 x TWD or 0.975 x REXT TCL period = , as typical value. 1.155 a) While PRODUCTION value unknown for the customer when REXT ≠ 123 kΩ. b) While operating TEMPERATURE range -40 °C ≤ TJ ≤ +85 °C. 5. If you fixed a TCL period = 26 ms 26 x 1.155 ⇒ REXT = = 30.8 kΩ. 0.975 If during your production the TWD time can be measured at TJ = + 25 °C and the µC can adjust the TCL period, then the TCL period range will be much larger for the full operating temperature. TWD versus VOUTPUT at TJ = +25 °C 10’000 R = 10 M Ω TWD versus R at TJ = +25 °C 10’000 1000 R = 1 MΩ 1000 TWD [ms] 100 TWD [ms] R = 100 kΩ 100 10 R = 10 k Ω 10 R = 1 kΩ 1 3V 4.8 V 5V 5.2 V 6V 3 4 VOUTPUT [V] 5 6 Fig. 8 1 0.1 1 10 100 1000 10’000 Fig. 9 7 R[kΩ] A6150 TWD versus R at TJ = +25 °C 10’000 1000 100 TWD [ms] 3V 10 4.8 V 5V 5.2 V 6V 1 0.1 1 10 R[kΩ] 100 1000 10’000 Fig. 10 8 A6150 TWD versus VOUTPUT at TJ = +85 °C 10’000 TWD versus R at TJ = +85 °C 10’000 R = 10 MΩ 1000 R = 1 MΩ 1000 TWD [ms] TWD [ms] R = 100 kΩ 100 100 R = 10 kΩ 10 10 3V 4.8 V 5V 5.2 V 6V R = 1 kΩ 1 1 0.1 3 4 5 6 1 10 100 1000 10’000 VOUTPUT [V] Fig. 11 R[kΩ] Fig. 12 TWD versus VOUTPUT at TJ = -40 °C 10’000 R = 10 MΩ TWD versus R at TJ = -40 °C 1000 R = 1 MΩ 1000 TWD [ms] 100 TWD [ms] R = 100 kΩ 100 10 10 R = 10 kΩ 1 3V 4.8 V 5V 5.2 V 6V R = 1 kΩ 1 0.1 0.1 3 4 VOUTPUT [V] 5 6 Fig. 13 1 10 100 1000 10’000 R[kΩ] Fig. 14 9 A6150 TWD versus temperature at 5 V 10’000 T WD versus R at 5 V R = 10 MΩ 10’000 R = 1 MΩ 1000 1000 TWD [ms] TWD [ms] R = 100 kΩ 100 100 R = 10 kΩ 10 10 R = 1 kΩ 1 1 -40 °C -20 °C +25 °C +70 °C +85 °C -40 -20 0 +20 +40 +60 TJ [°C] +80 0.1 1 10 Fig. 15 100 R[kΩ] 1000 10’000 Fig. 16 OUTPUT Current versus INPUT Voltage 100 80 SO8 package soldered to PC board TJmax = + 125 °C OUTPUT current[mA] 60 TA=+50 °C TA=+25 °C 40 TA=+85 °C 20 0 0 5 10 15 20 25 30 Fig.17 INPUT voltage [V] 10 A6150 Timer Clearing and RES Action The watchdog circuit monitore the activity of the processor. If the user’s software does not send a pulse to the TCL input within the programmed open window timeout period a short watchdog RES pulse is generated which is equal to TWD /40 = 2.5 ms typically (see Fig. 5). With the open window constraint new security is added to conventional watchdogs by monitoring both software cycle time and execution. Should software clear the watchdog too quickly (incorrect cycle time) or too slowly (incorrect execution) it will cause the system to be reset. If software is stuck in a loop which includes the routine to clear the watchdog then a conventional watchdog would not make a system reset even though software is malfunctioning; the A6150 would make a system reset because the watchdog would be cleared too quickly. If no TCL signal is applied before the closed and open windows expire, RES will start to generate square waves of period (TCW + TOW + TWDR). The watchdog will remain in this state until the next TCL falling edge appears during an open window, or until a fresh power-up sequence. The system enable output, EN , can be used to prevent critical control functions being activated in the event of the system going into this failure mode (see section “Enable-EN Output”). The RES output must be pulled up to VOUTPUT even if the output is not used by the system (see Fig 18). TPOR, a pull-up to VDD is required on that pin. After the POR delay has elapsed, RES goes inactive and the watchdog timer starts acting. If no TCL pulse occurs, RES goes active low for a short time TWDR after each closed and open window period. A TCL pulse coming during the open window clears the watchdog timer. When the TCL pulse occurs too early (during the closed window), RES goes active and a new timeout sequence starts. A voltage drop below the VREF level for longer than typically 5µs overrides the timer and immediately forces RES active and EN inactive. Any further TCL pulse has no effect until the next power-up sequence has completed. Enable - EN Output The system enable output, EN ,is inactive always when RES is active and remains inactive after a RES pulse until the watchdog is serviced correctly 3 consecutive times (ie. the TCL pulse must come in the open window). After three consecutive services of the watchdog with TCL during the open window, the EN goes active low. A malfunctioning system would be repeatedly reset by the watchdog. In a conventional system critical motor controls could be energized each time reset goes inactive (time allowed for the system to restart) and in this way the electrical motors driven by the system could function out of control. The A6150 prevents the above failure mode by using the EN output to disable the motor controls until software has successfully cleared the watchdog three times (ie. the system has correctly restarted after a reset condition). For the version A0 the EN output must be pulled up to VOUTPUT even if the output is not used by the system (see Fig. 18. Combined Voltage and Timer Action The combination of voltage and timer actions is illustrated by the sequence of events shown in Fig. 6. On power-up, when the voltage at VIN reaches VREF, the poweron-reset, POR, delay is initialized and holds RES active for the time of the POR delay. A TCL pulse will have no effect until this power-on-reset delay is completed. When the risk exists that TCL temporarily floats, e.g. during Typical Application Version A0: Version A1: Unregulated voltage INPUT OUTPUT 100 nF + 10 µF R1 Address decoder Regulated voltage 22 µF + 100 kΩ R A6150 VIN TCL Microprocessor RES Motor EN controls VSS RES EN R2 GND Fig.18 11 A6150 TWD Coefficient versus REXT at TJ = + 25 °C 0.96 0.94 0.92 0.90 TWD Coefficient 0.88 0.86 0.84 0.82 0.80 0.78 0.76 10 100 REXT [kΩ] 1000 Fig. 19 REXT Coefficient versus TWD at TJ = + 25 °C 1.30 1.28 1.26 1.24 REXT Coefficient 1.22 1.20 1.18 1.16 1.14 1.12 1.10 1.08 1.06 1.04 10 100 TWD [ms] 12 1000 Fig. 20 A6150 Package Information Dimensions of 8-Pin SOIC Package D C L H Dimensions in mm Min Nom Max A 1.35 1.63 1.75 A1 0.10 0.15 0.25 B 0.33 0.41 0.51 C 0.19 0.20 0.25 D 4.80 4.93 5.00 E 3.80 3.94 4.00 e 1.27 H 5.80 5.99 6.20 L 0.40 0.64 1.27 Fig. 21 Dimensions of 8-Pin Plastic DIP Package E 0 - 8° A1 B A e 4 3 2 5 6 7 8 A1 A2 A C L b3 b2 b Dimensions in mm e eA eB 4 3 2 1 E1 E 5 6 7 8 A A1 A2 b b2 b3 C Min. Nom. Max. 5.33 0.38 2.92 3.30 4.95 0.35 0.45 0.56 1.14 1.52 1.78 0.76 0.99 1.14 0.20 0.25 0.35 D E E1 e eA eB L Min. Nom. Max. 9.01 9.27 10.16 7.62 7.87 8.25 6.09 6.35 7.11 2.54 7.62 10.92 2.92 3.30 3.81 Fig.22 13 A6150 Ordering Information When ordering, please specify complete Part Number Part Number Output EN Temperature Range Package 8-pin SOIC 8-pin SOIC 8-pin plastic DIP 8-pin SOIC 8-pin SOIC 8-pin plastic DIP 8-pin SOIC 8-pin SOIC 8-pin plastic DIP 8-pin SOIC 8-pin SOIC 8-pin plastic DIP Delivery Form Package Marking (first line) Stick Tape & Reel Stick Stick Tape & Reel Stick Stick Tape & Reel Stick Stick Tape & Reel Stick 6150A1 6150A1 A6150A1 6150A0 6150A0 A6150A0 6150A1X 6150A1X A61501X 6150A0X 6150A0X A61500X A6150A1SO8A A6150A1SO8B Push-pull A6150A1DL8A* A6150A0SO8A* A6150A0SO8B* Open drain A6150A0DL8A* A6150A1XSO8A* A6150A1XSO8B* Push-pull A6150A1XDL8A* A6150A0XSO8A* A6150A0XSO8B* Open drain A6150A0XDL8A* -40 °C to +85 °C -40 °C to +125 °C * = non stock item. Might be available on request and upon minimum order quantity (please contact EM Microelectronic). EM Microelectronic-Marin SA cannot assume any responsibility for use of any circuitry described other than entirely embodied in an EM Microelectronic-Marin SA product. EM Microelectronic-Marin SA reserves the right to change the circuitry and specifications without notice at any time. You are strongly urged to ensure that the information given has not been superseded by a more up-to-date version. © 2002 EM Microelectronic-Marin SA, 03/02, Rev. N/344 14 EM Microelectronic-Marin SA, CH - 2074 Marin, Switzerland, Tel. +41 – (0)32 75 55 111, Fax +41 – (0)32 75 55 403