P4C1256-70DC

P4C1256 P4C1256 HIGH SPEED 32K x 8 STATIC CMOS RAM FEATURES High Speed (Equal Access and Cycle Times) — 12/15/20/25/35 ns (Commercial) — 15/20/25/35/45 ns (Industrial) — 20/25/35/45/55/70 ns (Military) Low Power — 880 mW Active (Commercial) Single 5V±10% Power Supply Easy Memory Expansion Using CE and OE CE OE Inputs Common Data I/O Three-State Outputs Fully TTL Compatible Inputs and Outputs Advanced CMOS Technology Fast tOE Automatic Power Down Packages —28-Pin 300 mil DIP and SOJ —28-Pin 600 mil Ceramic DIP —28-Pin LCC(350 mil x 550 mil) —32-Pin LCC (450 mil x 550 mil) DESCRIPTION The P4C1256 is a 262,144-bit high-speed CMOS static RAM organized as 32Kx8. The CMOS memory requires no clocks or refreshing, and has equal access and cycle times. Inputs are fully TTL-compatible. The RAM operates from a single 5V±10% tolerance power supply. Access times as fast as 12 nanoseconds permit greatly enhanced system operating speeds. CMOS is utilized to reduce power consumption to a low level. The P4C1256 is a member of a family of PACE RAM™ products offering fast access times. The P4C1256 device provides asynchronous operation with matching access and cycle times. Memory locations are specified on address pins A0 to A14. Reading is accomplished by device selection (CE and output enabling (OE) while write enable (WE) remains HIGH. By presenting the address under these conditions, the data in the addressed memory location is presented on the data input/output pins. The input/output pins stay in the HIGH Z state when either CE or OE is HIGH or WE is LOW. Package options for the P4C1256 include 28-pin 300 mil DIP and SOJ packages. For military temperature range, Ceramic DIP and LCC packages are available. FUNCTIONAL BLOCK DIAGRAM ROW SELECT A •• • PIN CONFIGURATIONS VCC A2 A1 A0 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC (8) A 262,144-BIT MEMORY ARRAY WE A14 A13 A12 A2 A3 A4 A5 4 3 A0 2 1 NC A3 A4 A5 A6 A7 A8 A9 NC I/O1 5 6 7 8 9 10 11 12 32 31 30 29 28 27 26 25 24 23 22 WE A14 A 13 A 12 A 11 NC OE A 10 CE I/O8 I/O7 I/O 1 ••• ••• ••• ••• A 11 OE A 10 CE I/08 I/07 I/06 I/05 I/04 A6 COLUMN I/O INPUT DATA CONTROL A7 A8 A9 • •• ••• I/O 2 I/01 I/02 COLUMN SELECT 13 21 14 15 16 17 18 19 20 I/O2 I/O3 GND I/O4 I/O5 I/O6 NC I/03 GND WE ••• ••• CE OE A (7) A DIP (P5, C5, D5-1), SOJ (J5) TOP VIEW 1519B 32 LCC (L6) TOP VIEW See Selection Guide page for 28-pin LCC Means Quality, Service and Speed 1Q97 117 P4C1256 MAXIMUM RATINGS(1) Symbol VCC Parameter Power Supply Pin with Respect to GND Terminal Voltage with Respect to GND (up to 7.0V) Operating Temperature Value –0.5 to +7 –0.5 to VCC +0.5 –55 to +125 Unit V Symbol TBIAS TSTG PT IOUT Parameter Temperature Under Bias Storage Temperature Power Dissipation DC Output Current Value –55 to +125 –65 to +150 1.0 50 Unit °C °C W mA VTERM TA V °C RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE Grade(2) Military Ambient Temperature GND 0V 0V 0V VCC 5.0V ± 10% 5.0V ± 10% 5.0V ± 10% CAPACITANCES(4) VCC = 5.0V, TA = 25°C, f = 1.0MHz Symbol CIN COUT Parameter Input Capacitance Conditions Typ. Unit VIN = 0V 8 10 pF pF –55°C to +125°C –40°C to +85°C Industrial Commercial 0°C to +70°C Output Capacitance VOUT = 0V DC ELECTRICAL CHARACTERISTICS Over recommended operating temperature and supply voltage(2) Symbol VIH VIL VHC VLC VOL VOH ILI ILO ISB Parameter Input High Voltage Input Low Voltage CMOS Input High Voltage CMOS Input Low Voltage Output Low Voltage (TTL Load) Output High Voltage (TTL Load) Input Leakage Current IOL = +8 mA, VCC = Min. IOH = –4 mA, VCC = Min. VCC = Max. VIN = GND to VCC Mil. Ind./Com’l. 2.4 –10 –5 –10 –5 ___ ___ ___ ___ +10 +5 +10 +5 45 30 20 10 Test Conditions P4C1256 Unit Min Max VCC +0.5 V 2.2 0.8 –0.5(3) VCC –0.2 VCC +0.5 –0.5 (3) V V V V V µA µA 0.2 0.4 Output Leakage Current VCC = Max., CE = VIH, Mil. VOUT = GND to VCC Ind./Com’l. CE ≥ VIH or Mil. Standby Power Supply Current (TTL Input Levels) CE2 ≤VIL, VCC= Max Ind./Com’l. f = Max., Outputs Open Standby Power Supply Current (CMOS Input Levels) CE ≥ VHC or Mil. CE2 ≤VLC, VCC= Max Ind./Com’l. f = 0, Outputs Open VIN ≤ VLC or VIN ≥ VHC mA ISB1 mA n/a = Not Applicable Notes: 1. Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to MAXIMUM rating conditions for extended periods may affect reliability. 2. Extended temperature operation guaranteed with 400 linear feet per minute of air flow. 3. Transient inputs with VIL and IIL not more negative than –3.0V and –100mA, respectively, are permissible for pulse widths up to 20 ns. 4. This parameter is sampled and not 100% tested. 118 P4C1256 POWER DISSIPATION CHARACTERISTICS VS. SPEED Symbol Parameter Temperature Range Commercial Military –12 170 N/A N/A –15 160 170 N/A –20 155 165 170 –25 150 160 165 –35 145 155 160 –45 N/A 150 155 –55 N/A N/A 150 –70 N/A N/A 150 Unit mA mA mA ICC Dynamic Operating Current* Industrial *VCC = 5.5V. Tested with outputs open. f = Max. Switching inputs are 0V and 3V. CE = VIL, OE = VIH. AC ELECTRICAL CHARACTERISTICS—READ CYCLE (VCC = 5V ± 10%, All Temperature Ranges)(2) Sym. tRC tAA tAC tOH tLZ tHZ tOE Parameter -12 -15 15 -20 20 -25 25 -35 35 -45 45 -55 55 -70 70 Unit ns Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Read Cycle Time 12 Address Access Time Chip Enable Access Time Output Hold from Address Change Chip Enable to Output in Low Z Chip Disable to Output in High Z Output Enable Low to Data Valid Output Enable Low to Low Z Output Enable High to High Z Chip Enable to Power Up Time Chip Disable to Power Down Time 0 12 0 5 0 15 2 2 5 5 12 12 2 2 8 7 15 15 2 2 20 20 3 3 9 9 25 25 3 3 11 10 35 35 3 3 15 15 45 45 3 3 20 20 55 55 3 3 25 25 70 70 ns ns ns ns 30 30 ns ns tOLZ tOHZ tPU tPD 0 7 0 9 0 20 0 11 0 20 0 15 0 20 0 20 0 25 0 25 0 30 0 30 0 35 ns ns ns ns 119 P4C1256 READ CYCLE NO. 1 (OE CONTROLLED)(1) tRC (5) ADDRESS tAA OE tOE tOLZ CE (4) tOH tAC tAC DATA OUT (4) tOHZ tHZ (4) (4) READ CYCLE NO. 2 (ADDRESS CONTROLLED) tRC (5) ADDRESS tAA tOH DATA OUT PREVIOUS DATA VALID DATA VALID READ CYCLE NO. 3 (CE CONTROLLED) tRC CE tLZ(8) DATA OUT ICC VCC SUPPLY CURRENT tAC DATA VALID tHZ HIGH IMPEDANCE tPU tPD ISB Notes: 1. WE is HIGH for READ cycle. 2. CE1 is LOW, CE2 is HIGH and OE is LOW for READ cycle. 3. ADDRESS must be valid prior to, or coincident with CE1 transition LOW . 4. Transition is measured ± 200 mV from steady state voltage prior to change, with loading as specified in Figure 1. This parameter is sampled and not 100% tested. 5. READ Cycle Time is measured from the last valid address to the first transitioning address. 120 P4C1256 AC CHARACTERISTICS—WRITE CYCLE (VCC = 5V ± 10%, All Temperature Ranges)(2) Sym. tWC tCW Parameter -12 -15 15 10 -20 20 15 -25 25 18 -35 35 22 -45 45 30 -55 55 35 -70 70 40 Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Unit ns ns Write Cycle Time 12 Chip Enable Time to End of Write Address Valid to End of Write Address Set-up Time Write Pulse Width Address Hold Time Data Valid to End of Write Date Hold Time Write Enable to Output in High Z 3 Output Active from End of Write 9 tAW tAS tWP tAH tDW tDH tWZ tOW 9 0 9 0 8 0 7 10 0 11 0 9 0 8 3 15 0 15 0 11 0 10 3 20 0 18 0 13 0 11 3 25 0 22 0 15 0 15 5 35 0 25 0 20 0 18 5 40 0 30 0 25 0 25 0 45 0 35 0 30 0 30 0 ns ns ns ns ns ns ns ns WRITE CYCLE NO. 1 (WE CONTROLLED)(6) tWC ADDRESS tCW CE (9) tAW tWP WE tAS DATA IN tWZ (7) (4) tAH tDW DATA VALID tDH tOW (4,7) DATA OUT DATA UNDEFINED HIGH IMPEDANCE Notes: 6. CE1 and WE must be LOW for WRITE cycle. 7. OE is LOW for this WRITE cycle to show tWZ and tOW. 8. If CE1 goes HIGH simultaneously with WE HIGH, the output remains in a high impedance state. 9. Write Cycle Time is measured from the last valid address to the first transitioning address. 121 P4C1256 TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CE CONTROLLED)(6) tWC (9) ADDRESS tAS CE tAW tAH tCW tWP WE tDW DATA IN DATA VALID tDH DATA OUT(6) HIGH IMPEDANCE AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input Timing Reference Level Output Timing Reference Level Output Load GND to 3.0V 3ns 1.5V 1.5V See Figures 1 and 2 TRUTH TABLE Mode Standby Standby DOUT Disabled Read Write CE1 H X L L L CE2 X L H H H OE X X H L X WE X X H H L I/O High Z High Z High Z DOUT High Z Power Standby Standby Active Active Active +5V R TH = 166.5 Ω D OUT VTH = 1.73 V 30pF* (5pF* for t HZ 480Ω DOUT 255Ω 30pF* (5pF* for t , t LZ , t OHZ , tOLZ, tWZ and t OW ) HZ ,t LZ , OHZ, ,t t OLZ , t WZ and t OW ) Figure 1. Output Load * including scope and test fixture. Note: Because of the ultra-high speed of the P4C1256, care must be taken when testing this device; an inadequate setup can cause a normal functioning part to be rejected as faulty. Long high-inductance leads that cause supply bounce must be avoided by bringing the VCC and ground planes directly up to the contactor fingers. A 0.01 µF high frequency capacitor is also required between VCC and ground. To avoid signal Figure 2. Thevenin Equivalent reflections, proper termination must be used; for example, a 50Ω test environment should be terminated into a 50Ω load with 1.73V (Thevenin Voltage) at the comparator input, and a 116Ω resistor must be used in series with DOUT to match 166Ω (Thevenin Resistance). 122 P4C1256 PACKAGE SUFFIX Package Suffix P J C D DW L28 L32 Description Plastic DIP, 300 mil wide standard Plastic SOJ, 300 mil wide standard Sidebrazed DIP, 300 mil wide CERDIP, 300 mil wide CERDIP, 600 mil wide Leadless Chip Carrier, 350 x 550 mils Leadless Chip Carrier, 450 x 550 mils TEMPERATURE RANGE SUFFIX Temperature Range Suffix C I M MB Description Commercial Temperature Range, 0°C to +70°C. Industrial Temperature Range, –40˚C to +85˚C. Military Temperature Range, –55°C to +125°C. Mil. Temp. with MIL-STD-883 Class B compliance. ORDERING INFORMATION Performance Semiconductor's part numbering scheme is as follows: P4C 1256 ss p t Temperature Range Package Code Speed (Access/Cycle Time) Device Number Static RAM Prefix I = Ultra-low standby power designator L, if available. ss = Speed (access/cycle time in ns). e.g. 25, 35. p = Package code, i.e., P, J, C, D, DW, L28, L32. t = Temperature range, i.e., C, M. MB. The P4C1256 is also available per SMD 5962-88662 123 P4C1256 SELECTION GUIDE The P4C1256 is available in the following temperature, speed and package options. The P4C1256L is available only over the military temperature range. Temp. Range Com'l Ind. Mil. Temp. Speed Package Plastic DIP Plastic SOJ Plastic DIP Plastic SOJ Sidebrazed (300 mil) CERDIP (300 mil) CERDIP (600 mil) L28 L32 Sidebrazed (300 mil) CERDIP (300 mil) CERDIP (600 mil) L28 L32 12 -12PC -12JC N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 15 -15PC -15JC -15PI -15JI N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 20 -20PC -20JC -20PI -20JI -20CM -20DM -20DWM -20L28M -20L32M 25 -25PC -25JC -25PI -25JI -25CM -25DM -25DWM -25L28M -25L32M 35 -35PC -35JC -35PI -35JI -35CM -35DM -35DWM -35L28M -35L32M 45 N/A N/A -45PI -425JI -45CM -45DM -45DWM -45L28M -45L32M 55 N/A N/A N/A N/A -55CM -55DM -55DWM -55L28M -55L32M 70 N/A N/A N/A N/A -70CM -70DM -70DWM -70L28M -70L32M Military Proc'd* -70CMB -55CMB -45CMB -35CMB -20CMB -25CMB -70DMB -55DMB -45DMB -35DMB -20DMB -25DMB -20DWMB -25DWMB -35DWMB -45DWMB -55DWMB -70DWMB -20L28MB -25L28MB -35L28MB -45L28MB -55L28MB -70L28MB -20L32MB -25L32MB -35L32MB -45L32MB -55L32MB -70L32MB * Military temperature range with MIL-STD-883, Class B processing. N/A = Not Available 28 LCC PIN CONFIGURATION A0 VCC WE 3 A3 A4 A5 A6 A7 A8 A9 I/O1 I/O2 4 5 6 7 8 9 10 11 12 14 15 16 13 I/O3 GND I/O4 I/O5 A2 A1 2 1 28 27 26 25 24 23 22 21 20 19 18 17 I/O6 A 14 A 13 A 12 A 11 OE A 10 CE I/O8 I/O7 28 LCC (L5) TOP VIEW 124