P50N02LS

NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor D P50N02LS TO-263 (D2PAK) PRODUCT SUMMARY V(BR)DSS 25 RDS(ON) 12mΩ ID 55A G S 1. GATE 2. DRAIN 3. SOURCE ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Avalanche Current Avalanche Energy Repetitive Avalanche Energy Power Dissipation 2 1 SYMBOL VGS LIMITS ±20 55 38 150 36 250 8.6 85 46 -55 to 150 275 UNITS V TC = 25 °C TC = 100 °C ID IDM IAR A L = 0.1mH L = 0.05mH TC = 25 °C TC = 100 °C EAS EAR PD Tj, Tstg TL mJ W Operating Junction & Storage Temperature Range Lead Temperature ( /16” from case for 10 sec.) THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient Case-to-Heatsink 1 2 1 °C SYMBOL RθJC RθJA RθCS TYPICAL MAXIMUM 2.3 62.5 UNITS °C / W 0.6 Pulse width limited by maximum junction temperature. Duty cycle ≤ 1％ ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS STATIC Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current V(BR)DSS VGS(th) IGSS IDSS VGS = 0V, ID = 250µA VDS = VGS, ID = 250µA VDS = 0V, VGS = ±20V VDS = 20V, VGS = 0V VDS = 20V, VGS = 0V, TC = 125 °C 25 0.8 1.2 2.5 ±250 25 250 nA µA V LIMITS UNIT MIN TYP MAX 1 MAY-24-2001 NIKO-SEM 1 N-Channel Logic Level Enhancement Mode Field Effect Transistor ID(ON) RDS(ON) 1 P50N02LS TO-263 (D2PAK) On-State Drain Current Drain-Source On-State 1 Resistance VDS = 10V, VGS = 10V VGS = 7V, ID = 20A VGS = 10V, ID = 30A VDS = 15V, ID = 40A DYNAMIC 55 13 12 16 16 15 A mΩ S Forward Transconductance gfs Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge 2 2 Ciss Coss Crss Qg Qgs Qgd 2 1400 VGS = 0V, VDS = 15V, f = 1MHz 380 200 40 VDS = 0.5V(BR)DSS, VGS = 10V, ID = 30A 12 25 9 VDS = 15V, RL = 1Ω ID ≅ 35A, VGS = 10V, RGS = 2.5Ω 150 20 30 nS nC pF Gate-Source Charge Gate-Drain Charge 2 2 Turn-On Delay Time Rise Time td(on) tr Turn-Off Delay Time Fall Time 2 2 td(off) tf SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C) Continuous Current Pulsed Current 3 1 IS ISM VSD trr IRM(REC) Qrr IF = IS, dlF/dt = 100A / µS IF = IS, VGS = 0V 70 200 0.043 55 170 1.3 A V nS A µC Forward Voltage Reverse Recovery Time Peak Reverse Recovery Current Reverse Recovery Charge 1 2 Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2％. Independent of operating temperature. 3 Pulse width limited by maximum junction temperature. REMARK: THE PRODUCT MARKED WITH “P50N02LS”, DATE CODE or LOT # 2 MAY-24-2001 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P50N02LS TO-263 (D2PAK) TO-263 (D2PAK) MECHANICAL DATA mm Dimension Min. A B C D E F G 0.3 -0.102 8.5 9 14.5 4.2 1.20 2.8 0.4 0.5 0.203 9.5 Typ. 15 Max. 15.8 4.7 1.35 H I J K L M N 0.7 4.83 5.08 Dimension Min. 1.0 9.8 6.5 1.5 1.4 5.33 Typ. 1.5 Max. 1.8 10.3 mm 3 MAY-24-2001