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RM2211D883B

RM2211D883B

  • 厂商:

    ETC1

  • 封装:

  • 描述:

    RM2211D883B - FSK Demodulator/Tone Decoder - List of Unclassifed Manufacturers

  • 数据手册
  • 价格&库存
RM2211D883B 数据手册
Electronics Semiconductor Division RC2211 FSK Demodulator/Tone Decoder Features ¥ ¥ ¥ ¥ ¥ ¥ ¥ Wide frequency range Ð 0.01 Hz to 300 kHz Wide supply voltage range Ð 4.5V to 20V DTL/TTL/ECL logic compatibility FSK demodulation with carrier-detector Wide dynamic range Ð 2 mV to 3 VRMS Adjustable tracking range Ð ±1% to ±80% Excellent temperature stability Ð 20 ppm/°C typical Applications ¥ ¥ ¥ ¥ ¥ FSK demodulation Data synchronization Tone decoding FM detection Carrier detection Description The RC2211 is a monolithic phase-locked loop (PLL) system especially designed for data communications. It is particularly well-suited for FSK modem applications, and operates over a wide frequency range of 0.01 Hz to 300 kHz. It can accommodate analog signals between 2 mV and 3V, and can interface with conventional DTL, TTL and ECL logic families. The circuit consists of a basic PLL for tracking an input signal frequency within the passband, a quadrature phase detector which provides carrier detection, and an FSK voltage comparator which provides FSK demodulation. External components are used to independently set carrier frequency, bandwidth and output delay. Block Diagram Loop Filter f-Detector FSK Comparator VCO f Preamp Lock Detector Outputs Lock Detector Filter Lock Detector Comparator 65-2211-01 Data Filter FSK Data Output f FSK Input f-Detector Rev. 1.0.1 This document was created with FrameMaker 4 0 4 PRODUCT SPECIFICATION RC2211 Description of Circuit Controls Signal Input (Pin 2) The input signal is AC coupled to this terminal. The internal impedance at pin 2 is 20 kW. Recommended input signal level is in the range of 10 mVRMS to 3 VRMS. FSK Data Output (Pin 7) This output is an open collector stage which requires a pull-up resistor, RL, to +VS for proper operation. It can sink 5 mA of load current. When decoding FSK signals the FSK data output will switch to a ÒhighÓ or off state for low input frequency, and will switch to a ÒlowÓ or on state for high input frequency. If no input signal is present, the logic state at pin 7 is indeterminate. Quadrature Phase Detector Output, Q (Pin 3) This is the high impedance output of the quadrature phase detector, and is internally connected to the input of lock detector voltage comparator. In tone detection applications, pin 3 is connected to ground through a parallel combination of RD and CD (see Figure 1) to eliminate chatter at the lock detector outputs. If this tone detector section is not used, pin 3 can be left open circuited. FSK Comparator Input (Pin 8) This is the high impedance input to the FSK voltage comparator. Normally, an FSK post detection or data Þlter is connected between this terminal and the PLL phase detector output (pin 11). This data Þlter is formed by RF and CF of Figure 1. The threshold voltage of the comparator is set by the internal reference voltage, VR, available at pin 10. Lock Detector Output, Q (Pin 5) The output at pin 5 is at a ÒhighÓ state when the PLL is out of lock and goes to a ÒlowÓ or conducting state when the PLL is locked. It is an open collector output and requires a pull-up resistor, RL, to +VS for proper operation. In the ÒlowÓ state it can sink up to 5 mA of load current. Reference Bypass (Pin 9) This pin can have an optional 0.1, mF capacitor connected to the ground. Reference Voltage, VR (Pin 10) This pin is internally biased at the reference voltage level, VR; VR = +VS/2 Ð 650 mV. The DC voltage level at this pin forms an internal reference for the voltage levels at pin 3, 8, 11 and 12. Pin 10 must be bypassed to ground with a 0.1 mF capacitor. Lock Detector Complement, Q (Pin 6) The output at pin 6 is the logic complement of the lock detector output at pin 5. This output is also an open collector type stage which can sink 5 mA of load current in the low or ÒonÓ state. RB 510K (11) C1 Input Preamp (2) VCO 0.1 µF Input Signal Quad f-Detector (3) RD 100K to 470K Lock Detector Comparator f (14) C0 (13) R0 0.1 µF f (12) (10) Internal Reference RF 100K (8) RL (1) +VS (7) Loop f-Detector R1 CF FSK Comparator FSK Output Q (6) Lock Detector Outputs (5) Q CD 65-2211-02 Figure 1. Generalized Circuit Connection for FSK and Tone Detection 2 RC2211 PRODUCT SPECIFICATION Loop Phase Detector Output (Pin 11) This terminal provides a high impedance output for the loop phase detector. The PLL loop Þlter is formed by R1 and C1 connected to pin 11 (see Figure 1). With no input signal, or with no phase error within the PLL, the DC level at pin 11 is very nearly equal to VR. The peak voltage swing available at the phase detector output is equal to ±VR. 2. Internal Reference Voltage, VR (measured at pin 10) æ +V S ö V R = è ---------- ø -650 mV 2 3. Loop Lowpass Filter Time Constant, t t = R1C1 VCO Control Input (Pin 12) VCO free running frequency is determined by external timing resistor, R0, connected from this terminal to ground. The VCO free running frequency, F0 is given by: 1 F 0 ( Hz ) = -----------R0 C0 where C0 is the timing capacitor across pins 13 and 14. For optimum temperature stability R0 must be in the range of 10 kW to 100 kW (see Typical Performance Characteristics). This terminal is a low impedance point, and is internally biased at a DC level equal to VR. The maximum timing current drawn from pin 12 must be limited to £3 mA for proper operation of the circuit. 4. Loop Dampening, z: æ C0 ö 1 z = ç ----- ÷ æ -- ö -è C1 ø è 4 ø 5. Loop Tracking Bandwidth, ±DF/F0: Df/FO = R0/R1 Tracking Bandwidth Df Df FLL F1 F0 F2 FLH 65-2211-03 VCO Timing Capacitor (Pins 13 and 14) VCO frequency is inversely proportional to the external timing capacitor, C0, connected across these terminals. C0 must be non-polarized, and in the range of 200 pF to 10 mF. 6. FSK Data Filter Time Constant, tF: tF = RFCF 7. VCO Frequency Adjustment VCO can be Þne tuned by connecting a potentiometer, Rx, in series with R0 at pin 12 (see Figure 2). Loop Phase Detector Conversion Gain, Kf (Kf is the differential DC voltage across pins 10 and 11, per unit of phase error at phase-detector input): ( Ð2) ( VR) k f ( in volts per radian ) = --------------------------p VCO Free-Running Frequency, F0 The RC2211 does not have a separate VCO output terminal. Instead, the VCO outputs are internally connected to the phase detector sections of the circuit. However, for set-up or adjustment purposes, the VCO freerunning frequency can be measured at pin 3 (with CD disconnected) with no input and with pin 2 shorted to pin 10. 8. VCO Conversion Gain, K0 is the amount of change in VCO frequency per unit of DC voltage change at pin 11: Ð1 K0 ( in Hertz per volt ) = -------------------C0 R1 VR 9. Total Loop Gain, KT: KT (in radians per second per volt)= 2 pKfK0 = 4 -----------C0 R1 Design Equations See Figure 1 for DeÞnitions of Components. 1. VCO Center Frequency, F0: 1 F 0 ( Hz ) = -----------R0 C0 10. Peak Phase Detector Current, IA: VR I A ( mA ) = -----25 3 PRODUCT SPECIFICATION RC2211 Pin Assignments +VS Input Lock Detector Filter GND Q Q FSK Data Output 1 2 3 4 5 6 7 14 13 12 11 10 9 8 Timing Capacitor Timing Capacitor Timing Resistor Loop f-Detector Reference Voltage Output Reference Bypass FSK Comparator Input 65-2211-04 Absolute Maximum Ratings Parameter Supply Voltage Input Signal Level Storage Temperature Range Operating Temperature Range RM2211D RV2211N RC2211N Junction Temperature Lead Soldering Temperature (60 sec.) Max. PD TA 50°C Derate at 14 Lead Plastic DIP — 160°C/W 6.5 mW/°C 14 Lead Ceramic DIP 60°C/W 120°C/W 8.33 mW/°C 4 RC2211 PRODUCT SPECIFICATION Electrical Characteristics (Test Conditions +VS = +12V, TA +25°C, R0 = 30 kW, C0 = 0.033 mF. See Figure 1 for component designations.) RV/RM2211 Parameters General Supply Voltage2 Supply Current Oscillator Frequency Accuracy Frequency Stability 1 RC2211 Min 4.5 5.0 ± 1.0 ± 20 0.05 0.2 300 Typ Max 20 11 Units V mA % ppm/°C %/V %/V kHz Hz Test Conditlons Min 4.5 Typ Max 20 R0 ³ 10 kW Deviation from f0 = 1/R0C0 R1 = ¥ +VS = 12 ± 1V +VS = 5 ± 0.5V R0 = 8.2 kW, C0 = 400 pF R0 = 2 MW, C0 = 50 mF 100 4.0 ± 1.0 ± 20 0.05 0.2 300 9.0 ± 3.0 ± 50 0.5 Temperature Coefficient Power Supply Rejection Upper Frequency Limit Lowest Practical Operating Frequency1 Timing Resistor, R0 Operating Range Recommended Range Loop Phase Detector Peak Output Current Output Offset Current Output Impedance Maximum Swing Quadrature Phase Detector Peak Output Current3 Output Impedance Maximum Swing Input Preamp Input Impedance Input Signal Voltage Required to Cause Limiting3 Voltage Comparator Input Impedance Input Bias Current Voltage Gain 1 0.01 0.01 5.0 15 Measured at pin 11 2000 100 5.0 15 2000 100 kW kW mA mA MW V mA MW VP-P kW mVRMS ± 150 ± 200 ± 300 ± 1.0 1.0 ± 100 ± 200 ± 300 ± 2.0 1.0 ± 4.0 ± 5.0 150 1.0 11 20 Ref. to pin 10 Measured at pin 3 ± 4.0 100 ± 5.0 150 1.0 11 Measured at pin 2 20 2.0 10 2.0 Measured at pins 3 & 8 RL = 5.1 kW IC = 3mA V0 = 12V Measured at pin 10 4.9 55 2.0 100 70 300 0.01 5.3 100 5.7 4.75 55 2.0 100 70 300 0.01 5.3 100 5.85 MW nA dB mV mA V W Output Voltage Low Output Leakage Current Internal Reference Voltage Level Output Impedance Notes: 1. Guaranteed by design. 2. Individual applications may need special circuitry to function at 100 kW 10 R2 20K D85 Q85 B Q17 Q18 R12 18K R11 18K B Q79 R3 20K D56 D57 D87 Q80 Q88 From VCO Q83 Q84 Q42 Q38 Q47 Q48 Q81 Q82 Q83 Q84 Lock Detector Q86 Filter (3) D86 Q4 Reference Voltage Input (2) Output (5) Lock Detector Outputs (6) Intenal Voltage Reference Input Pramplifier and Limitter Quadature Phase Detector Lock Detector Comparator D96 D108 D111 D72 D73 A A From VCO A Q60 Q61 Q68 Q62 Q65 Q64 Q71 Q74 (11) Loop f-Detector Output Q97 Q109 A Q95 C0 Timing Capacitor (13) B Q92 D89 D101 D67 Q68 D24 (12) R0 R37 Timing Resistor 8K Voltage Controlled Oscillator Q25 R19 2K R18 2K (8) Q20 (7) Q23 FSK Comparator Input (14) B Q103 Q27 FSK Data Output Loop Phase Detector FSK Comparator 65-2211-14 PRODUCT SPECIFICATION Schematic Diagram +VS (1) (4) GND RC2211 RC2211 PRODUCT SPECIFICATION Notes: 11 PRODUCT SPECIFICATION RC2211 Notes: 12 RC2211 PRODUCT SPECIFICATION Notes: 13 PRODUCT SPECIFICATION RC2211 Mechanical Dimensions 14-Lead Ceramic DIP Package Inches Min. A b1 b2 c1 D E e eA L Q s1 a Max. Millimeters Min. Max. 8 2 8 4 4 5, 9 7 3 6 Notes: Notes 1. Index area: a notch or a pin one identification mark shall be located adjacent to pin one. The manufacturer's identification shall not be used as pin one identification mark. 2. The minimum limit for dimension "b2" may be .023 (.58mm) for leads number 1, 7, 8 and 14 only. 3. Dimension "Q" shall be measured from the seating plane to the base plane. 4. This dimension allows for off-center lid, meniscus and glass overrun. 5. The basic pin spacing is .100 (2.54mm) between centerlines. Each pin centerline shall be located within ±.010 (.25mm) of its exact longitudinal position relative to pins 1 and 14. 6. Applies to all four corners (leads number 1, 7, 8, and 14). 7. "eA" shall be measured at the center of the lead bends or at the centerline of the leads when "a" is 90¡. 8. All leads – Increase maximum limit by .003 (.08mm) measured at the center of the flat, when lead finish applied. 9. Twelve spaces. D 7 1 Symbol — .200 .014 .023 .045 .065 .008 .015 — .785 .220 .310 .100 BSC .300 BSC .125 .200 .015 .060 .005 — 90¡ 105¡ — 5.08 .36 .58 1.14 1.65 .20 .38 — 19.94 5.59 7.87 2.54 BSC 7.62 BSC 3.18 5.08 .38 1.52 .13 — 90¡ 105¡ NOTE 1 E 8 14 s1 eA e A Q L b2 b1 a c1 14 RC2211 PRODUCT SPECIFICATION Mechanical Dimensions (continued) 14-Lead Plastic DIP Package Inches Min. A A1 A2 B B1 C D D1 E E1 e eB L N Max. Millimeters Min. Max. Notes: Notes 1. Dimensioning and tolerancing per ANSI Y14.5M-1982. 2. "D" and "E1" do not include mold flashing. Mold flash or protrusions shall not exceed .010 inch (0.25mm). 3. Terminal numbers are shown for reference only. 4. "C" dimension does not include solder finish thickness. 5. Symbol "N" is the maximum number of terminals. 4 2 Symbol — .210 .015 — .115 .195 .014 .022 .045 .070 .008 .015 .725 .795 .005 — .300 .325 .240 .280 .100 BSC — .430 .115 .200 14 — 5.33 .38 — 2.93 4.95 .36 .56 1.14 1.78 .20 .38 18.42 20.19 .13 — 7.62 8.26 6.10 7.11 2.54 BSC — 10.92 2.92 5.08 14 2 5 D 7 1 E1 D1 8 14 E e A A1 L B1 B eB C 15 PRODUCT SPECIFICATION RC2211 Ordering Information Part Number RC2211N RV2211N RM2211D RM2211D/883B Package N N D D Operating Temperature Range 0°C to +70°C -25°C to +85°C -55°C to +125°C -55°C to +125°C Notes: /883B suffix denotes MIL-STD-883, Par 1.2.1 Compliant Devices N = 14-Lead Plastic DIP D = 14-Lead Ceramic DIP The information contained in this data sheet has been carefully compiled; however, it shall not by implication or otherwise become part of the terms and conditions of any subsequent sale. RaytheonÕs liability shall be determined solely by its standard terms and conditions of sale. No representation as to application or use or that the circuits are either licensed or free from patent infringement is intended or implied. Raytheon reserves the right to change the circuitry and any other data at any time without notice and assumes no liability for errors. LIFE SUPPORT POLICY: RaytheonÕs products are not designed for use in life support applications, wherein a failure or malfunction of the component can reasonably be expected to result in personal injury. The user of Raytheon components in life support applications assumes all risk of such use and indemniÞes Raytheon Company against all damages Raytheon Electronics Semiconductor Division 350 Ellis Street Mountain View CA 94043 415 968 9211 FAX 415 966 7742 12/95 0.0m Stock#DS20002211 Ó Raytheon Company 1995
RM2211D883B 价格&库存

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