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WS256K32-25HIA

WS256K32-25HIA

  • 厂商:

    ETC1

  • 封装:

  • 描述:

    WS256K32-25HIA - 256Kx32 SRAM MODULE - List of Unclassifed Manufacturers

  • 数据手册
  • 价格&库存
WS256K32-25HIA 数据手册
WS256K32-XXX HI-RELIABILITY PRODUCT 256Kx32 SRAM MODULE FEATURES s Access Times 20, 25, 35ns s MIL-STD-883 Compliant Devices Available s Packaging PRELIMINARY* s 2V Data Retention devices available (WS256K32L-XXX low power version only) s Commercial, Industrial and Military Temperature Range s 5 Volt Power Supply s Low Power CMOS s TTL Compatible Inputs and Outputs s Weight WS256K32N-XHX - 13 grams typical WS256K32-XG4X - 20 grams typical * This data sheet describes a product under development, not fully characterized, and is subject to change without notice. • 66 pin, PGA Type, 1.185 inch square, Hermetic Ceramic HIP (Package 401) • 68 lead, 40mm, Hermetic CQFP (Package 501) s Organized as 256Kx32, User Configurable as 512Kx16 s Upgradable to 512Kx32 for future expansion s Data I/O Compatible with 3.3V devices FIG. 1 1 I/O8 I/O9 PIN CONFIGURATION FOR WS256K32N-XHX TOP VIEW 12 NC NC GND I/O11 A10 A11 A12 VCC CS1 NC I/O3 22 33 23 I/O15 I/O14 I/O13 I/O12 OE NC WE1 I/O7 I/O6 I/O5 I/O4 I/O24 I/O25 I/O26 A6 A7 NC A8 A9 I/O16 I/O17 I/O18 44 34 VCC NC NC I/O27 A3 A4 A5 WE2 CS2 GND I/O19 55 45 I/O31 I/O30 I/O29 I/O28 A0 A1 A2 I/O23 I/O22 I/O21 I/O20 66 16 16 PIN DESCRIPTION 56 I/O0-31 A0-17 WE1-2 CS1-2 Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Power Supply Ground Not Connected I/O10 A13 A14 A15 A16 A17 I/O0 I/O1 I/O2 11 OE BLOCK DIAGRAM W E1 C S 1 OE A0-17 W E2 C S2 VCC GND NC 256K x 16 256K x 16 I/O0-15 I/O16-31 October 2000 Rev. 2 1 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com WS256K32-XXX FIG. 2 PIN CONFIGURATION FOR WS256K32-XG4X TOP VIEW NC A0 A1 A2 A3 A4 A5 CS1 GND CS2 WE A6 A7 A8 A9 A10 VCC PIN DESCRIPTION I/O0-31 A0-17 Data Inputs/Outputs Address Inputs Write Enable Chip Selects Output Enable Power Supply Ground Not Connected 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31 WE CS1-2 OE BLOCK DIAGRAM CS1 WE OE A0-17 C S2 VCC GND NC 256K x 16 256K x 16 16 16 VCC A11 A12 A13 A14 A15 A16 NC OE NC A17 NC NC NC NC NC NC I/O0-15 I/O16-31 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com 2 WS256K32-XXX ABSOLUTE MAXIMUM RATINGS Parameter Operating Temperature Storage Temperature Signal Voltage Relative to GND Junction Temperature Supply Voltage Symbol TA TSTG VG TJ VCC -0.5 Min -55 -65 -0.5 Max +125 +150 Vcc+0.5 150 7.0 Unit °C °C V °C V CS H L L L OE X L H X WE X H H L TRUTH TABLE Mode Standby Read Out Disable Write Data I/O High Z Data Out High Z Data In Power Standby Active Active Active RECOMMENDED OPERATING CONDITIONS Parameter Supply Voltage Input High Voltage Input Low Voltage Operating Temp (Mil) Symbol VCC VIH VIL TA Min 4.5 2.2 -0.5 -55 Max 5.5 V CC + 0.3 +0.8 +125 Unit V V V °C Parameter OE capacitance WE1-2 capacitance HIP (PGA) CQFP G4 CS1-2 capacitance Data I/O capacitance Address input capacitance CAPACITANCE (T A = +25°C) Symbol COE CWE Conditions VIN = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz 20 28 20 20 28 Max 28 Unit pF pF CCS CI/O CAD VIN = 0 V, f = 1.0 MHz VI/O = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz pF pF pF This parameter is guaranteed by design but not tested. DC CHARACTERISTICS (VCC = 5.0V, GND = 0V, TA = -55°C to +125°C) Parameter Input Leakage Current Output Leakage Current Operating Supply Current x 32 Mode Standby Current Output Low Voltage Output High Voltage Symbol ILI ILO ICC x 32 ISB VOL VOH Conditions Min VCC = 5.5, VIN = GND to VCC CS = VIH, OE = VIH, VOUT = GND to VCC CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5 CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5 IOL = 8mA, Vcc = 4.5 IOH = -4.0mA, Vcc = 4.5 2.4 Max 10 10 550 34 0.4 Units µA µA mA mA V V NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V LOW POWER DATA RETENTION CHARACTERISTICS (WS256K32L-XXX ONLY) (T A = -55°C to +125°C) Parameter Data Retention Supply Voltage Data Retention Current Symbol V DR I CCDR3 Conditions Min CS ≥ V CC - 0.2V V CC = 3 V 2.0 1.0 Typ Max 5.5 16 V mA Units 3 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com WS256K32-XXX AC CHARACTERISTICS (VCC = 5.0V, GND = 0V, TA = -55 °C to +125 °C) Parameter Read Cycle Read Cycle Time Address Access Time Output Hold from Address Change Chip Select Access Time Output Enable to Output Valid Chip Select to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z t RC t AA t OH t ACS t OE t CLZ 1 t OLZ 1 t CHZ 1 t OHZ 1 5 0 12 12 0 20 12 5 0 15 15 Symbol Min 20 20 0 25 15 5 0 20 20 -20 Max Min 25 25 0 35 20 -25 Max Min 35 35 -35 Max ns ns ns ns ns ns ns ns ns Units 1. This parameter is guaranteed by design but not tested. AC CHARACTERISTICS (VCC = 5.0V, GND = 0V, TA = -55 °C to +125°C) Parameter Write Cycle Write Cycle Time Chip Select to End of Write Address Valid to End of Write Data Valid to End of Write Write Pulse Width Address Setup Time Address Hold Time Output Active from End of Write Write Enable to Output in High Z Data Hold Time t WC t CW t AW t DW t WP t AS t AH t OW 1 t WHZ 1 t DH 0 Symbol Min 20 17 17 12 17 0 2 0 8 0 -20 Max Min 25 20 20 15 20 0 2 0 10 0 -25 Max Min 35 25 25 20 25 0 2 0 15 -35 Max ns ns ns ns ns ns ns ns ns ns Units 1. This parameter is guaranteed by design but not tested. FIG. 3 AC TEST CIRCUIT Current Source I OL AC TEST CONDITIONS Parameter Input Pulse Levels Input Rise and Fall Input and Output Reference Level D.U.T. VZ Typ VIL = 0, VIH = 3.0 5 1.5 1.5 Unit V ns V V ≈ 1.5V Output Timing Reference Level C eff = 50 pf (Bipolar Supply) I OH Current Source NOTES: V Z is programmable from -2V to +7V. I OL & IOH programmable from 0 to 16mA. Tester Impedance Z 0 = 75 Ω. V Z is typically the midpoint of V OH and V OL. I OL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance. White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com 4 WS256K32-XXX FIG. 4 TIMING WAVEFORM - READ CYCLE ADDRESS tRC tAA CS tRC ADDRESS tACS tCLZ OE tCHZ tAA tOH DATA I/O PREVIOUS DATA VALID DATA VALID tOE tOLZ DATA I/O HIGH IMPEDANCE tOHZ DATA VALID READ CYCLE 1 (CS = OE = VIL, WE = VIH) READ CYCLE 2 (WE = VIH) FIG. 5 WRITE CYCLE - WE CONTROLLED tWC ADDRESS tAW tCW CS tAH tAS WE tWP tOW tWHZ tDW tDH DATA I/O DATA VALID WRITE CYCLE 1, WE CONTROLLED FIG. 6 WRITE CYCLE - CS CONTROLLED ADDRESS tWC WS32K32-XHX tAS tAW tCW tAH CS tWP WE tDW DATA I/O DATA VALID tDH WRITE CYCLE 2, CS CONTROLLED 5 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com WS256K32-XXX PACKAGE 401: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H) 30.1 (1.185) ± 0.38 (0.015) SQ PIN 1 IDENTIFIER SQUARE PAD ON BOTTOM 25.4 (1.0) TYP 6.22 (0.245) MAX 3.81 (0.150) ± 0.1 (0.005) 2.54 (0.100) TYP 1.27 (0.050) ± 0.1 (0.005) 0.76 (0.030) ± 0.1 (0.005) 15.24 (0.600) TYP 1.27 (0.050) TYP DIA 0.46 (0.018) ± 0.05 (0.002) DIA 25.4 (1.0) TYP ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES PACKAGE 501: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G4) 39.6 (1.56) ± 0.38 (0.015) SQ 5.1 (0.200) MAX 1.27 (0.050) ± 0.1 (0.005) PIN 1 IDENTIFIER Pin 1 12.7 (0.500) ± 0.5 (0.020) 4 PLACES 5.1 (0.200) ± 0.25 (0.010) 4 PLACES 1.27 (0.050) TYP 38 (1.50) TYP 4 PLACES 0.38 (0.015) ± 0.08 (0.003) 68 PLACES 0.25 (0.010) ± 0.05 (0.002) ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com 6 WS256K32-XXX ORDERING INFORMATION W S 256K32 X - XXX X X X LEAD FINISH: Blank = Gold plated leads A = Solder dip leads DEVICE GRADE: M = Military Screened I = Industrial C = Commercial PACKAGE: H = Ceramic Hex-In-Line Package, HIP (Package 401) G4 = 40mm Ceramic Quad Flat Pack, CQFP (Package 501) ACCESS TIME (ns) IMPROVEMENT MARK N = No Connect at pins 21, 28 and 39 in HIP for Upgrades Blank = Standard Power L = Low Power Data Retention ORGANIZATION, 256Kx32 User configurable as 512Kx16 SRAM WHITE ELECTRONIC DESIGNS CORP. -55°C to +125°C -40°C to +85°C 0°C to +70°C 7 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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