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EM641FU8AS-70S

EM641FU8AS-70S

  • 厂商:

    ETC2

  • 封装:

  • 描述:

    EM641FU8AS-70S - 512K x16 bit Low Power and Low Voltage Full CMOS Static RAM - List of Unclassifed M...

  • 数据手册
  • 价格&库存
EM641FU8AS-70S 数据手册
EM681FV16AU Series Low Power, 512Kx16 SRAM Document Title 512K x16 bit Low Power and Low Voltage Full CMOS Static RAM Revision History2.1 Revision No. 0.0 History Initial Draft Production code change from EM681FV16U-45LL to EM681FV16U-45LF Production code change from EM681FV16U-45LF to EM681FV16AU-45LF Product code table update Fix typo error Draft Date Oct. 26, 2006 Remark Preliminary 0.1 0.1 Revision Jan. 18, 2007 0.2 0.3 0.4 0.2 Revision 0.3 Revision 0.4 Revision April. 10, 2007 June 15, 2007 Nov. 12, 2007 Emerging Memory & Logic Solutions Inc. 4F Korea Construction Financial Cooperative B/D, 301-1 Yeon-Dong, Jeju-Si, Jeju-Do, Rep.of Korea Tel : +82-64-740-1712 Fax : +82-64-740-1749~1750 / Homepage : www.emlsi.com Zip Code : 690-719 The attached data sheets are provided by EMLSI reserve the right to change the specifications and products. EMLSI will answer to your questions about device. If you have any questions, please contact the EMLSI office. 1 EM681FV16AU Series Low Power, 512Kx16 SRAM FEATURES • • • • • • Process Technology : 0.15µm Full CMOS Organization : 512K x 16 bit Power Supply Voltage : 2.7V ~ 3.6V Low Data Retention Voltage : 1.5V (Min.) Three state output and TTL Compatible Package Type : 44-TSOP2 GENERAL DESCRIPTION The EM681FV16AU is fabricated by EMLSI’s advanced full CMOS process technology. The families support industrial temperature range and Chip Scale Package for user flexibility of system design. The families also supports low data retention voltage for battery back-up operation with low data retention current. PRODUCT FAMILY Power Dissipation Product Family EM681FV16AU-45LF EM681FV16AU-55LF EM681FV16AU-70LF Operating Temperature Industrial (-40 ~ 85oC) Industrial (-40 ~ 85oC) Industrial (-40 ~ 85oC) Vcc Range Speed Standby (ISB1, Typ.) 2 µA 2 µA 2 µA Operating (ICC1.Max) 4mA 4mA 4mA PKG Type 2.7V~3.6V 2.7V~3.6V 2.7V~3.6V 45ns 55ns 70ns 44-TSOP2 44-TSOP2 44-TSOP2 PIN DESCRIPTION FUNCTIONAL BLOCK DIAGRAM Pre-charge Circuit A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 VCC Row Select VSS Memory Array 2048 x 4096 I/O0 ~ I/O7 I/O8 ~ I/O15 Data Cont Data Cont I/O Circuit Column Select A11 A12 A13 A14 A15 A16 A17 A18 44-TSOP2 : Top view WE OE UB LB CS Control Logic Name CS OE WE A0~A18 Function Chip select inputs Output Enable input Write Enable input Address Inputs Name Vcc Vss UB LB NC Function Power Supply Ground Upper Byte (I/O8~15) Lower Byte (I/O0~7) No Connected I/O0~I/O15 Data Inputs/outputs 2 EM681FV16AU Series Low Power, 512Kx16 SRAM ABSOLUTE MAXIMUM RATINGS * Parameter Voltage on Any Pin Relative to Vss Voltage on Vcc supply relative to Vss Power Dissipation Operating Temperature Symbol VIN, VOUT VCC PD TA Minimum -0.2 to 4.0V -0.2 to 4.0V 1.0 -40 to 85 Unit V V W o C * Stresses greater than those listed above “Absolute Maximum Ratings” may cause permanent damage to the device. Functional operation should be restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability. FUNCTIONAL DESCRIPTION CS H X L L L L L L L OE X X H L L L X X X WE X X H H H H L L L LB X H X L H L L H L UB X H X H L L H L L I/O0-7 High-Z High-Z High-Z Data Out High-Z Data Out Data In High-Z Data In I/O8-15 High-Z High-Z High-Z High-Z Data Out Data Out High-Z Data In Data In Mode Deselected Deselected Output Disabled Lower Byte Read Upper Byte Read Word Read Lower Byte Write Upper Byte Write Word Write Power Stand by Stand by Active Active Active Active Active Active Active Note: X means don’t care. (Must be low or high state) 3 EM681FV16AU Series Low Power, 512Kx16 SRAM RECOMMENDED DC OPERATING CONDITIONS 1) Parameter Supply voltage Ground Input high voltage Input low voltage 1. 2. 3. 4. Symbol VCC VSS VIH VIL Min 2.7 0 2.2 -0.23) Typ 3.3 0 - Max 3.6 0 VCC + 0.22) 0.6 Unit V V V V TA= -40 to 85oC, otherwise specified Overshoot: VCC +2.0 V in case of pulse width < 20ns Undershoot: -2.0 V in case of pulse width < 20ns Overshoot and undershoot are sampled, not 100% tested. CAPACITANCE1) (f =1MHz, TA=25oC) Item Input capacitance Input/Ouput capacitance 1. Capacitance is sampled, not 100% tested Symbol CIN CIO Test Condition VIN=0V VIO=0V Min - Max 8 10 Unit pF pF DC AND OPERATING CHARACTERISTICS Parameter Input leakage current Output leakage current Operating power supply Symbol ILI ILO ICC ICC1 Average operating current ICC2 Output low voltage Output high voltage Standby Current (TTL) VOL VOH ISB VIN=VSS to VCC CS=VIH or OE=VIH or WE=VIL or LB=UB=VIH VIO=VSS to VCC IIO=0mA, CS=VIL, WE=VIH, VIN=VIH or VIL Cycle time=1µs, 100% duty, IIO=0mA, CS
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